Hi; this pullreq has more work from RTH towards emulation of SME2p2,
support for FlexCAN emulation on sabrelite, RME GPC3, and a scatter
of other more minor changes.
thanks
-- PMM
The following changes since commit 20553466cc47af6a8c95f665b601fce3c852e503:
Merge tag 'pbouvier/pr/docs-20260626' of https://gitlab.com/p-b-o/qemu into staging (2026-06-27 23:28:35 -0400)
are available in the Git repository at:
https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20260629
for you to fetch changes up to 94e3ad78004787b0dea9625544fb45d8cf037147:
docs/system/arm/virt: Document accelerated SMMUv3 and Tegra241 CMDQV (2026-06-29 11:06:02 +0100)
----------------------------------------------------------------
target-arm queue:
* hw/timer/imx_epit: Replace DPRINTF with trace events
target/arm: Enable SCTLR_EL1.EnFPM for user-only
target/arm: Implement FEAT_SME_F8F32
target/arm: Implement FEAT_SSVE_AES
target/arm: Implement FEAT_SME_F8F16
target/arm: GICv5: Fix some minor bugs
target/arm: Add GPC3 granule bypass windows
target/arm: Fix some minor timer related bugs
hw/arm/sabrelite: Add FlexCAN emulation
docs/system: add FEAT_ECV_POFF to the emulation list
docs/system/arm/virt: Document accelerated SMMUv3 and Tegra241 CMDQV
----------------------------------------------------------------
Alex Bennée (6):
target/arm: split evaluation of CNTHCTL timer IRQ masks
target/arm: trigger timer recalculation when toggling CNTHCTL:ECV
target/arm: trigger timer recalc on SCR:ECVEN change
target/arm: gate check on scr_el3 behind ARM_FEATURE_EL3 check
target/arm: trigger timer recalc on HCR:(E2H|TGE) changes
docs/system: add FEAT_ECV_POFF to the emulation list
Jim MacArthur (6):
target/arm/tcg/cpu64.c: Extra test for GPC3.
target/arm: Setup new registers for GPC3
target/arm/ptw.c: Add Granule Bypass Windows
target/arm/cpu-features.h: x-rme now means GPC3
tests/tcg/aarch64/system: Alternative boot object for exception logging
tests/tcg/aarch64/system/gpc-test.c: Basic test for granule protection check
Matyáš Bobek (7):
hw/arm/sabrelite: Open code DEFINE_MACHINE_ARM
hw/arm/sabrelite: Introduce class SabreliteMachineState
hw/misc/imx6_ccm: Add PLL3 and CAN clock
hw/net/can/flexcan: NXP FlexCAN core emulation
hw/arm: Plug FlexCAN into FSL_IMX6 and Sabrelite
tests: Add qtests for FlexCAN
docs/arm/sabrelite: Mention FlexCAN support
Peter Maydell (5):
arm/gicv5: Add URL to GICv5 specification
target/arm: GICv5 cpuif: Recalculate IRQ/FIQ on ICC_PCR_EL1 write
target/arm: GICv5 cpuif: Tag ICC_PPI_PRIORITYR<n> regs as ARM_CP_NO_RAW
target/arm: GICv5 cpuif: Remove ICC_HAPR_EL1
hw/intc/gicv5: Define and use GICV5_PENDING_IRQ_NONE
Richard Henderson (28):
target/arm: Enable SCTLR_EL1.EnFPM for user-only
target/arm: Implement EXPAND
target/arm: Generalize sve_compact_[sd]
target/arm: Implement COMPACT for byte/halfword
target/arm: Implement FIRSTP, LASTP
target/arm: Rename isar_feature_aa64_sve_aes
target/arm: Implement FEAT_SSVE_AES
target/arm: Use expand_pred_N for helper_sve_not_zpz_N
target/arm: Move tile_vslice_{index, offset} to vec_internal.h
target/arm: Implement FMOPA (widening, 4-way fp8 to fp32)
target/arm: Implement FMLALL (multiple and single vector)
target/arm: Implement FMLALL (multiple vector)
target/arm: Implement FMLALL (multiple and indexed vector)
target/arm: Implement FDOT (multiple and single vector)
target/arm: Implement FDOT (multiple vector)
target/arm: Implement FDOT (multiple and indexed vector)
target/arm: Implement FVDOTB, FVDOTT
target/arm: Enable FEAT_SME_F8F32 for -cpu max
target/arm: Enable FADD/FSUB (half-precision) with FEAT_SME_F8F16
target/arm: Rename SME FMLAL/FMLSL patterns
target/arm: Implement FMLAL (multiple, multiple and single, FP8 to FP16)
target/arm: Implement FMLAL (multiple and indexed, FP8 to FP16)
target/arm: Implement FDOT (multiple, multiple and single, FP8 to FP16)
target/arm: Implement FDOT (multiple and indexed, FP8 to FP16)
target/arm: Implement FMOPA (widening, 2-way, FP8 to FP16)
target/arm: Rename FVDOT pattern
target/arm: Implement FVDOT (FP8 to FP16)
target/arm: Enable FEAT_SME_F8F16 for -cpu max
Shameer Kolothum (1):
docs/system/arm/virt: Document accelerated SMMUv3 and Tegra241 CMDQV
jack wang (1):
hw/timer/imx_epit: Replace DPRINTF with trace events
MAINTAINERS | 9 +
bsd-user/aarch64/target_arch_elf.h | 2 +-
docs/system/arm/emulation.rst | 4 +
docs/system/arm/sabrelite.rst | 1 +
docs/system/arm/virt.rst | 26 +
docs/system/devices/can.rst | 24 +
hw/arm/Kconfig | 1 +
hw/arm/fsl-imx6.c | 29 +
hw/arm/sabrelite.c | 68 +-
hw/intc/arm_gicv5.c | 11 +-
hw/misc/imx6_ccm.c | 24 +
hw/misc/trace-events | 2 +
hw/net/Kconfig | 5 +
hw/net/can/flexcan.c | 1396 +++++++++++++++++++++++++++++
hw/net/can/flexcan_regs.h | 197 ++++
hw/net/can/meson.build | 1 +
hw/net/can/trace-events | 18 +
hw/timer/imx_epit.c | 25 +-
hw/timer/trace-events | 6 +
include/hw/arm/fsl-imx6.h | 6 +
include/hw/intc/arm_gicv5_types.h | 4 +
include/hw/misc/imx6_ccm.h | 4 +
include/hw/misc/imx_ccm.h | 1 +
include/hw/net/flexcan.h | 145 +++
linux-user/aarch64/elfload.c | 5 +-
target/arm/cpu-features.h | 28 +-
target/arm/cpu.c | 4 +
target/arm/cpu.h | 7 +
target/arm/helper.c | 52 +-
target/arm/ptw.c | 77 ++
target/arm/tcg/cpu64.c | 7 +-
target/arm/tcg/fp8_helper.c | 116 +++
target/arm/tcg/gicv5-cpuif.c | 29 +-
target/arm/tcg/helper-fp8-defs.h | 6 +
target/arm/tcg/helper-sve-defs.h | 10 +
target/arm/tcg/sme.decode | 95 +-
target/arm/tcg/sme_helper.c | 33 -
target/arm/tcg/sve.decode | 6 +-
target/arm/tcg/sve_helper.c | 150 +++-
target/arm/tcg/translate-sme.c | 148 ++-
target/arm/tcg/translate-sve.c | 105 ++-
target/arm/tcg/vec_internal.h | 31 +
tests/qtest/flexcan-test.c | 421 +++++++++
tests/qtest/meson.build | 1 +
tests/tcg/aarch64/Makefile.softmmu-target | 22 +-
tests/tcg/aarch64/system/boot.S | 65 ++
tests/tcg/aarch64/system/boot.h | 14 +
tests/tcg/aarch64/system/gpc-test.c | 165 ++++
48 files changed, 3430 insertions(+), 176 deletions(-)
create mode 100644 hw/net/can/flexcan.c
create mode 100644 hw/net/can/flexcan_regs.h
create mode 100644 include/hw/net/flexcan.h
create mode 100644 tests/qtest/flexcan-test.c
create mode 100644 tests/tcg/aarch64/system/boot.h
create mode 100644 tests/tcg/aarch64/system/gpc-test.c