From: Nathan Chen <nathanc@nvidia.com>
Change accel SMMUv3 SSIDSIZE property from uint8_t to SsidSizeMode.
The 'auto' value is not implemented, as this commit is meant to set the
property to the correct type and avoid breaking JSON/QMP when the auto
mode is introduced. A future patch will implement resolution of 'auto'
value to match the host SMMUv3 SSIDSIZE value.
Fixes: b8c6f8a69d27 ("hw/arm/smmuv3-accel: Make SubstreamID support configurable")
Signed-off-by: Nathan Chen <nathanc@nvidia.com>
---
hw/arm/smmuv3-accel.c | 23 +++++++++++++++++++++--
hw/arm/smmuv3.c | 18 ++++++++++--------
include/hw/arm/smmuv3.h | 3 ++-
3 files changed, 33 insertions(+), 11 deletions(-)
diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c
index ddd927fa80..c90fa9f5bb 100644
--- a/hw/arm/smmuv3-accel.c
+++ b/hw/arm/smmuv3-accel.c
@@ -802,7 +802,7 @@ static uint64_t smmuv3_accel_get_viommu_flags(void *opaque)
SMMUState *bs = opaque;
SMMUv3State *s = ARM_SMMUV3(bs);
- if (s->ssidsize) {
+ if (s->ssidsize > SSID_SIZE_MODE_0) {
flags |= VIOMMU_FLAG_PASID_SUPPORTED;
}
return flags;
@@ -817,6 +817,22 @@ static const PCIIOMMUOps smmuv3_accel_ops = {
.get_msi_direct_gpa = smmuv3_accel_get_msi_gpa,
};
+/*
+ * This returns the value of a SsidSizeMode value offset by 1 to
+ * account for the enum values offset by 1 from actual values.
+ *
+ * SSID_SIZE_MODE_0 = 1, SSID_SIZE_MODE_1 = 2, etc. so return 0
+ * if SSID_SIZE_MODE_0 is passed as input, return 1 if
+ * SSID_SIZE_MODE_1 is passed as input, etc.
+ */
+static uint8_t ssidsize_mode_to_value(SsidSizeMode mode)
+{
+ if (mode == SSID_SIZE_MODE_AUTO) {
+ return 0;
+ }
+ return mode - 1;
+}
+
void smmuv3_accel_idr_override(SMMUv3State *s)
{
if (!s->accel) {
@@ -842,7 +858,10 @@ void smmuv3_accel_idr_override(SMMUv3State *s)
* By default QEMU SMMUv3 has no SubstreamID support. Update IDR1 if user
* has enabled it.
*/
- s->idr[1] = FIELD_DP32(s->idr[1], IDR1, SSIDSIZE, s->ssidsize);
+ if (s->ssidsize > SSID_SIZE_MODE_0) {
+ s->idr[1] = FIELD_DP32(s->idr[1], IDR1, SSIDSIZE,
+ ssidsize_mode_to_value(s->ssidsize));
+ }
}
/* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding HWPT */
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 40d6aca83e..e7fec7a69e 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -20,6 +20,7 @@
#include "qemu/bitops.h"
#include "hw/core/irq.h"
#include "hw/core/sysbus.h"
+#include "hw/core/qdev-properties-system.h"
#include "migration/blocker.h"
#include "migration/vmstate.h"
#include "hw/core/qdev-properties.h"
@@ -625,7 +626,7 @@ static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg,
}
/* Multiple context descriptors require SubstreamID support */
- if (!s->ssidsize && STE_S1CDMAX(ste) != 0) {
+ if (s->ssidsize == SSID_SIZE_MODE_0 && STE_S1CDMAX(ste) != 0) {
qemu_log_mask(LOG_UNIMP,
"SMMUv3: multiple S1 context descriptors require SubstreamID support. "
"Configure ssidsize > 0 (requires accel=on)\n");
@@ -1984,7 +1985,7 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
error_setg(errp, "OAS must be 44 bits when accel=off");
return false;
}
- if (s->ssidsize) {
+ if (s->ssidsize > SSID_SIZE_MODE_0) {
error_setg(errp, "ssidsize can only be set if accel=on");
return false;
}
@@ -2008,13 +2009,13 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
return false;
}
- if (s->oas != SMMU_OAS_44BIT && s->oas != SMMU_OAS_48BIT) {
- error_setg(errp, "OAS can only be set to 44 or 48 bits");
+ if (s->ssidsize == SSID_SIZE_MODE_AUTO) {
+ error_setg(errp, "ssidsize cannot be set to auto");
return false;
}
- if (s->ssidsize > SMMU_SSID_MAX_BITS) {
- error_setg(errp, "ssidsize must be in the range 0 to %d",
- SMMU_SSID_MAX_BITS);
+
+ if (s->oas != SMMU_OAS_44BIT && s->oas != SMMU_OAS_48BIT) {
+ error_setg(errp, "OAS can only be set to 44 or 48 bits");
return false;
}
@@ -2145,7 +2146,8 @@ static const Property smmuv3_properties[] = {
DEFINE_PROP_ON_OFF_AUTO("ril", SMMUv3State, ril, ON_OFF_AUTO_ON),
DEFINE_PROP_ON_OFF_AUTO("ats", SMMUv3State, ats, ON_OFF_AUTO_OFF),
DEFINE_PROP_UINT8("oas", SMMUv3State, oas, 44),
- DEFINE_PROP_UINT8("ssidsize", SMMUv3State, ssidsize, 0),
+ DEFINE_PROP_SSIDSIZE_MODE("ssidsize", SMMUv3State, ssidsize,
+ SSID_SIZE_MODE_0),
};
static void smmuv3_instance_init(Object *obj)
diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
index c35e599bbc..ddf472493d 100644
--- a/include/hw/arm/smmuv3.h
+++ b/include/hw/arm/smmuv3.h
@@ -21,6 +21,7 @@
#include "hw/arm/smmu-common.h"
#include "qom/object.h"
+#include "qapi/qapi-types-misc-arm.h"
#define TYPE_SMMUV3_IOMMU_MEMORY_REGION "smmuv3-iommu-memory-region"
@@ -72,7 +73,7 @@ struct SMMUv3State {
OnOffAuto ril;
OnOffAuto ats;
uint8_t oas;
- uint8_t ssidsize;
+ SsidSizeMode ssidsize;
};
typedef enum {
--
2.43.0
> -----Original Message-----
> From: Nathan Chen <nathanc@nvidia.com>
> Sent: 17 March 2026 18:38
> To: qemu-devel@nongnu.org; qemu-arm@nongnu.org
> Cc: Eric Auger <eric.auger@redhat.com>; Peter Maydell
> <peter.maydell@linaro.org>; Shannon Zhao <shannon.zhaosl@gmail.com>;
> Michael S . Tsirkin <mst@redhat.com>; Igor Mammedov
> <imammedo@redhat.com>; Ani Sinha <anisinha@redhat.com>; Paolo Bonzini
> <pbonzini@redhat.com>; Daniel P . Berrangé <berrange@redhat.com>; Eric
> Blake <eblake@redhat.com>; Markus Armbruster <armbru@redhat.com>;
> Shameer Kolothum Thodi <skolothumtho@nvidia.com>; Matt Ochs
> <mochs@nvidia.com>; Nicolin Chen <nicolinc@nvidia.com>; Nathan Chen
> <nathanc@nvidia.com>
> Subject: [PATCH v3 5/8] hw/arm/smmuv3-accel: Change SSIDSIZE property to
> SsidSizeMode
>
> From: Nathan Chen <nathanc@nvidia.com>
>
> Change accel SMMUv3 SSIDSIZE property from uint8_t to SsidSizeMode.
> The 'auto' value is not implemented, as this commit is meant to set the
> property to the correct type and avoid breaking JSON/QMP when the auto
> mode is introduced. A future patch will implement resolution of 'auto'
> value to match the host SMMUv3 SSIDSIZE value.
>
> Fixes: b8c6f8a69d27 ("hw/arm/smmuv3-accel: Make SubstreamID support
> configurable")
> Signed-off-by: Nathan Chen <nathanc@nvidia.com>
> ---
> hw/arm/smmuv3-accel.c | 23 +++++++++++++++++++++--
> hw/arm/smmuv3.c | 18 ++++++++++--------
> include/hw/arm/smmuv3.h | 3 ++-
> 3 files changed, 33 insertions(+), 11 deletions(-)
>
> diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c
> index ddd927fa80..c90fa9f5bb 100644
> --- a/hw/arm/smmuv3-accel.c
> +++ b/hw/arm/smmuv3-accel.c
> @@ -802,7 +802,7 @@ static uint64_t
> smmuv3_accel_get_viommu_flags(void *opaque)
> SMMUState *bs = opaque;
> SMMUv3State *s = ARM_SMMUV3(bs);
>
> - if (s->ssidsize) {
> + if (s->ssidsize > SSID_SIZE_MODE_0) {
> flags |= VIOMMU_FLAG_PASID_SUPPORTED;
> }
> return flags;
> @@ -817,6 +817,22 @@ static const PCIIOMMUOps smmuv3_accel_ops = {
> .get_msi_direct_gpa = smmuv3_accel_get_msi_gpa,
> };
>
> +/*
> + * This returns the value of a SsidSizeMode value offset by 1 to
> + * account for the enum values offset by 1 from actual values.
> + *
> + * SSID_SIZE_MODE_0 = 1, SSID_SIZE_MODE_1 = 2, etc. so return 0
> + * if SSID_SIZE_MODE_0 is passed as input, return 1 if
> + * SSID_SIZE_MODE_1 is passed as input, etc.
> + */
> +static uint8_t ssidsize_mode_to_value(SsidSizeMode mode)
> +{
> + if (mode == SSID_SIZE_MODE_AUTO) {
> + return 0;
> + }
> + return mode - 1;
> +}
> +
> void smmuv3_accel_idr_override(SMMUv3State *s)
> {
> if (!s->accel) {
> @@ -842,7 +858,10 @@ void smmuv3_accel_idr_override(SMMUv3State *s)
> * By default QEMU SMMUv3 has no SubstreamID support. Update IDR1 if
> user
> * has enabled it.
> */
> - s->idr[1] = FIELD_DP32(s->idr[1], IDR1, SSIDSIZE, s->ssidsize);
> + if (s->ssidsize > SSID_SIZE_MODE_0) {
> + s->idr[1] = FIELD_DP32(s->idr[1], IDR1, SSIDSIZE,
> + ssidsize_mode_to_value(s->ssidsize));
> + }
> }
>
> /* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding
> HWPT */
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index 40d6aca83e..e7fec7a69e 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -20,6 +20,7 @@
> #include "qemu/bitops.h"
> #include "hw/core/irq.h"
> #include "hw/core/sysbus.h"
> +#include "hw/core/qdev-properties-system.h"
> #include "migration/blocker.h"
> #include "migration/vmstate.h"
> #include "hw/core/qdev-properties.h"
> @@ -625,7 +626,7 @@ static int decode_ste(SMMUv3State *s,
> SMMUTransCfg *cfg,
> }
>
> /* Multiple context descriptors require SubstreamID support */
> - if (!s->ssidsize && STE_S1CDMAX(ste) != 0) {
> + if (s->ssidsize == SSID_SIZE_MODE_0 && STE_S1CDMAX(ste) != 0) {
> qemu_log_mask(LOG_UNIMP,
> "SMMUv3: multiple S1 context descriptors require SubstreamID
> support. "
> "Configure ssidsize > 0 (requires accel=on)\n");
> @@ -1984,7 +1985,7 @@ static bool
> smmu_validate_property(SMMUv3State *s, Error **errp)
> error_setg(errp, "OAS must be 44 bits when accel=off");
> return false;
> }
> - if (s->ssidsize) {
> + if (s->ssidsize > SSID_SIZE_MODE_0) {
> error_setg(errp, "ssidsize can only be set if accel=on");
> return false;
> }
> @@ -2008,13 +2009,13 @@ static bool
> smmu_validate_property(SMMUv3State *s, Error **errp)
> return false;
> }
>
> - if (s->oas != SMMU_OAS_44BIT && s->oas != SMMU_OAS_48BIT) {
> - error_setg(errp, "OAS can only be set to 44 or 48 bits");
> + if (s->ssidsize == SSID_SIZE_MODE_AUTO) {
> + error_setg(errp, "ssidsize cannot be set to auto");
> return false;
> }
> - if (s->ssidsize > SMMU_SSID_MAX_BITS) {
> - error_setg(errp, "ssidsize must be in the range 0 to %d",
> - SMMU_SSID_MAX_BITS);
I think we can now get rid of the "#define SMMU_SSID_MAX_BITS"
as I don't think it is used anywhere else and SsidSizeMode won't
accept anything > 20. Right?
Thanks,
Shameer
> +
> + if (s->oas != SMMU_OAS_44BIT && s->oas != SMMU_OAS_48BIT) {
> + error_setg(errp, "OAS can only be set to 44 or 48 bits");
> return false;
> }
>
> @@ -2145,7 +2146,8 @@ static const Property smmuv3_properties[] = {
> DEFINE_PROP_ON_OFF_AUTO("ril", SMMUv3State, ril,
> ON_OFF_AUTO_ON),
> DEFINE_PROP_ON_OFF_AUTO("ats", SMMUv3State, ats,
> ON_OFF_AUTO_OFF),
> DEFINE_PROP_UINT8("oas", SMMUv3State, oas, 44),
> - DEFINE_PROP_UINT8("ssidsize", SMMUv3State, ssidsize, 0),
> + DEFINE_PROP_SSIDSIZE_MODE("ssidsize", SMMUv3State, ssidsize,
> + SSID_SIZE_MODE_0),
> };
>
> static void smmuv3_instance_init(Object *obj)
> diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
> index c35e599bbc..ddf472493d 100644
> --- a/include/hw/arm/smmuv3.h
> +++ b/include/hw/arm/smmuv3.h
> @@ -21,6 +21,7 @@
>
> #include "hw/arm/smmu-common.h"
> #include "qom/object.h"
> +#include "qapi/qapi-types-misc-arm.h"
>
> #define TYPE_SMMUV3_IOMMU_MEMORY_REGION "smmuv3-iommu-
> memory-region"
>
> @@ -72,7 +73,7 @@ struct SMMUv3State {
> OnOffAuto ril;
> OnOffAuto ats;
> uint8_t oas;
> - uint8_t ssidsize;
> + SsidSizeMode ssidsize;
> };
>
> typedef enum {
> --
> 2.43.0
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