Hi Sairaj, Michael,
On 3/2/26 6:51 AM, Sairaj Kodilkar wrote:
> AMD IOMMU uses MMIO registers 0x170-0x180 to generate the interrupts when guest
> has enabled xt support through control register. The guest programs these
> registers with appropriate vector and destination ID instead of writing to PCI
> MSI capability.
>
> Until now enabling the xt support through command line "xtsup=on" provided
> support for 128 bit IRTE. But it has few limitations:
>
> 1. It does not consider if guest has actually enabled xt support through MMIO
> control register (0x18). This may cause problems for the guests which do
> not enable this support.
> 2. The vIOMMU is not capable of generating interrupts using vector and
> destinatio ID in IOMMU x2APIC Control Registers (not supporting event log
> interrupts).
>
> To overcome above limitations, this patch series introduces new internal flag
> "intcapxten" which is set when guest writes "1" to MMIO control register (0x18)
> bit 51 (IntCapXTEn) and adds support to generate event log interrupt using
> vector and 32 bit destination ID in XT MMIO register 0x170.
>
Thank you for your work on this series, and being responsive to all the
feedback.
I reviewed this latest round later than I should have. I had mistakenly
marked the soft-freeze date in my calendar to be later in the cycle, so I
was late getting to review/test this last revision.
A case can be made that this series should be merged even after the change
freeze, since it addresses a potential correctness issue with the interrupt
generation, and the cleanup/refactoring/migration components are supporting
this fix. However, given where we are in the cycle and the fact we have not
seen any crashes/problems directly attributed to the XT support, I think we
can defer to 11.1, and merge once the window opens in late April. No need
to resend the series, it is already in my staging branch.
I'm including Michael on the direct recipients in case he has other
preference. I have the pull request with this series ready if there is
need/opportunity to merge earlier.
Thank you,
Alejandro
> -------------------------------------------------------------------------------
>
> Changes since v2:
> https://lore.kernel.org/qemu-devel/20260129102814.4488-1-sarunkod@amd.com/
> Patch 1:
> - Delete amdvi_mmio_trace_{read,write} and AMDVI_MMIO_REGS_{LOW,HIGH}
> definitions [AJ]
> - Move MMIO_REG_TO_STRING definition inside amdvi_mmio_get_name() [CM]
> Patch 2: Improve commit message [AJ]
> Patch 3: Improve commit message and comment [AJ]
>
>
> Changes since v1:
> https://lore.kernel.org/qemu-devel/20251118082403.3455-1-sarunkod@amd.com/
> Patch 1: Return string literals directly instead of copying [AJ]
> Patch 2:
> - Update commit message [AJ]
> - Introduce new subsection for migration compatibility [AJ]
> - Update comment [AJ]
> Patch 3: Use ga_enabled flag while setting xten flag [AJ]
>
>
> -------------------------------------------------------------------------------
>
> The patches are based on top of upstream qemu master 07f97d5da04a
>
> -------------------------------------------------------------------------------
>
> Sairaj Kodilkar (3):
> amd_iommu: Use switch case to determine mmio register name
> amd_iommu: Turn on XT support only when guest has enabled it
> amd_iommu: Generate XT interrupts when xt support is enabled
>
> hw/i386/amd_iommu.c | 144 ++++++++++++++++++++++++++-----------------
> hw/i386/amd_iommu.h | 25 ++++++--
> hw/i386/trace-events | 1 +
> 3 files changed, 108 insertions(+), 62 deletions(-)
>