[v2] Hexagon (target/hexagon) Check opcodes versions

[PATCH v2 1/8] Hexagon (target/hexagon) Properly handle Hexagon CPU version

Posted by Taylor Simpson 1 month, 3 weeks ago

Add the following CPU versions that were previously missing
    v5
    v55
    v60
    v61
    v62
    v65

Create an enum with the known Hexagon CPU versions
Add a field to HexagonCPUClass to note the Hexagon CPU version

Co-authored-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
Co-authored-by: Brian Cain <brian.cain@oss.qualcomm.com>
Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
---
 target/hexagon/cpu-qom.h | 23 +++++++++++++++++++++++
 target/hexagon/cpu.h     |  2 ++
 target/hexagon/cpu.c     | 28 ++++++++++++++++++++++------
 3 files changed, 47 insertions(+), 6 deletions(-)

diff --git a/target/hexagon/cpu-qom.h b/target/hexagon/cpu-qom.h
index 0b149bd5fe..d2f98c683a 100644
--- a/target/hexagon/cpu-qom.h
+++ b/target/hexagon/cpu-qom.h
@@ -11,11 +11,34 @@
 
 #include "hw/core/cpu.h"
 
+typedef enum {
+    HEX_VER_NONE = 0x00,
+    HEX_VER_V5 = 0x04,
+    HEX_VER_V55 = 0x05,
+    HEX_VER_V60 = 0x60,
+    HEX_VER_V61 = 0x61,
+    HEX_VER_V62 = 0x62,
+    HEX_VER_V65 = 0x65,
+    HEX_VER_V66 = 0x66,
+    HEX_VER_V67 = 0x67,
+    HEX_VER_V68 = 0x68,
+    HEX_VER_V69 = 0x69,
+    HEX_VER_V71 = 0x71,
+    HEX_VER_V73 = 0x73,
+    HEX_VER_ANY = 0xff,
+} HexagonVersion;
+
 #define TYPE_HEXAGON_CPU "hexagon-cpu"
 
 #define HEXAGON_CPU_TYPE_SUFFIX "-" TYPE_HEXAGON_CPU
 #define HEXAGON_CPU_TYPE_NAME(name) (name HEXAGON_CPU_TYPE_SUFFIX)
 
+#define TYPE_HEXAGON_CPU_V5 HEXAGON_CPU_TYPE_NAME("v5")
+#define TYPE_HEXAGON_CPU_V55 HEXAGON_CPU_TYPE_NAME("v55")
+#define TYPE_HEXAGON_CPU_V60 HEXAGON_CPU_TYPE_NAME("v60")
+#define TYPE_HEXAGON_CPU_V61 HEXAGON_CPU_TYPE_NAME("v61")
+#define TYPE_HEXAGON_CPU_V62 HEXAGON_CPU_TYPE_NAME("v62")
+#define TYPE_HEXAGON_CPU_V65 HEXAGON_CPU_TYPE_NAME("v65")
 #define TYPE_HEXAGON_CPU_V66 HEXAGON_CPU_TYPE_NAME("v66")
 #define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67")
 #define TYPE_HEXAGON_CPU_V68 HEXAGON_CPU_TYPE_NAME("v68")
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index 85afd59277..2b8e761c4d 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -117,6 +117,8 @@ typedef struct HexagonCPUClass {
 
     DeviceRealize parent_realize;
     ResettablePhases parent_phases;
+
+    HexagonVersion hex_version;
 } HexagonCPUClass;
 
 struct ArchCPU {
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 58a22ee41f..09a0de3c2f 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -27,12 +27,22 @@
 #include "exec/gdbstub.h"
 #include "accel/tcg/cpu-ops.h"
 
-static void hexagon_v66_cpu_init(Object *obj) { }
-static void hexagon_v67_cpu_init(Object *obj) { }
-static void hexagon_v68_cpu_init(Object *obj) { }
-static void hexagon_v69_cpu_init(Object *obj) { }
-static void hexagon_v71_cpu_init(Object *obj) { }
-static void hexagon_v73_cpu_init(Object *obj) { }
+#define HEX_CPU_INIT(NAME, VER) \
+static void hexagon_##NAME##_cpu_init(Object *obj) \
+{ HEXAGON_CPU_GET_CLASS(obj)->hex_version = VER; }
+
+HEX_CPU_INIT(v5, HEX_VER_V5)
+HEX_CPU_INIT(v55, HEX_VER_V55)
+HEX_CPU_INIT(v60, HEX_VER_V60)
+HEX_CPU_INIT(v61, HEX_VER_V61)
+HEX_CPU_INIT(v62, HEX_VER_V62)
+HEX_CPU_INIT(v65, HEX_VER_V65)
+HEX_CPU_INIT(v66, HEX_VER_V66)
+HEX_CPU_INIT(v67, HEX_VER_V67)
+HEX_CPU_INIT(v68, HEX_VER_V68)
+HEX_CPU_INIT(v69, HEX_VER_V69)
+HEX_CPU_INIT(v71, HEX_VER_V71)
+HEX_CPU_INIT(v73, HEX_VER_V73)
 
 static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
 {
@@ -395,6 +405,12 @@ static const TypeInfo hexagon_cpu_type_infos[] = {
         .class_size = sizeof(HexagonCPUClass),
         .class_init = hexagon_cpu_class_init,
     },
+    DEFINE_CPU(TYPE_HEXAGON_CPU_V5,               hexagon_v5_cpu_init),
+    DEFINE_CPU(TYPE_HEXAGON_CPU_V55,              hexagon_v55_cpu_init),
+    DEFINE_CPU(TYPE_HEXAGON_CPU_V60,              hexagon_v60_cpu_init),
+    DEFINE_CPU(TYPE_HEXAGON_CPU_V61,              hexagon_v61_cpu_init),
+    DEFINE_CPU(TYPE_HEXAGON_CPU_V62,              hexagon_v62_cpu_init),
+    DEFINE_CPU(TYPE_HEXAGON_CPU_V65,              hexagon_v65_cpu_init),
     DEFINE_CPU(TYPE_HEXAGON_CPU_V66,              hexagon_v66_cpu_init),
     DEFINE_CPU(TYPE_HEXAGON_CPU_V67,              hexagon_v67_cpu_init),
     DEFINE_CPU(TYPE_HEXAGON_CPU_V68,              hexagon_v68_cpu_init),
-- 
2.43.0

Re: [PATCH v2 1/8] Hexagon (target/hexagon) Properly handle Hexagon CPU version

Posted by Anton Johansson via qemu development 1 month, 3 weeks ago

On 15/02/26, Taylor Simpson wrote:
> Add the following CPU versions that were previously missing
>     v5
>     v55
>     v60
>     v61
>     v62
>     v65
> 
> Create an enum with the known Hexagon CPU versions
> Add a field to HexagonCPUClass to note the Hexagon CPU version
> 
> Co-authored-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
> Co-authored-by: Brian Cain <brian.cain@oss.qualcomm.com>
> Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
> ---
>  target/hexagon/cpu-qom.h | 23 +++++++++++++++++++++++
>  target/hexagon/cpu.h     |  2 ++
>  target/hexagon/cpu.c     | 28 ++++++++++++++++++++++------
>  3 files changed, 47 insertions(+), 6 deletions(-)
> 
> diff --git a/target/hexagon/cpu-qom.h b/target/hexagon/cpu-qom.h
> index 0b149bd5fe..d2f98c683a 100644
> --- a/target/hexagon/cpu-qom.h
> +++ b/target/hexagon/cpu-qom.h
> @@ -11,11 +11,34 @@
>  
>  #include "hw/core/cpu.h"
>  
> +typedef enum {
> +    HEX_VER_NONE = 0x00,
> +    HEX_VER_V5 = 0x04,
> +    HEX_VER_V55 = 0x05,
> +    HEX_VER_V60 = 0x60,
> +    HEX_VER_V61 = 0x61,
> +    HEX_VER_V62 = 0x62,
> +    HEX_VER_V65 = 0x65,
> +    HEX_VER_V66 = 0x66,
> +    HEX_VER_V67 = 0x67,
> +    HEX_VER_V68 = 0x68,
> +    HEX_VER_V69 = 0x69,
> +    HEX_VER_V71 = 0x71,
> +    HEX_VER_V73 = 0x73,
> +    HEX_VER_ANY = 0xff,
> +} HexagonVersion;
> +
>  #define TYPE_HEXAGON_CPU "hexagon-cpu"
>  
>  #define HEXAGON_CPU_TYPE_SUFFIX "-" TYPE_HEXAGON_CPU
>  #define HEXAGON_CPU_TYPE_NAME(name) (name HEXAGON_CPU_TYPE_SUFFIX)
>  
> +#define TYPE_HEXAGON_CPU_V5 HEXAGON_CPU_TYPE_NAME("v5")
> +#define TYPE_HEXAGON_CPU_V55 HEXAGON_CPU_TYPE_NAME("v55")
> +#define TYPE_HEXAGON_CPU_V60 HEXAGON_CPU_TYPE_NAME("v60")
> +#define TYPE_HEXAGON_CPU_V61 HEXAGON_CPU_TYPE_NAME("v61")
> +#define TYPE_HEXAGON_CPU_V62 HEXAGON_CPU_TYPE_NAME("v62")
> +#define TYPE_HEXAGON_CPU_V65 HEXAGON_CPU_TYPE_NAME("v65")
>  #define TYPE_HEXAGON_CPU_V66 HEXAGON_CPU_TYPE_NAME("v66")
>  #define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67")
>  #define TYPE_HEXAGON_CPU_V68 HEXAGON_CPU_TYPE_NAME("v68")
> diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
> index 85afd59277..2b8e761c4d 100644
> --- a/target/hexagon/cpu.h
> +++ b/target/hexagon/cpu.h
> @@ -117,6 +117,8 @@ typedef struct HexagonCPUClass {
>  
>      DeviceRealize parent_realize;
>      ResettablePhases parent_phases;
> +
> +    HexagonVersion hex_version;
>  } HexagonCPUClass;
>  
>  struct ArchCPU {
> diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
> index 58a22ee41f..09a0de3c2f 100644
> --- a/target/hexagon/cpu.c
> +++ b/target/hexagon/cpu.c
> @@ -27,12 +27,22 @@
>  #include "exec/gdbstub.h"
>  #include "accel/tcg/cpu-ops.h"
>  
> -static void hexagon_v66_cpu_init(Object *obj) { }
> -static void hexagon_v67_cpu_init(Object *obj) { }
> -static void hexagon_v68_cpu_init(Object *obj) { }
> -static void hexagon_v69_cpu_init(Object *obj) { }
> -static void hexagon_v71_cpu_init(Object *obj) { }
> -static void hexagon_v73_cpu_init(Object *obj) { }
> +#define HEX_CPU_INIT(NAME, VER) \
> +static void hexagon_##NAME##_cpu_init(Object *obj) \
> +{ HEXAGON_CPU_GET_CLASS(obj)->hex_version = VER; }
> +
> +HEX_CPU_INIT(v5, HEX_VER_V5)
> +HEX_CPU_INIT(v55, HEX_VER_V55)
> +HEX_CPU_INIT(v60, HEX_VER_V60)
> +HEX_CPU_INIT(v61, HEX_VER_V61)
> +HEX_CPU_INIT(v62, HEX_VER_V62)
> +HEX_CPU_INIT(v65, HEX_VER_V65)
> +HEX_CPU_INIT(v66, HEX_VER_V66)
> +HEX_CPU_INIT(v67, HEX_VER_V67)
> +HEX_CPU_INIT(v68, HEX_VER_V68)
> +HEX_CPU_INIT(v69, HEX_VER_V69)
> +HEX_CPU_INIT(v71, HEX_VER_V71)
> +HEX_CPU_INIT(v73, HEX_VER_V73)
>  
>  static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
>  {
> @@ -395,6 +405,12 @@ static const TypeInfo hexagon_cpu_type_infos[] = {
>          .class_size = sizeof(HexagonCPUClass),
>          .class_init = hexagon_cpu_class_init,
>      },
> +    DEFINE_CPU(TYPE_HEXAGON_CPU_V5,               hexagon_v5_cpu_init),
> +    DEFINE_CPU(TYPE_HEXAGON_CPU_V55,              hexagon_v55_cpu_init),
> +    DEFINE_CPU(TYPE_HEXAGON_CPU_V60,              hexagon_v60_cpu_init),
> +    DEFINE_CPU(TYPE_HEXAGON_CPU_V61,              hexagon_v61_cpu_init),
> +    DEFINE_CPU(TYPE_HEXAGON_CPU_V62,              hexagon_v62_cpu_init),
> +    DEFINE_CPU(TYPE_HEXAGON_CPU_V65,              hexagon_v65_cpu_init),
>      DEFINE_CPU(TYPE_HEXAGON_CPU_V66,              hexagon_v66_cpu_init),
>      DEFINE_CPU(TYPE_HEXAGON_CPU_V67,              hexagon_v67_cpu_init),
>      DEFINE_CPU(TYPE_HEXAGON_CPU_V68,              hexagon_v68_cpu_init),
> -- 
> 2.43.0
> 

Hi,

IMO adding a HexagonCPUDef struct and using TypeInfo::class_data,
similar to RISCV/SPARC, is a neater approach and easier to extend
if you plan to add more model-specific configuration options at
some point.  So something like

  /* cpu.h */

  struct HexagonCPUDef {
      HexagonVersion version;
  };

  struct HexagonCPUClass {
      ...
      const HexagonCPUDef *def;
  };

  /* cpu.c */

  static void hexagon_cpu_class_base_init(ObjectClass *c, const void *data)
  {
      HexagonCPUClass *mcc = HEXAGON_CPU_CLASS(c);
      /* Make sure all CPU models define a HexagonCPUDef */
      g_assert(!object_class_is_abstract(c) && data != NULL);
      if (data) {
  	  mcc->def = data;
      }
  }
  
  #define DEFINE_CPU(type_name, version)         \
      {                                          \
          .name = type_name,                     \
          .parent = TYPE_HEXAGON_CPU,            \
  	  .class_data = &(const HexagonCPUDef) { \
  	      .version = version,                \
  	  },                                     \
      }
  
  static const TypeInfo hexagon_cpu_type_infos[] = {
      {
          .name = TYPE_HEXAGON_CPU,
          .parent = TYPE_CPU,
          .instance_size = sizeof(HexagonCPU),
          .instance_align = __alignof(HexagonCPU),
          .instance_init = hexagon_cpu_init,
          .abstract = true,
          .class_size = sizeof(HexagonCPUClass),
          .class_init = hexagon_cpu_class_init,
  	  .class_base_init = hexagon_cpu_class_base_init,
      },
      DEFINE_CPU(TYPE_HEXAGON_CPU_V5,               HEX_VER_V5),
      DEFINE_CPU(TYPE_HEXAGON_CPU_V55,              HEX_VER_V55),
      ...
  };

and this way you don't need the HEX_CPU_INIT() macros.

-- 
Anton Johansson
rev.ng Labs Srl.

Re: [PATCH v2 1/8] Hexagon (target/hexagon) Properly handle Hexagon CPU version

Posted by Taylor Simpson 1 month, 3 weeks ago

On Mon, Feb 16, 2026 at 8:01 AM Anton Johansson <anjo@rev.ng> wrote:

> On 15/02/26, Taylor Simpson wrote:
> > Add the following CPU versions that were previously missing
> >     v5
> >     v55
> >     v60
> >     v61
> >     v62
> >     v65
> >
> > Create an enum with the known Hexagon CPU versions
> > Add a field to HexagonCPUClass to note the Hexagon CPU version
> >
> > Co-authored-by: Matheus Tavares Bernardino <
> matheus.bernardino@oss.qualcomm.com>
> > Co-authored-by: Brian Cain <brian.cain@oss.qualcomm.com>
> > Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
> > ---
> >  target/hexagon/cpu-qom.h | 23 +++++++++++++++++++++++
> >  target/hexagon/cpu.h     |  2 ++
> >  target/hexagon/cpu.c     | 28 ++++++++++++++++++++++------
> >  3 files changed, 47 insertions(+), 6 deletions(-)
> >
> > diff --git a/target/hexagon/cpu-qom.h b/target/hexagon/cpu-qom.h
> > index 0b149bd5fe..d2f98c683a 100644
> > --- a/target/hexagon/cpu-qom.h
> > +++ b/target/hexagon/cpu-qom.h
> > @@ -11,11 +11,34 @@
> >
> >  #include "hw/core/cpu.h"
> >
> > +typedef enum {
> > +    HEX_VER_NONE = 0x00,
> > +    HEX_VER_V5 = 0x04,
> > +    HEX_VER_V55 = 0x05,
> > +    HEX_VER_V60 = 0x60,
> > +    HEX_VER_V61 = 0x61,
> > +    HEX_VER_V62 = 0x62,
> > +    HEX_VER_V65 = 0x65,
> > +    HEX_VER_V66 = 0x66,
> > +    HEX_VER_V67 = 0x67,
> > +    HEX_VER_V68 = 0x68,
> > +    HEX_VER_V69 = 0x69,
> > +    HEX_VER_V71 = 0x71,
> > +    HEX_VER_V73 = 0x73,
> > +    HEX_VER_ANY = 0xff,
> > +} HexagonVersion;
> > +
> >  #define TYPE_HEXAGON_CPU "hexagon-cpu"
> >
> >  #define HEXAGON_CPU_TYPE_SUFFIX "-" TYPE_HEXAGON_CPU
> >  #define HEXAGON_CPU_TYPE_NAME(name) (name HEXAGON_CPU_TYPE_SUFFIX)
> >
> > +#define TYPE_HEXAGON_CPU_V5 HEXAGON_CPU_TYPE_NAME("v5")
> > +#define TYPE_HEXAGON_CPU_V55 HEXAGON_CPU_TYPE_NAME("v55")
> > +#define TYPE_HEXAGON_CPU_V60 HEXAGON_CPU_TYPE_NAME("v60")
> > +#define TYPE_HEXAGON_CPU_V61 HEXAGON_CPU_TYPE_NAME("v61")
> > +#define TYPE_HEXAGON_CPU_V62 HEXAGON_CPU_TYPE_NAME("v62")
> > +#define TYPE_HEXAGON_CPU_V65 HEXAGON_CPU_TYPE_NAME("v65")
> >  #define TYPE_HEXAGON_CPU_V66 HEXAGON_CPU_TYPE_NAME("v66")
> >  #define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67")
> >  #define TYPE_HEXAGON_CPU_V68 HEXAGON_CPU_TYPE_NAME("v68")
> > diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
> > index 85afd59277..2b8e761c4d 100644
> > --- a/target/hexagon/cpu.h
> > +++ b/target/hexagon/cpu.h
> > @@ -117,6 +117,8 @@ typedef struct HexagonCPUClass {
> >
> >      DeviceRealize parent_realize;
> >      ResettablePhases parent_phases;
> > +
> > +    HexagonVersion hex_version;
> >  } HexagonCPUClass;
> >
> >  struct ArchCPU {
> > diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
> > index 58a22ee41f..09a0de3c2f 100644
> > --- a/target/hexagon/cpu.c
> > +++ b/target/hexagon/cpu.c
> > @@ -27,12 +27,22 @@
> >  #include "exec/gdbstub.h"
> >  #include "accel/tcg/cpu-ops.h"
> >
> > -static void hexagon_v66_cpu_init(Object *obj) { }
> > -static void hexagon_v67_cpu_init(Object *obj) { }
> > -static void hexagon_v68_cpu_init(Object *obj) { }
> > -static void hexagon_v69_cpu_init(Object *obj) { }
> > -static void hexagon_v71_cpu_init(Object *obj) { }
> > -static void hexagon_v73_cpu_init(Object *obj) { }
> > +#define HEX_CPU_INIT(NAME, VER) \
> > +static void hexagon_##NAME##_cpu_init(Object *obj) \
> > +{ HEXAGON_CPU_GET_CLASS(obj)->hex_version = VER; }
> > +
> > +HEX_CPU_INIT(v5, HEX_VER_V5)
> > +HEX_CPU_INIT(v55, HEX_VER_V55)
> > +HEX_CPU_INIT(v60, HEX_VER_V60)
> > +HEX_CPU_INIT(v61, HEX_VER_V61)
> > +HEX_CPU_INIT(v62, HEX_VER_V62)
> > +HEX_CPU_INIT(v65, HEX_VER_V65)
> > +HEX_CPU_INIT(v66, HEX_VER_V66)
> > +HEX_CPU_INIT(v67, HEX_VER_V67)
> > +HEX_CPU_INIT(v68, HEX_VER_V68)
> > +HEX_CPU_INIT(v69, HEX_VER_V69)
> > +HEX_CPU_INIT(v71, HEX_VER_V71)
> > +HEX_CPU_INIT(v73, HEX_VER_V73)
> >
> >  static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
> >  {
> > @@ -395,6 +405,12 @@ static const TypeInfo hexagon_cpu_type_infos[] = {
> >          .class_size = sizeof(HexagonCPUClass),
> >          .class_init = hexagon_cpu_class_init,
> >      },
> > +    DEFINE_CPU(TYPE_HEXAGON_CPU_V5,               hexagon_v5_cpu_init),
> > +    DEFINE_CPU(TYPE_HEXAGON_CPU_V55,              hexagon_v55_cpu_init),
> > +    DEFINE_CPU(TYPE_HEXAGON_CPU_V60,              hexagon_v60_cpu_init),
> > +    DEFINE_CPU(TYPE_HEXAGON_CPU_V61,              hexagon_v61_cpu_init),
> > +    DEFINE_CPU(TYPE_HEXAGON_CPU_V62,              hexagon_v62_cpu_init),
> > +    DEFINE_CPU(TYPE_HEXAGON_CPU_V65,              hexagon_v65_cpu_init),
> >      DEFINE_CPU(TYPE_HEXAGON_CPU_V66,              hexagon_v66_cpu_init),
> >      DEFINE_CPU(TYPE_HEXAGON_CPU_V67,              hexagon_v67_cpu_init),
> >      DEFINE_CPU(TYPE_HEXAGON_CPU_V68,              hexagon_v68_cpu_init),
> > --
> > 2.43.0
> >
>
> Hi,
>
> IMO adding a HexagonCPUDef struct and using TypeInfo::class_data,
> similar to RISCV/SPARC, is a neater approach and easier to extend
> if you plan to add more model-specific configuration options at
> some point.  So something like
>
>   /* cpu.h */
>
>   struct HexagonCPUDef {
>       HexagonVersion version;
>   };
>
>   struct HexagonCPUClass {
>       ...
>       const HexagonCPUDef *def;
>   };
>
>   /* cpu.c */
>
>   static void hexagon_cpu_class_base_init(ObjectClass *c, const void *data)
>   {
>       HexagonCPUClass *mcc = HEXAGON_CPU_CLASS(c);
>       /* Make sure all CPU models define a HexagonCPUDef */
>       g_assert(!object_class_is_abstract(c) && data != NULL);
>       if (data) {
>

Don't need this check given the assert above.


>           mcc->def = data;
>       }
>   }
>
>   #define DEFINE_CPU(type_name, version)         \
>       {                                          \
>           .name = type_name,                     \
>           .parent = TYPE_HEXAGON_CPU,            \
>           .class_data = &(const HexagonCPUDef) { \
>               .version = version,                \
>           },                                     \
>       }
>
>   static const TypeInfo hexagon_cpu_type_infos[] = {
>       {
>           .name = TYPE_HEXAGON_CPU,
>           .parent = TYPE_CPU,
>           .instance_size = sizeof(HexagonCPU),
>           .instance_align = __alignof(HexagonCPU),
>           .instance_init = hexagon_cpu_init,
>           .abstract = true,
>           .class_size = sizeof(HexagonCPUClass),
>           .class_init = hexagon_cpu_class_init,
>           .class_base_init = hexagon_cpu_class_base_init,
>       },
>       DEFINE_CPU(TYPE_HEXAGON_CPU_V5,               HEX_VER_V5),
>       DEFINE_CPU(TYPE_HEXAGON_CPU_V55,              HEX_VER_V55),
>       ...
>   };
>
> and this way you don't need the HEX_CPU_INIT() macros.
>
> --
> Anton Johansson
> rev.ng Labs Srl.
>

Thanks, that makes sense.  I will make the change.

In addition, we should use "const HexagonCPUDef *" instead of
HexagonVersion in DisasContext and pass it to the various functions that
need it.

Taylor

[PATCH v2 1/8] Hexagon (target/hexagon) Properly handle Hexagon CPU version
[PATCH v2 2/8] Hexagon (linux-user/hexagon) Identify Hexagon version in ELF file
[PATCH v2 3/8] Hexagon (target/hexagon) Add Hexagon version field to DisasContext
[PATCH v2 5/8] Hexagon (target/hexagon) Check each opcode against current CPU version
[PATCH v2 7/8] tests/tcg/hexagon: Add test for revision-gated instruction decoding
[PATCH v2 8/8] Hexagon (target/hexagon) Remove snprint_a_pkt_debug