Hi; the bulk of this arm pullreq is Shameer's SMMUv3 acceleration
series; there are a few other minor items in here also.

thanks
-- PMM

The following changes since commit 65fb9de4888f9bf32bc4f60c880da3dff04c4fd9:

  Merge tag 'pr-build_fix-20260128' of https://gitlab.com/pbo-linaro/qemu into staging (2026-01-29 13:29:33 +1100)

are available in the Git repository at:

  https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20260129

for you to fetch changes up to 5252c077467a5570bf3b6b6278d206c46f51f9b8:

  arm: add DCZID_EL0 to idregs array (2026-01-29 13:45:39 +0000)

----------------------------------------------------------------
target-arm queue:
 * Support SMMUv3 acceleration
 * A few other minor cleanups and fixes

----------------------------------------------------------------
Alex Bennée (2):
      MAINTAINERS: add emulation.rst to ARM TCG CPUs
      docs/system: update FEAT_BBML[12] references

Cornelia Huck (2):
      arm: add {get,set}_dczid_bs helpers
      arm: add DCZID_EL0 to idregs array

Eric Auger (2):
      hw/pci-host/gpex: Allow to generate preserve boot config DSM #5
      hw/arm/virt-acpi-build: Add IORT RMR regions to handle MSI nested binding

Nicolin Chen (4):
      backends/iommufd: Introduce iommufd_backend_alloc_viommu
      backends/iommufd: Introduce iommufd_backend_alloc_vdev
      hw/arm/smmuv3-accel: Add set/unset_iommu_device callback
      hw/arm/smmuv3-accel: Add nested vSTE install/uninstall support

Philippe Mathieu-Daudé (2):
      target/arm/hvf: Move hvf_sysreg_[read, write]_cp() functions around
      target/arm/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0

Shameer Kolothum (31):
      hw/arm/smmu-common: Factor out common helper functions and export
      hw/arm/smmu-common: Make iommu ops part of SMMUState
      hw/arm/smmuv3-accel: Introduce smmuv3 accel device
      hw/arm/smmuv3-accel: Initialize shared system address space
      hw/pci/pci: Move pci_init_bus_master() after adding device to bus
      hw/pci/pci: Add optional supports_address_space() callback
      hw/pci-bridge/pci_expander_bridge: Move TYPE_PXB_PCIE_DEV to header
      hw/arm/smmuv3-accel: Restrict accelerated SMMUv3 to vfio-pci endpoints with iommufd
      hw/arm/smmuv3: Implement get_viommu_cap() callback
      hw/arm/smmuv3: propagate smmuv3_cmdq_consume() errors to caller
      hw/arm/smmuv3-accel: Install SMMUv3 GBPA based hwpt
      hw/pci/pci: Introduce a callback to retrieve the MSI doorbell GPA directly
      hw/arm/smmuv3-accel: Implement get_msi_direct_gpa callback
      hw/arm/virt: Set msi-gpa property
      hw/arm/smmuv3-accel: Add support to issue invalidation cmd to host
      hw/arm/smmuv3: Initialize ID registers early during realize()
      hw/arm/smmuv3-accel: Get host SMMUv3 hw info and validate
      hw/arm/virt: Set PCI preserve_config for accel SMMUv3
      tests/qtest/bios-tables-test: Prepare for IORT revison upgrade
      tests/qtest/bios-tables-test: Update IORT blobs after revision upgrade
      hw/arm/smmuv3: Block migration when accel is enabled
      hw/arm/smmuv3: Add accel property for SMMUv3 device
      hw/arm/smmuv3-accel: Add a property to specify RIL support
      hw/arm/smmuv3-accel: Add support for ATS
      hw/arm/smmuv3-accel: Add property to specify OAS bits
      backends/iommufd: Retrieve PASID width from iommufd_backend_get_device_info()
      backends/iommufd: Add get_pasid_info() callback
      hw/pci: Add helper to insert PCIe extended capability at a fixed offset
      hw/pci: Factor out common PASID capability initialization
      hw/vfio/pci: Synthesize PASID capability for vfio-pci devices
      hw/arm/smmuv3-accel: Make SubstreamID support configurable

 MAINTAINERS                                     |   1 +
 backends/iommufd.c                              |  76 ++-
 backends/trace-events                           |   2 +
 docs/system/arm/emulation.rst                   |   3 +-
 hw/arm/Kconfig                                  |   5 +
 hw/arm/meson.build                              |   3 +-
 hw/arm/smmu-common.c                            |  51 +-
 hw/arm/smmuv3-accel.c                           | 768 ++++++++++++++++++++++++
 hw/arm/smmuv3-accel.h                           |  88 +++
 hw/arm/smmuv3-internal.h                        |   1 +
 hw/arm/smmuv3.c                                 | 227 +++++--
 hw/arm/trace-events                             |   6 +
 hw/arm/virt-acpi-build.c                        | 131 +++-
 hw/arm/virt.c                                   |  39 +-
 hw/pci-bridge/pci_expander_bridge.c             |   1 -
 hw/pci-host/gpex-acpi.c                         |  29 +-
 hw/pci/pci.c                                    |  43 +-
 hw/pci/pcie.c                                   |  88 ++-
 hw/vfio/iommufd.c                               |   6 +-
 hw/vfio/pci.c                                   |  75 +++
 hw/vfio/pci.h                                   |   1 +
 hw/vfio/trace-events                            |   1 +
 include/hw/arm/smmu-common.h                    |   7 +
 include/hw/arm/smmuv3-common.h                  |  27 +-
 include/hw/arm/smmuv3.h                         |  10 +
 include/hw/arm/virt.h                           |   1 +
 include/hw/core/iommu.h                         |   1 +
 include/hw/pci-host/gpex.h                      |   1 +
 include/hw/pci/pci.h                            |  36 ++
 include/hw/pci/pci_bridge.h                     |   1 +
 include/hw/pci/pcie.h                           |   4 +
 include/system/host_iommu_device.h              |  20 +
 include/system/iommufd.h                        |  29 +-
 target/arm/cpu-sysregs.h.inc                    |   1 +
 target/arm/cpu.c                                |   2 +-
 target/arm/cpu.h                                |  14 +-
 target/arm/cpu64.c                              |   4 +-
 target/arm/helper.c                             |   5 +-
 target/arm/hvf/hvf.c                            | 167 +++---
 target/arm/kvm.c                                |  18 +-
 target/arm/tcg/cpu64.c                          |  22 +-
 target/arm/tcg/helper-a64.c                     |   2 +-
 target/arm/tcg/mte_helper.c                     |   4 +-
 target/arm/tcg/translate-a64.c                  |   2 +-
 target/arm/tcg/translate.h                      |   2 +-
 tests/data/acpi/aarch64/virt/IORT               | Bin 128 -> 128 bytes
 tests/data/acpi/aarch64/virt/IORT.its_off       | Bin 172 -> 172 bytes
 tests/data/acpi/aarch64/virt/IORT.smmuv3-dev    | Bin 364 -> 364 bytes
 tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy | Bin 276 -> 276 bytes
 49 files changed, 1829 insertions(+), 196 deletions(-)
 create mode 100644 hw/arm/smmuv3-accel.c
 create mode 100644 hw/arm/smmuv3-accel.h

On 1/30/26 02:08, Peter Maydell wrote:
> Hi; the bulk of this arm pullreq is Shameer's SMMUv3 acceleration
> series; there are a few other minor items in here also.
> 
> thanks
> -- PMM
> 
> The following changes since commit 65fb9de4888f9bf32bc4f60c880da3dff04c4fd9:
> 
>    Merge tag 'pr-build_fix-20260128' ofhttps://gitlab.com/pbo-linaro/qemu into staging (2026-01-29 13:29:33 +1100)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20260129
> 
> for you to fetch changes up to 5252c077467a5570bf3b6b6278d206c46f51f9b8:
> 
>    arm: add DCZID_EL0 to idregs array (2026-01-29 13:45:39 +0000)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * Support SMMUv3 acceleration
>   * A few other minor cleanups and fixes

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/11.0 as appropriate.

r~