On Tue, Dec 23, 2025 at 5:42 PM Kane Chen <kane_chen@aspeedtech.com> wrote:
>
> From: Kane-Chen-AS <kane_chen@aspeedtech.com>
>
> Connect the SCU device to AST1700 model.
>
> Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
> Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>
> ---
> include/hw/arm/aspeed_ast1700.h | 3 +++
> hw/arm/aspeed_ast1700.c | 17 +++++++++++++++++
> hw/arm/aspeed_ast27x0.c | 2 ++
> 3 files changed, 22 insertions(+)
>
> diff --git a/include/hw/arm/aspeed_ast1700.h b/include/hw/arm/aspeed_ast1700.h
> index 0c1216c4ba..12c57145c6 100644
> --- a/include/hw/arm/aspeed_ast1700.h
> +++ b/include/hw/arm/aspeed_ast1700.h
> @@ -9,6 +9,7 @@
> #define ASPEED_AST1700_H
>
> #include "hw/sysbus.h"
> +#include "hw/misc/aspeed_scu.h"
> #include "hw/adc/aspeed_adc.h"
> #include "hw/misc/aspeed_ltpi.h"
> #include "hw/ssi/aspeed_smc.h"
> @@ -23,12 +24,14 @@ struct AspeedAST1700SoCState {
>
> MemoryRegion iomem;
> uint8_t board_idx;
> + uint32_t silicon_rev;
>
> AspeedLTPIState ltpi;
> SerialMM uart;
> MemoryRegion sram;
> AspeedSMCState spi;
> AspeedADCState adc;
> + AspeedSCUState scu;
> };
>
> #endif /* ASPEED_AST1700_H */
> diff --git a/hw/arm/aspeed_ast1700.c b/hw/arm/aspeed_ast1700.c
> index e4d206045f..6494a5c4eb 100644
> --- a/hw/arm/aspeed_ast1700.c
> +++ b/hw/arm/aspeed_ast1700.c
> @@ -20,6 +20,7 @@ enum {
> ASPEED_AST1700_DEV_SPI0,
> ASPEED_AST1700_DEV_SRAM,
> ASPEED_AST1700_DEV_ADC,
> + ASPEED_AST1700_DEV_SCU,
> ASPEED_AST1700_DEV_UART12,
> ASPEED_AST1700_DEV_LTPI_CTRL,
> ASPEED_AST1700_DEV_SPI0_MEM,
> @@ -29,6 +30,7 @@ static const hwaddr aspeed_ast1700_io_memmap[] = {
> [ASPEED_AST1700_DEV_SPI0] = 0x00030000,
> [ASPEED_AST1700_DEV_SRAM] = 0x00BC0000,
> [ASPEED_AST1700_DEV_ADC] = 0x00C00000,
> + [ASPEED_AST1700_DEV_SCU] = 0x00C02000,
> [ASPEED_AST1700_DEV_UART12] = 0x00C33B00,
> [ASPEED_AST1700_DEV_LTPI_CTRL] = 0x00C34000,
> [ASPEED_AST1700_DEV_SPI0_MEM] = 0x04000000,
> @@ -86,6 +88,16 @@ static void aspeed_ast1700_realize(DeviceState *dev, Error **errp)
> aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_ADC],
> sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->adc), 0));
>
> + /* SCU */
> + qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev",
> + s->silicon_rev);
> + if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
> + return;
> + }
> + memory_region_add_subregion(&s->iomem,
> + aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_SCU],
> + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->scu), 0));
> +
> /* LTPI controller */
> if (!sysbus_realize(SYS_BUS_DEVICE(&s->ltpi), errp)) {
> return;
> @@ -111,6 +123,10 @@ static void aspeed_ast1700_instance_init(Object *obj)
> object_initialize_child(obj, "ioexp-adc[*]", &s->adc,
> "aspeed.adc-ast2700");
>
> + /* SCU */
> + object_initialize_child(obj, "ioexp-scu[*]", &s->scu,
> + TYPE_ASPEED_2700_SCU);
> +
> /* LTPI controller */
> object_initialize_child(obj, "ltpi-ctrl",
> &s->ltpi, TYPE_ASPEED_LTPI);
> @@ -120,6 +136,7 @@ static void aspeed_ast1700_instance_init(Object *obj)
>
> static const Property aspeed_ast1700_props[] = {
> DEFINE_PROP_UINT8("board-idx", AspeedAST1700SoCState, board_idx, 0),
> + DEFINE_PROP_UINT32("silicon-rev", AspeedAST1700SoCState, silicon_rev, 0),
> };
>
> static void aspeed_ast1700_class_init(ObjectClass *klass, const void *data)
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index 84ff8b5557..6b9ad328dc 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -573,6 +573,8 @@ static void aspeed_soc_ast2700_init(Object *obj)
> /* AST1700 IOEXP */
> object_initialize_child(obj, "ioexp[*]", &s->ioexp[i],
> TYPE_ASPEED_AST1700);
> + qdev_prop_set_uint32(DEVICE(&s->ioexp[i]), "silicon-rev",
> + sc->silicon_rev);
> }
>
> object_initialize_child(obj, "dpmcu", &s->dpmcu,
> --
> 2.43.0
>