From: Philippe Mathieu-Daudé <philmd@linaro.org>
s390_store_status() is only called within sigp.c,
move it and the SigpSaveArea structure definition
there where it belongs, with other SIGP handling
code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20251002091132.65703-9-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
target/s390x/s390x-internal.h | 2 --
target/s390x/helper.c | 67 ----------------------------------
target/s390x/sigp.c | 68 +++++++++++++++++++++++++++++++++++
3 files changed, 68 insertions(+), 69 deletions(-)
diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h
index a49dca94a75..9691366ec91 100644
--- a/target/s390x/s390x-internal.h
+++ b/target/s390x/s390x-internal.h
@@ -323,8 +323,6 @@ void s390x_cpu_timer(void *opaque);
void s390_handle_wait(S390CPU *cpu);
hwaddr s390_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
hwaddr s390_cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr);
-#define S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area)
-int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch);
LowCore *cpu_map_lowcore(CPUS390XState *env);
void cpu_unmap_lowcore(CPUS390XState *env, LowCore *lowcore);
#endif /* CONFIG_USER_ONLY */
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index 84321e1d68e..184428c6d9d 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -24,7 +24,6 @@
#include "gdbstub/helpers.h"
#include "qemu/timer.h"
#include "hw/s390x/ioinst.h"
-#include "target/s390x/kvm/pv.h"
#include "system/hw_accel.h"
#include "system/memory.h"
#include "system/runstate.h"
@@ -182,69 +181,3 @@ void s390_cpu_recompute_watchpoints(CPUState *cs)
wp_flags, NULL);
}
}
-
-typedef struct SigpSaveArea {
- uint64_t fprs[16]; /* 0x0000 */
- uint64_t grs[16]; /* 0x0080 */
- PSW psw; /* 0x0100 */
- uint8_t pad_0x0110[0x0118 - 0x0110]; /* 0x0110 */
- uint32_t prefix; /* 0x0118 */
- uint32_t fpc; /* 0x011c */
- uint8_t pad_0x0120[0x0124 - 0x0120]; /* 0x0120 */
- uint32_t todpr; /* 0x0124 */
- uint64_t cputm; /* 0x0128 */
- uint64_t ckc; /* 0x0130 */
- uint8_t pad_0x0138[0x0140 - 0x0138]; /* 0x0138 */
- uint32_t ars[16]; /* 0x0140 */
- uint64_t crs[16]; /* 0x0384 */
-} SigpSaveArea;
-QEMU_BUILD_BUG_ON(sizeof(SigpSaveArea) != 512);
-
-int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch)
-{
- static const uint8_t ar_id = 1;
- SigpSaveArea *sa;
- hwaddr len = sizeof(*sa);
- int i;
-
- /* For PVMs storing will occur when this cpu enters SIE again */
- if (s390_is_pv()) {
- return 0;
- }
-
- sa = cpu_physical_memory_map(addr, &len, true);
- if (!sa) {
- return -EFAULT;
- }
- if (len != sizeof(*sa)) {
- cpu_physical_memory_unmap(sa, len, 1, 0);
- return -EFAULT;
- }
-
- if (store_arch) {
- cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1);
- }
- for (i = 0; i < 16; ++i) {
- sa->fprs[i] = cpu_to_be64(*get_freg(&cpu->env, i));
- }
- for (i = 0; i < 16; ++i) {
- sa->grs[i] = cpu_to_be64(cpu->env.regs[i]);
- }
- sa->psw.addr = cpu_to_be64(cpu->env.psw.addr);
- sa->psw.mask = cpu_to_be64(s390_cpu_get_psw_mask(&cpu->env));
- sa->prefix = cpu_to_be32(cpu->env.psa);
- sa->fpc = cpu_to_be32(cpu->env.fpc);
- sa->todpr = cpu_to_be32(cpu->env.todpr);
- sa->cputm = cpu_to_be64(cpu->env.cputm);
- sa->ckc = cpu_to_be64(cpu->env.ckc >> 8);
- for (i = 0; i < 16; ++i) {
- sa->ars[i] = cpu_to_be32(cpu->env.aregs[i]);
- }
- for (i = 0; i < 16; ++i) {
- sa->crs[i] = cpu_to_be64(cpu->env.cregs[i]);
- }
-
- cpu_physical_memory_unmap(sa, len, 1, len);
-
- return 0;
-}
diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c
index 1464be76983..2487acdb49e 100644
--- a/target/s390x/sigp.c
+++ b/target/s390x/sigp.c
@@ -19,6 +19,7 @@
#include "system/tcg.h"
#include "trace.h"
#include "qapi/qapi-types-machine.h"
+#include "target/s390x/kvm/pv.h"
QemuMutex qemu_sigp_mutex;
@@ -126,6 +127,73 @@ static void sigp_stop(CPUState *cs, run_on_cpu_data arg)
si->cc = SIGP_CC_ORDER_CODE_ACCEPTED;
}
+typedef struct SigpSaveArea {
+ uint64_t fprs[16]; /* 0x0000 */
+ uint64_t grs[16]; /* 0x0080 */
+ PSW psw; /* 0x0100 */
+ uint8_t pad_0x0110[0x0118 - 0x0110]; /* 0x0110 */
+ uint32_t prefix; /* 0x0118 */
+ uint32_t fpc; /* 0x011c */
+ uint8_t pad_0x0120[0x0124 - 0x0120]; /* 0x0120 */
+ uint32_t todpr; /* 0x0124 */
+ uint64_t cputm; /* 0x0128 */
+ uint64_t ckc; /* 0x0130 */
+ uint8_t pad_0x0138[0x0140 - 0x0138]; /* 0x0138 */
+ uint32_t ars[16]; /* 0x0140 */
+ uint64_t crs[16]; /* 0x0384 */
+} SigpSaveArea;
+QEMU_BUILD_BUG_ON(sizeof(SigpSaveArea) != 512);
+
+#define S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area)
+static int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch)
+{
+ static const uint8_t ar_id = 1;
+ SigpSaveArea *sa;
+ hwaddr len = sizeof(*sa);
+ int i;
+
+ /* For PVMs storing will occur when this cpu enters SIE again */
+ if (s390_is_pv()) {
+ return 0;
+ }
+
+ sa = cpu_physical_memory_map(addr, &len, true);
+ if (!sa) {
+ return -EFAULT;
+ }
+ if (len != sizeof(*sa)) {
+ cpu_physical_memory_unmap(sa, len, 1, 0);
+ return -EFAULT;
+ }
+
+ if (store_arch) {
+ cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1);
+ }
+ for (i = 0; i < 16; ++i) {
+ sa->fprs[i] = cpu_to_be64(*get_freg(&cpu->env, i));
+ }
+ for (i = 0; i < 16; ++i) {
+ sa->grs[i] = cpu_to_be64(cpu->env.regs[i]);
+ }
+ sa->psw.addr = cpu_to_be64(cpu->env.psw.addr);
+ sa->psw.mask = cpu_to_be64(s390_cpu_get_psw_mask(&cpu->env));
+ sa->prefix = cpu_to_be32(cpu->env.psa);
+ sa->fpc = cpu_to_be32(cpu->env.fpc);
+ sa->todpr = cpu_to_be32(cpu->env.todpr);
+ sa->cputm = cpu_to_be64(cpu->env.cputm);
+ sa->ckc = cpu_to_be64(cpu->env.ckc >> 8);
+ for (i = 0; i < 16; ++i) {
+ sa->ars[i] = cpu_to_be32(cpu->env.aregs[i]);
+ }
+ for (i = 0; i < 16; ++i) {
+ sa->crs[i] = cpu_to_be64(cpu->env.cregs[i]);
+ }
+
+ cpu_physical_memory_unmap(sa, len, 1, len);
+
+ return 0;
+}
+
static void sigp_stop_and_store_status(CPUState *cs, run_on_cpu_data arg)
{
S390CPU *cpu = S390_CPU(cs);
--
2.51.0