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a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1760084525; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ehK5KRXCiUTeLGRom/AV7O2rUmdoOhUIvkIjSYXTaw4=; b=bZCnZphnZs6AxNij/nbzjSFjHm8EFsg3KQXIfIZu695d0fDSgJo5eHT3YL4A1G/qjw1B7H Rb0VOlYc4HQFKLVvESuDEnWO5NoPPbM4Rk3FIrcvmQsc+mqGvCc2cMcGy7nSAMpB5BMaky uAL7gTzwR5aYg7MMmLh9qCRrtniMmkI= X-MC-Unique: VfZd5VAhO9WV5ULh8Kqd2w-1 X-Mimecast-MFC-AGG-ID: VfZd5VAhO9WV5ULh8Kqd2w_1760084523 From: Thomas Huth To: qemu-devel@nongnu.org Cc: Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 7/9] target/s390x: Reduce s390_store_status() scope Date: Fri, 10 Oct 2025 10:21:42 +0200 Message-ID: <20251010082145.576222-8-thuth@redhat.com> In-Reply-To: <20251010082145.576222-1-thuth@redhat.com> References: <20251010082145.576222-1-thuth@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.438, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1760084681069158500 From: Philippe Mathieu-Daud=C3=A9 s390_store_status() is only called within sigp.c, move it and the SigpSaveArea structure definition there where it belongs, with other SIGP handling code. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Thomas Huth Message-ID: <20251002091132.65703-9-philmd@linaro.org> Signed-off-by: Thomas Huth --- target/s390x/s390x-internal.h | 2 -- target/s390x/helper.c | 67 ---------------------------------- target/s390x/sigp.c | 68 +++++++++++++++++++++++++++++++++++ 3 files changed, 68 insertions(+), 69 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index a49dca94a75..9691366ec91 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -323,8 +323,6 @@ void s390x_cpu_timer(void *opaque); void s390_handle_wait(S390CPU *cpu); hwaddr s390_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); hwaddr s390_cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr); -#define S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) -int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch); LowCore *cpu_map_lowcore(CPUS390XState *env); void cpu_unmap_lowcore(CPUS390XState *env, LowCore *lowcore); #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 84321e1d68e..184428c6d9d 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -24,7 +24,6 @@ #include "gdbstub/helpers.h" #include "qemu/timer.h" #include "hw/s390x/ioinst.h" -#include "target/s390x/kvm/pv.h" #include "system/hw_accel.h" #include "system/memory.h" #include "system/runstate.h" @@ -182,69 +181,3 @@ void s390_cpu_recompute_watchpoints(CPUState *cs) wp_flags, NULL); } } - -typedef struct SigpSaveArea { - uint64_t fprs[16]; /* 0x0000 */ - uint64_t grs[16]; /* 0x0080 */ - PSW psw; /* 0x0100 */ - uint8_t pad_0x0110[0x0118 - 0x0110]; /* 0x0110 */ - uint32_t prefix; /* 0x0118 */ - uint32_t fpc; /* 0x011c */ - uint8_t pad_0x0120[0x0124 - 0x0120]; /* 0x0120 */ - uint32_t todpr; /* 0x0124 */ - uint64_t cputm; /* 0x0128 */ - uint64_t ckc; /* 0x0130 */ - uint8_t pad_0x0138[0x0140 - 0x0138]; /* 0x0138 */ - uint32_t ars[16]; /* 0x0140 */ - uint64_t crs[16]; /* 0x0384 */ -} SigpSaveArea; -QEMU_BUILD_BUG_ON(sizeof(SigpSaveArea) !=3D 512); - -int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) -{ - static const uint8_t ar_id =3D 1; - SigpSaveArea *sa; - hwaddr len =3D sizeof(*sa); - int i; - - /* For PVMs storing will occur when this cpu enters SIE again */ - if (s390_is_pv()) { - return 0; - } - - sa =3D cpu_physical_memory_map(addr, &len, true); - if (!sa) { - return -EFAULT; - } - if (len !=3D sizeof(*sa)) { - cpu_physical_memory_unmap(sa, len, 1, 0); - return -EFAULT; - } - - if (store_arch) { - cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id,= 1); - } - for (i =3D 0; i < 16; ++i) { - sa->fprs[i] =3D cpu_to_be64(*get_freg(&cpu->env, i)); - } - for (i =3D 0; i < 16; ++i) { - sa->grs[i] =3D cpu_to_be64(cpu->env.regs[i]); - } - sa->psw.addr =3D cpu_to_be64(cpu->env.psw.addr); - sa->psw.mask =3D cpu_to_be64(s390_cpu_get_psw_mask(&cpu->env)); - sa->prefix =3D cpu_to_be32(cpu->env.psa); - sa->fpc =3D cpu_to_be32(cpu->env.fpc); - sa->todpr =3D cpu_to_be32(cpu->env.todpr); - sa->cputm =3D cpu_to_be64(cpu->env.cputm); - sa->ckc =3D cpu_to_be64(cpu->env.ckc >> 8); - for (i =3D 0; i < 16; ++i) { - sa->ars[i] =3D cpu_to_be32(cpu->env.aregs[i]); - } - for (i =3D 0; i < 16; ++i) { - sa->crs[i] =3D cpu_to_be64(cpu->env.cregs[i]); - } - - cpu_physical_memory_unmap(sa, len, 1, len); - - return 0; -} diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c index 1464be76983..2487acdb49e 100644 --- a/target/s390x/sigp.c +++ b/target/s390x/sigp.c @@ -19,6 +19,7 @@ #include "system/tcg.h" #include "trace.h" #include "qapi/qapi-types-machine.h" +#include "target/s390x/kvm/pv.h" =20 QemuMutex qemu_sigp_mutex; =20 @@ -126,6 +127,73 @@ static void sigp_stop(CPUState *cs, run_on_cpu_data ar= g) si->cc =3D SIGP_CC_ORDER_CODE_ACCEPTED; } =20 +typedef struct SigpSaveArea { + uint64_t fprs[16]; /* 0x0000 */ + uint64_t grs[16]; /* 0x0080 */ + PSW psw; /* 0x0100 */ + uint8_t pad_0x0110[0x0118 - 0x0110]; /* 0x0110 */ + uint32_t prefix; /* 0x0118 */ + uint32_t fpc; /* 0x011c */ + uint8_t pad_0x0120[0x0124 - 0x0120]; /* 0x0120 */ + uint32_t todpr; /* 0x0124 */ + uint64_t cputm; /* 0x0128 */ + uint64_t ckc; /* 0x0130 */ + uint8_t pad_0x0138[0x0140 - 0x0138]; /* 0x0138 */ + uint32_t ars[16]; /* 0x0140 */ + uint64_t crs[16]; /* 0x0384 */ +} SigpSaveArea; +QEMU_BUILD_BUG_ON(sizeof(SigpSaveArea) !=3D 512); + +#define S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) +static int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) +{ + static const uint8_t ar_id =3D 1; + SigpSaveArea *sa; + hwaddr len =3D sizeof(*sa); + int i; + + /* For PVMs storing will occur when this cpu enters SIE again */ + if (s390_is_pv()) { + return 0; + } + + sa =3D cpu_physical_memory_map(addr, &len, true); + if (!sa) { + return -EFAULT; + } + if (len !=3D sizeof(*sa)) { + cpu_physical_memory_unmap(sa, len, 1, 0); + return -EFAULT; + } + + if (store_arch) { + cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id,= 1); + } + for (i =3D 0; i < 16; ++i) { + sa->fprs[i] =3D cpu_to_be64(*get_freg(&cpu->env, i)); + } + for (i =3D 0; i < 16; ++i) { + sa->grs[i] =3D cpu_to_be64(cpu->env.regs[i]); + } + sa->psw.addr =3D cpu_to_be64(cpu->env.psw.addr); + sa->psw.mask =3D cpu_to_be64(s390_cpu_get_psw_mask(&cpu->env)); + sa->prefix =3D cpu_to_be32(cpu->env.psa); + sa->fpc =3D cpu_to_be32(cpu->env.fpc); + sa->todpr =3D cpu_to_be32(cpu->env.todpr); + sa->cputm =3D cpu_to_be64(cpu->env.cputm); + sa->ckc =3D cpu_to_be64(cpu->env.ckc >> 8); + for (i =3D 0; i < 16; ++i) { + sa->ars[i] =3D cpu_to_be32(cpu->env.aregs[i]); + } + for (i =3D 0; i < 16; ++i) { + sa->crs[i] =3D cpu_to_be64(cpu->env.cregs[i]); + } + + cpu_physical_memory_unmap(sa, len, 1, len); + + return 0; +} + static void sigp_stop_and_store_status(CPUState *cs, run_on_cpu_data arg) { S390CPU *cpu =3D S390_CPU(cs); --=20 2.51.0