[PULL 00/44] target-arm queue

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git fetch https://github.com/patchew-project/qemu tags/patchew/20250926140844.1493020-1-peter.maydell@linaro.org
Maintainers: Peter Maydell <peter.maydell@linaro.org>, Laurent Vivier <laurent@vivier.eu>, Paolo Bonzini <pbonzini@redhat.com>, "Marc-André Lureau" <marcandre.lureau@redhat.com>, "Daniel P. Berrangé" <berrange@redhat.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Alexander Graf <agraf@csgraf.de>, Mads Ynddal <mads@ynddal.dk>
There is a newer version of this series
meson.build                    |   1 +
linux-user/arm/target_proc.h   |   2 +
target/arm/cpregs.h            | 111 ++---
target/arm/cpu-features.h      | 415 ++++++++++++++++++
target/arm/cpu.h               | 413 +-----------------
target/arm/internals.h         |   3 +
target/arm/kvm-consts.h        |  14 +-
target/arm/tcg/translate.h     |   2 +
target/arm/cpu-sysregs.h.inc   |   1 +
hw/intc/arm_gicv3_cpuif.c      |  10 +-
hw/usb/hcd-uhci.c              |  10 +-
target/arm/arm-powerctl.c      |  26 +-
target/arm/cpu.c               |  16 +-
target/arm/gdbstub.c           |  14 +-
target/arm/helper.c            | 933 +++++++++++++++++++----------------------
target/arm/hvf/hvf.c           | 240 +++--------
target/arm/kvm.c               |  12 +-
target/arm/tcg/hflags.c        |   8 +-
target/arm/tcg/translate-a64.c |  47 ++-
target/arm/hvf/sysreg.c.inc    | 147 +++++++
target/arm/trace-events        |  10 +
21 files changed, 1199 insertions(+), 1236 deletions(-)
create mode 100644 target/arm/hvf/sysreg.c.inc
[PULL 00/44] target-arm queue
Posted by Peter Maydell 2 days ago
Hi; here's an arm pullreq...

thanks
-- PMM

The following changes since commit 95b9e0d2ade5d633fd13ffba96a54e87c65baf39:

  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2025-09-24 12:04:18 -0700)

are available in the Git repository at:

  https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20250926

for you to fetch changes up to b71e2b281a23aca474e128a8487efb07e29f4019:

  target/arm: Implement ID_AA64PFR2_EL1 (2025-09-26 13:43:33 +0100)

----------------------------------------------------------------
target-arm queue:
 * reimplement VHE alias register handling
 * replace magic GIC values by proper definitions
 * convert power control DPRINTF() uses to trace events
 * better reset related tracepoints
 * implement ID_AA64PFR2_EL1
 * hw/usb/hcd-uhci: don't assert for SETUP to non-0 endpoint
 * net/passt: Fix build failure due to missing GIO dependency

----------------------------------------------------------------
Laurent Vivier (1):
      net/passt: Fix build failure due to missing GIO dependency

Peter Maydell (3):
      hw/usb/hcd-uhci: don't assert for SETUP to non-0 endpoint
      target/arm: Move ID register field defs to cpu-features.h
      target/arm: Implement ID_AA64PFR2_EL1

Philippe Mathieu-Daudé (4):
      target/arm: Replace magic GIC values by proper definitions
      target/arm: Convert power control DPRINTF() uses to trace events
      target/arm: Trace emulated firmware reset call
      target/arm: Trace vCPU reset call

Richard Henderson (36):
      target/arm: Introduce KVMID_AA64_SYS_REG64
      target/arm: Move compare_u64 to helper.c
      target/arm/hvf: Split out sysreg.c.inc
      target/arm/hvf: Reorder DEF_SYSREG arguments
      target/arm/hvf: Add KVMID_TO_HVF, HVF_TO_KVMID
      target/arm/hvf: Remove hvf_sreg_match.key
      target/arm/hvf: Replace hvf_sreg_match with hvf_sreg_list
      target/arm/hvf: Sort the cpreg_indexes array
      target/arm/hvf: Use raw_read, raw_write to access
      target/arm: Use raw_write in cp_reg_reset
      target/arm: Rename all ARMCPRegInfo from opaque to ri
      target/arm: Drop define_one_arm_cp_reg_with_opaque
      target/arm: Restrict the scope of CPREG_FIELD32, CPREG_FIELD64
      target/arm: Replace cpreg_field_is_64bit with cpreg_field_type
      target/arm: Add CP_REG_AA32_64BIT_{SHIFT,MASK}
      target/arm: Rename CP_REG_AA32_NS_{SHIFT,MASK}
      target/arm: Convert init_cpreg_list to g_hash_table_foreach
      target/arm: Remove cp argument to ENCODE_AA64_CP_REG
      target/arm: Reorder ENCODE_AA64_CP_REG arguments
      target/arm: Split out add_cpreg_to_hashtable_aa{32, 64}
      target/arm: Improve asserts in define_one_arm_cp_reg
      target/arm: Move cp processing to define_one_arm_cp_reg
      target/arm: Move cpreg elimination to define_one_arm_cp_reg
      target/arm: Add key parameter to add_cpreg_to_hashtable
      target/arm: Split out alloc_cpreg
      target/arm: Hoist the allocation of ARMCPRegInfo
      target/arm: Remove name argument to alloc_cpreg
      target/arm: Move alias setting for wildcards
      target/arm: Move writeback of CP_ANY fields
      target/arm: Move endianness fixup for 32-bit registers
      target/arm: Rename TBFLAG_A64_NV2_MEM_E20 with *_E2H
      target/arm: Split out redirect_cpreg
      target/arm: Redirect VHE FOO_EL1 -> FOO_EL2 during translation
      target/arm: Redirect VHE FOO_EL12 to FOO_EL1 during translation
      target/arm: Rename some cpreg to their aarch64 names
      target/arm: Remove define_arm_vh_e2h_redirects_aliases

 meson.build                    |   1 +
 linux-user/arm/target_proc.h   |   2 +
 target/arm/cpregs.h            | 111 ++---
 target/arm/cpu-features.h      | 415 ++++++++++++++++++
 target/arm/cpu.h               | 413 +-----------------
 target/arm/internals.h         |   3 +
 target/arm/kvm-consts.h        |  14 +-
 target/arm/tcg/translate.h     |   2 +
 target/arm/cpu-sysregs.h.inc   |   1 +
 hw/intc/arm_gicv3_cpuif.c      |  10 +-
 hw/usb/hcd-uhci.c              |  10 +-
 target/arm/arm-powerctl.c      |  26 +-
 target/arm/cpu.c               |  16 +-
 target/arm/gdbstub.c           |  14 +-
 target/arm/helper.c            | 933 +++++++++++++++++++----------------------
 target/arm/hvf/hvf.c           | 240 +++--------
 target/arm/kvm.c               |  12 +-
 target/arm/tcg/hflags.c        |   8 +-
 target/arm/tcg/translate-a64.c |  47 ++-
 target/arm/hvf/sysreg.c.inc    | 147 +++++++
 target/arm/trace-events        |  10 +
 21 files changed, 1199 insertions(+), 1236 deletions(-)
 create mode 100644 target/arm/hvf/sysreg.c.inc

Re: [PULL 00/44] target-arm queue
Posted by Richard Henderson 23 hours ago
On 9/26/25 07:08, Peter Maydell wrote:
> Hi; here's an arm pullreq...
> 
> thanks
> -- PMM
> 
> The following changes since commit 95b9e0d2ade5d633fd13ffba96a54e87c65baf39:
> 
>    Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu into staging (2025-09-24 12:04:18 -0700)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20250926
> 
> for you to fetch changes up to b71e2b281a23aca474e128a8487efb07e29f4019:
> 
>    target/arm: Implement ID_AA64PFR2_EL1 (2025-09-26 13:43:33 +0100)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * reimplement VHE alias register handling
>   * replace magic GIC values by proper definitions
>   * convert power control DPRINTF() uses to trace events
>   * better reset related tracepoints
>   * implement ID_AA64PFR2_EL1
>   * hw/usb/hcd-uhci: don't assert for SETUP to non-0 endpoint
>   * net/passt: Fix build failure due to missing GIO dependency

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.

r~