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[PATCH v10 3/8] ppc/pnv: Add PnvChipClass handler to get reference to interrupt controller

Aditya Gupta posted 8 patches 4 months, 2 weeks ago
Maintainers: Nicholas Piggin <npiggin@gmail.com>, Aditya Gupta <adityag@linux.ibm.com>, Glenn Miles <milesg@linux.ibm.com>, Gautam Menghani <gautam@linux.ibm.com>
[PATCH v10 3/8] ppc/pnv: Add PnvChipClass handler to get reference to interrupt controller
Posted by Aditya Gupta 4 months, 2 weeks ago 
Existing code in XIVE2 assumes the chip to be a Power10 Chip.
Instead add a handler to get reference to the interrupt controller (XIVE)
for a given Power Chip.

Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
---
 hw/intc/pnv_xive2.c       |  4 ++--
 hw/ppc/pnv.c              | 12 ++++++++++++
 include/hw/ppc/pnv_chip.h |  1 +
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index e019cad5c14c..0663baab544c 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -110,8 +110,8 @@ static PnvXive2 *pnv_xive2_get_remote(uint32_t vsd_type, hwaddr fwd_addr)
     int i;
 
     for (i = 0; i < pnv->num_chips; i++) {
-        Pnv10Chip *chip10 = PNV10_CHIP(pnv->chips[i]);
-        PnvXive2 *xive = &chip10->xive;
+        PnvChipClass *k = PNV_CHIP_GET_CLASS(pnv->chips[i]);
+        PnvXive2 *xive = PNV_XIVE2(k->intc_get(pnv->chips[i]));
 
         /*
          * Is this the XIVE matching the forwarded VSD address is for this
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 423954ba7e0c..a4fdf59207fa 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1486,6 +1486,16 @@ static void pnv_chip_power10_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
     xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf);
 }
 
+static void *pnv_chip_power10_intc_get(PnvChip *chip)
+{
+    return &PNV10_CHIP(chip)->xive;
+}
+
+static void *pnv_chip_power11_intc_get(PnvChip *chip)
+{
+    return &PNV11_CHIP(chip)->xive;
+}
+
 /*
  * Allowed core identifiers on a POWER8 Processor Chip :
  *
@@ -2680,6 +2690,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, const void *data)
     k->intc_reset = pnv_chip_power10_intc_reset;
     k->intc_destroy = pnv_chip_power10_intc_destroy;
     k->intc_print_info = pnv_chip_power10_intc_print_info;
+    k->intc_get = pnv_chip_power10_intc_get;
     k->isa_create = pnv_chip_power10_isa_create;
     k->dt_populate = pnv_chip_power10_dt_populate;
     k->pic_print_info = pnv_chip_power10_pic_print_info;
@@ -2709,6 +2720,7 @@ static void pnv_chip_power11_class_init(ObjectClass *klass, const void *data)
     k->chip_cfam_id = 0x220da04980000000ull; /* P11 DD2.0 (with NX) */
     k->cores_mask = POWER11_CORE_MASK;
     k->get_pir_tir = pnv_get_pir_tir_p10;
+    k->intc_get = pnv_chip_power11_intc_get;
     k->isa_create = pnv_chip_power11_isa_create;
     k->dt_populate = pnv_chip_power11_dt_populate;
     k->pic_print_info = pnv_chip_power11_pic_print_info;
diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
index 6bd930f8b439..a5b8c49680d3 100644
--- a/include/hw/ppc/pnv_chip.h
+++ b/include/hw/ppc/pnv_chip.h
@@ -170,6 +170,7 @@ struct PnvChipClass {
     void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu);
     void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu);
     void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, GString *buf);
+    void* (*intc_get)(PnvChip *chip);
     ISABus *(*isa_create)(PnvChip *chip, Error **errp);
     void (*dt_populate)(PnvChip *chip, void *fdt);
     void (*pic_print_info)(PnvChip *chip, GString *buf);
-- 
2.50.1
Re: [PATCH v10 3/8] ppc/pnv: Add PnvChipClass handler to get reference to interrupt controller
Posted by Mike Kowal 4 months ago 
On 9/25/2025 12:30 PM, Aditya Gupta wrote:
> Existing code in XIVE2 assumes the chip to be a Power10 Chip.
> Instead add a handler to get reference to the interrupt controller (XIVE)
> for a given Power Chip.

Reviewed-by: Michael Kowal<kowal@linux.ibm.com>

> Signed-off-by: Aditya Gupta<adityag@linux.ibm.com>
> ---
>   hw/intc/pnv_xive2.c       |  4 ++--
>   hw/ppc/pnv.c              | 12 ++++++++++++
>   include/hw/ppc/pnv_chip.h |  1 +
>   3 files changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index e019cad5c14c..0663baab544c 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -110,8 +110,8 @@ static PnvXive2 *pnv_xive2_get_remote(uint32_t vsd_type, hwaddr fwd_addr)
>       int i;
>   
>       for (i = 0; i < pnv->num_chips; i++) {
> -        Pnv10Chip *chip10 = PNV10_CHIP(pnv->chips[i]);
> -        PnvXive2 *xive = &chip10->xive;
> +        PnvChipClass *k = PNV_CHIP_GET_CLASS(pnv->chips[i]);
> +        PnvXive2 *xive = PNV_XIVE2(k->intc_get(pnv->chips[i]));
>   
>           /*
>            * Is this the XIVE matching the forwarded VSD address is for this
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 423954ba7e0c..a4fdf59207fa 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1486,6 +1486,16 @@ static void pnv_chip_power10_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
>       xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf);
>   }
>   
> +static void *pnv_chip_power10_intc_get(PnvChip *chip)
> +{
> +    return &PNV10_CHIP(chip)->xive;
> +}
> +
> +static void *pnv_chip_power11_intc_get(PnvChip *chip)
> +{
> +    return &PNV11_CHIP(chip)->xive;
> +}
> +
>   /*
>    * Allowed core identifiers on a POWER8 Processor Chip :
>    *
> @@ -2680,6 +2690,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, const void *data)
>       k->intc_reset = pnv_chip_power10_intc_reset;
>       k->intc_destroy = pnv_chip_power10_intc_destroy;
>       k->intc_print_info = pnv_chip_power10_intc_print_info;
> +    k->intc_get = pnv_chip_power10_intc_get;
>       k->isa_create = pnv_chip_power10_isa_create;
>       k->dt_populate = pnv_chip_power10_dt_populate;
>       k->pic_print_info = pnv_chip_power10_pic_print_info;
> @@ -2709,6 +2720,7 @@ static void pnv_chip_power11_class_init(ObjectClass *klass, const void *data)
>       k->chip_cfam_id = 0x220da04980000000ull; /* P11 DD2.0 (with NX) */
>       k->cores_mask = POWER11_CORE_MASK;
>       k->get_pir_tir = pnv_get_pir_tir_p10;
> +    k->intc_get = pnv_chip_power11_intc_get;
>       k->isa_create = pnv_chip_power11_isa_create;
>       k->dt_populate = pnv_chip_power11_dt_populate;
>       k->pic_print_info = pnv_chip_power11_pic_print_info;
> diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
> index 6bd930f8b439..a5b8c49680d3 100644
> --- a/include/hw/ppc/pnv_chip.h
> +++ b/include/hw/ppc/pnv_chip.h
> @@ -170,6 +170,7 @@ struct PnvChipClass {
>       void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu);
>       void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu);
>       void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, GString *buf);
> +    void* (*intc_get)(PnvChip *chip);
>       ISABus *(*isa_create)(PnvChip *chip, Error **errp);
>       void (*dt_populate)(PnvChip *chip, void *fdt);
>       void (*pic_print_info)(PnvChip *chip, GString *buf);
Re: [PATCH v10 3/8] ppc/pnv: Add PnvChipClass handler to get reference to interrupt controller
Posted by Cédric Le Goater 4 months, 2 weeks ago 
On 9/25/25 19:30, Aditya Gupta wrote:
> Existing code in XIVE2 assumes the chip to be a Power10 Chip.
> Instead add a handler to get reference to the interrupt controller (XIVE)
> for a given Power Chip.
> 
> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


> ---
>   hw/intc/pnv_xive2.c       |  4 ++--
>   hw/ppc/pnv.c              | 12 ++++++++++++
>   include/hw/ppc/pnv_chip.h |  1 +
>   3 files changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index e019cad5c14c..0663baab544c 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -110,8 +110,8 @@ static PnvXive2 *pnv_xive2_get_remote(uint32_t vsd_type, hwaddr fwd_addr)
>       int i;
>   
>       for (i = 0; i < pnv->num_chips; i++) {
> -        Pnv10Chip *chip10 = PNV10_CHIP(pnv->chips[i]);
> -        PnvXive2 *xive = &chip10->xive;
> +        PnvChipClass *k = PNV_CHIP_GET_CLASS(pnv->chips[i]);
> +        PnvXive2 *xive = PNV_XIVE2(k->intc_get(pnv->chips[i]));
>   
>           /*
>            * Is this the XIVE matching the forwarded VSD address is for this
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 423954ba7e0c..a4fdf59207fa 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1486,6 +1486,16 @@ static void pnv_chip_power10_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
>       xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf);
>   }
>   
> +static void *pnv_chip_power10_intc_get(PnvChip *chip)
> +{
> +    return &PNV10_CHIP(chip)->xive;
> +}
> +
> +static void *pnv_chip_power11_intc_get(PnvChip *chip)
> +{
> +    return &PNV11_CHIP(chip)->xive;
> +}
> +
>   /*
>    * Allowed core identifiers on a POWER8 Processor Chip :
>    *
> @@ -2680,6 +2690,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, const void *data)
>       k->intc_reset = pnv_chip_power10_intc_reset;
>       k->intc_destroy = pnv_chip_power10_intc_destroy;
>       k->intc_print_info = pnv_chip_power10_intc_print_info;
> +    k->intc_get = pnv_chip_power10_intc_get;
>       k->isa_create = pnv_chip_power10_isa_create;
>       k->dt_populate = pnv_chip_power10_dt_populate;
>       k->pic_print_info = pnv_chip_power10_pic_print_info;
> @@ -2709,6 +2720,7 @@ static void pnv_chip_power11_class_init(ObjectClass *klass, const void *data)
>       k->chip_cfam_id = 0x220da04980000000ull; /* P11 DD2.0 (with NX) */
>       k->cores_mask = POWER11_CORE_MASK;
>       k->get_pir_tir = pnv_get_pir_tir_p10;
> +    k->intc_get = pnv_chip_power11_intc_get;
>       k->isa_create = pnv_chip_power11_isa_create;
>       k->dt_populate = pnv_chip_power11_dt_populate;
>       k->pic_print_info = pnv_chip_power11_pic_print_info;
> diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
> index 6bd930f8b439..a5b8c49680d3 100644
> --- a/include/hw/ppc/pnv_chip.h
> +++ b/include/hw/ppc/pnv_chip.h
> @@ -170,6 +170,7 @@ struct PnvChipClass {
>       void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu);
>       void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu);
>       void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, GString *buf);
> +    void* (*intc_get)(PnvChip *chip);
>       ISABus *(*isa_create)(PnvChip *chip, Error **errp);
>       void (*dt_populate)(PnvChip *chip, void *fdt);
>       void (*pic_print_info)(PnvChip *chip, GString *buf);
Re: [PATCH v10 3/8] ppc/pnv: Add PnvChipClass handler to get reference to interrupt controller
Posted by Aditya Gupta 4 months, 2 weeks ago 
On 25/09/25 11:02PM, Cédric Le Goater wrote:
> On 9/25/25 19:30, Aditya Gupta wrote:
> > Existing code in XIVE2 assumes the chip to be a Power10 Chip.
> > Instead add a handler to get reference to the interrupt controller (XIVE)
> > for a given Power Chip.
> > 
> > Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
> 
> 
> Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks Cedric.

- Aditya G

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