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b=oZaY0NwSrALCW7D20eECc+P/y565/Q3PT 1PgKpGDXOe5bq6Iw2nSkO2kLBsaExN9tSWXQJ8G4jA8f3aTEjn01EDjONzrC+G7p QxHDz2yRJ67b7V1awnB82AGJxMUcqhxmsRcgJB7bDD48MJtX+hbqfnafr7UTy0EA lJ2DZxYcFExDKL7jTKseFIiQuSbXnw6MxplGVR7UH+ienLBNrBgavpG/28bFUSWr VLVCefCsngkz3J1I77EqtfJLq5nPs5XanaJSCG1fVuNQwWspRLcWKuI8tIuaGsGP ToPW5lPn/HxLjx+sQpMI1lxLLcEDrB27JNt2kS2zfKM1sZ7DfMkSw== From: Aditya Gupta To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Nicholas Piggin , Harsh Prateek Bora Cc: Mahesh J Salgaonkar , Madhavan Srinivasan , Gautam Menghani , Mike Kowal , Miles Glenn , Ganesh Goudar , , Subject: [PATCH v10 3/8] ppc/pnv: Add PnvChipClass handler to get reference to interrupt controller Date: Thu, 25 Sep 2025 23:00:44 +0530 Message-ID: <20250925173049.891406-4-adityag@linux.ibm.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250925173049.891406-1-adityag@linux.ibm.com> References: <20250925173049.891406-1-adityag@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: OqHG2FAgqh961WOSt4dNe42lFgJH76kH X-Proofpoint-GUID: QL_KMC-ayJxqk8DRe62aec0TY648mkCu X-Authority-Analysis: v=2.4 cv=SdH3duRu c=1 sm=1 tr=0 ts=68d57c7e cx=c_pps a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17 a=yJojWOMRYYMA:10 a=VnNF1IyMAAAA:8 a=iorEynmUMFpPDaT-22UA:9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTIwMDAyMCBTYWx0ZWRfX0j0UAkbcr6cQ oP96Mey2egYSAwgqadqXeOKrZpJnBTMvIjOyhRZHV65x12TMRC7qhqwdPRCE7UAtzQYcwvsdWvX kC7nU+ib7pLIJcMs494T5Ky8n+mFaGqZxBMw3dEaf91rwWsZAx12u/6hcqsbOflWh2LAEeixA2O mW1Qr0jLR8OyVj40vC4tvdm+PqLj8jq2drnSFIyyHOrSXddVtkHZyGhc24sBz0fyyiOycSu0IhM 7DqgkVJ/pGewjrW8VfIRKvWxq7cpct3WuimYGc27w2V5Jto0V7lOJ92eWxU40uYW6MlMUT5n9J7 vv3dvq/RGr1b9YTfHYd6ZoMuegk7BhicNMUvySk8d+n78qUzbIWbtJzW0Hd7db5t7dITIdqEPRL ISiY/LDQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-25_01,2025-09-25_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 phishscore=0 spamscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 adultscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509200020 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=adityag@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1758821599034116600 Content-Type: text/plain; charset="utf-8" Existing code in XIVE2 assumes the chip to be a Power10 Chip. Instead add a handler to get reference to the interrupt controller (XIVE) for a given Power Chip. Signed-off-by: Aditya Gupta Reviewed-by: C=C3=A9dric Le Goater --- hw/intc/pnv_xive2.c | 4 ++-- hw/ppc/pnv.c | 12 ++++++++++++ include/hw/ppc/pnv_chip.h | 1 + 3 files changed, 15 insertions(+), 2 deletions(-) diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index e019cad5c14c..0663baab544c 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -110,8 +110,8 @@ static PnvXive2 *pnv_xive2_get_remote(uint32_t vsd_type= , hwaddr fwd_addr) int i; =20 for (i =3D 0; i < pnv->num_chips; i++) { - Pnv10Chip *chip10 =3D PNV10_CHIP(pnv->chips[i]); - PnvXive2 *xive =3D &chip10->xive; + PnvChipClass *k =3D PNV_CHIP_GET_CLASS(pnv->chips[i]); + PnvXive2 *xive =3D PNV_XIVE2(k->intc_get(pnv->chips[i])); =20 /* * Is this the XIVE matching the forwarded VSD address is for this diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 423954ba7e0c..a4fdf59207fa 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1486,6 +1486,16 @@ static void pnv_chip_power10_intc_print_info(PnvChip= *chip, PowerPCCPU *cpu, xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf); } =20 +static void *pnv_chip_power10_intc_get(PnvChip *chip) +{ + return &PNV10_CHIP(chip)->xive; +} + +static void *pnv_chip_power11_intc_get(PnvChip *chip) +{ + return &PNV11_CHIP(chip)->xive; +} + /* * Allowed core identifiers on a POWER8 Processor Chip : * @@ -2680,6 +2690,7 @@ static void pnv_chip_power10_class_init(ObjectClass *= klass, const void *data) k->intc_reset =3D pnv_chip_power10_intc_reset; k->intc_destroy =3D pnv_chip_power10_intc_destroy; k->intc_print_info =3D pnv_chip_power10_intc_print_info; + k->intc_get =3D pnv_chip_power10_intc_get; k->isa_create =3D pnv_chip_power10_isa_create; k->dt_populate =3D pnv_chip_power10_dt_populate; k->pic_print_info =3D pnv_chip_power10_pic_print_info; @@ -2709,6 +2720,7 @@ static void pnv_chip_power11_class_init(ObjectClass *= klass, const void *data) k->chip_cfam_id =3D 0x220da04980000000ull; /* P11 DD2.0 (with NX) */ k->cores_mask =3D POWER11_CORE_MASK; k->get_pir_tir =3D pnv_get_pir_tir_p10; + k->intc_get =3D pnv_chip_power11_intc_get; k->isa_create =3D pnv_chip_power11_isa_create; k->dt_populate =3D pnv_chip_power11_dt_populate; k->pic_print_info =3D pnv_chip_power11_pic_print_info; diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h index 6bd930f8b439..a5b8c49680d3 100644 --- a/include/hw/ppc/pnv_chip.h +++ b/include/hw/ppc/pnv_chip.h @@ -170,6 +170,7 @@ struct PnvChipClass { void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu); void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu); void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, GString *buf); + void* (*intc_get)(PnvChip *chip); ISABus *(*isa_create)(PnvChip *chip, Error **errp); void (*dt_populate)(PnvChip *chip, void *fdt); void (*pic_print_info)(PnvChip *chip, GString *buf); --=20 2.50.1