target/riscv: use riscv_csrr in riscv_csr_read

[PATCH] target/riscv: use riscv_csrr in riscv_csr_read

Posted by stove 1 month ago

Commit 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC
writes a read-only CSR") changed the behavior of riscv_csrrw, which
would formerly be treated as read-only if the write mask were set to 0.

Fixes an exception being raised when accessing read-only vector CSRs
like vtype.

Fixes: 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR")

Signed-off-by: stove <stove@rivosinc.com>
---
 target/riscv/cpu.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 4a862da615..dca8edff6d 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -873,7 +873,7 @@ static inline void riscv_csr_write(CPURISCVState *env, int csrno,
 static inline target_ulong riscv_csr_read(CPURISCVState *env, int csrno)
 {
     target_ulong val = 0;
-    riscv_csrrw(env, csrno, &val, 0, 0, 0);
+    riscv_csrr(env, csrno, &val);
     return val;
 }
 
-- 
2.50.1

Re: [PATCH] target/riscv: use riscv_csrr in riscv_csr_read

Posted by Daniel Henrique Barboza 1 month ago

Cc: qemu-stable

On 8/27/25 5:36 PM, stove wrote:
> Commit 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC
> writes a read-only CSR") changed the behavior of riscv_csrrw, which
> would formerly be treated as read-only if the write mask were set to 0.
> 
> Fixes an exception being raised when accessing read-only vector CSRs
> like vtype.
> 
> Fixes: 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR")
> 
> Signed-off-by: stove <stove@rivosinc.com>
> ---


Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>


>   target/riscv/cpu.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 4a862da615..dca8edff6d 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -873,7 +873,7 @@ static inline void riscv_csr_write(CPURISCVState *env, int csrno,
>   static inline target_ulong riscv_csr_read(CPURISCVState *env, int csrno)
>   {
>       target_ulong val = 0;
> -    riscv_csrrw(env, csrno, &val, 0, 0, 0);
> +    riscv_csrr(env, csrno, &val);
>       return val;
>   }
>

Re: [PATCH] target/riscv: use riscv_csrr in riscv_csr_read

Posted by Michael Tokarev 1 day ago

On 28.08.2025 12:37, Daniel Henrique Barboza wrote:
> Cc: qemu-stable
> 
> On 8/27/25 5:36 PM, stove wrote:
>> Commit 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC
>> writes a read-only CSR") changed the behavior of riscv_csrrw, which
>> would formerly be treated as read-only if the write mask were set to 0.
>>
>> Fixes an exception being raised when accessing read-only vector CSRs
>> like vtype.
>>
>> Fixes: 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/ 
>> CSRRC writes a read-only CSR")

Ping?  Can we apply this to the master branch, so I can pick it up for
the stable series?

Thanks,

/mjt