On Tue, Mar 18, 2025 at 02:07:59PM +0100, Corvin Köhne wrote:
> From: YannickV <Y.Vossen@beckhoff.com>
>
> Registers are always 32 bit aligned. R_MAX is not the maximum
> register address, it is the maximum register number. The memory
> size can be determined by 4 * R_MAX.
>
> Currently every register with an offset bigger than 0x40 will be
> ignored, because the memory size is set wrong. This effects the
> MCTRL register and makes it useless. This commit restores the
> correct behaviour.
>
> Signed-off-by: Yannick Voßen <y.vossen@beckhoff.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
> ---
> hw/dma/xlnx-zynq-devcfg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
> index c595d090fa..24461677ef 100644
> --- a/hw/dma/xlnx-zynq-devcfg.c
> +++ b/hw/dma/xlnx-zynq-devcfg.c
> @@ -400,7 +400,7 @@ static void xlnx_zynq_devcfg_init(Object *obj)
> s->regs_info, s->regs,
> &xlnx_zynq_devcfg_reg_ops,
> XLNX_ZYNQ_DEVCFG_ERR_DEBUG,
> - XLNX_ZYNQ_DEVCFG_R_MAX);
> + XLNX_ZYNQ_DEVCFG_R_MAX * 4);
> memory_region_add_subregion(&s->iomem,
> A_CTRL,
> ®_array->mem);
> --
> 2.49.0
>