On 11/14/24 08:01, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/openrisc/cpu.h | 8 +++++---
> target/openrisc/cpu.c | 2 +-
> target/openrisc/mmu.c | 39 +++++++++++++++++++++------------------
> 3 files changed, 27 insertions(+), 22 deletions(-)
>
> diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
> index c9fe9ae12d..e177ad8b84 100644
> --- a/target/openrisc/cpu.h
> +++ b/target/openrisc/cpu.h
> @@ -22,6 +22,7 @@
>
> #include "cpu-qom.h"
> #include "exec/cpu-defs.h"
> +#include "exec/memop.h"
> #include "fpu/softfloat-types.h"
>
> /**
> @@ -306,9 +307,10 @@ int print_insn_or1k(bfd_vma addr, disassemble_info *info);
> #ifndef CONFIG_USER_ONLY
> hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
>
> -bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> - MMUAccessType access_type, int mmu_idx,
> - bool probe, uintptr_t retaddr);
> +bool openrisc_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out,
> + vaddr addr, MMUAccessType access_type,
> + int mmu_idx, MemOp memop, int size,
> + bool probe, uintptr_t ra);
>
> extern const VMStateDescription vmstate_openrisc_cpu;
>
> diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
> index b96561d1f2..6aa04ff7d3 100644
> --- a/target/openrisc/cpu.c
> +++ b/target/openrisc/cpu.c
> @@ -237,7 +237,7 @@ static const TCGCPUOps openrisc_tcg_ops = {
> .restore_state_to_opc = openrisc_restore_state_to_opc,
>
> #ifndef CONFIG_USER_ONLY
> - .tlb_fill = openrisc_cpu_tlb_fill,
> + .tlb_fill_align = openrisc_cpu_tlb_fill_align,
> .cpu_exec_interrupt = openrisc_cpu_exec_interrupt,
> .cpu_exec_halt = openrisc_cpu_has_work,
> .do_interrupt = openrisc_cpu_do_interrupt,
> diff --git a/target/openrisc/mmu.c b/target/openrisc/mmu.c
> index c632d5230b..eafab356a6 100644
> --- a/target/openrisc/mmu.c
> +++ b/target/openrisc/mmu.c
> @@ -104,39 +104,42 @@ static void raise_mmu_exception(OpenRISCCPU *cpu, target_ulong address,
> cpu->env.lock_addr = -1;
> }
>
> -bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
> - MMUAccessType access_type, int mmu_idx,
> - bool probe, uintptr_t retaddr)
> +bool openrisc_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out,
> + vaddr addr, MMUAccessType access_type,
> + int mmu_idx, MemOp memop, int size,
> + bool probe, uintptr_t retaddr)
> {
> OpenRISCCPU *cpu = OPENRISC_CPU(cs);
> - int excp = EXCP_DPF;
> int prot;
> hwaddr phys_addr;
>
> + /* TODO: alignment faults not currently handled. */
> +
> if (mmu_idx == MMU_NOMMU_IDX) {
> /* The mmu is disabled; lookups never fail. */
> get_phys_nommu(&phys_addr, &prot, addr);
> - excp = 0;
> } else {
> bool super = mmu_idx == MMU_SUPERVISOR_IDX;
> int need = (access_type == MMU_INST_FETCH ? PAGE_EXEC
> : access_type == MMU_DATA_STORE ? PAGE_WRITE
> : PAGE_READ);
> - excp = get_phys_mmu(cpu, &phys_addr, &prot, addr, need, super);
> + int excp = get_phys_mmu(cpu, &phys_addr, &prot, addr, need, super);
> +
> + if (unlikely(excp)) {
> + if (probe) {
> + return false;
> + }
> + raise_mmu_exception(cpu, addr, excp);
> + cpu_loop_exit_restore(cs, retaddr);
> + }
> }
>
> - if (likely(excp == 0)) {
> - tlb_set_page(cs, addr & TARGET_PAGE_MASK,
> - phys_addr & TARGET_PAGE_MASK, prot,
> - mmu_idx, TARGET_PAGE_SIZE);
> - return true;
> - }
> - if (probe) {
> - return false;
> - }
> -
> - raise_mmu_exception(cpu, addr, excp);
> - cpu_loop_exit_restore(cs, retaddr);
> + memset(out, 0, sizeof(*out));
> + out->phys_addr = phys_addr;
> + out->prot = prot;
> + out->lg_page_size = TARGET_PAGE_BITS;
> + out->attrs = MEMTXATTRS_UNSPECIFIED;
> + return true;
> }
>
> hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>