The event ID can be a upto 56 bit value when sscofpmf is implemented.
Change the event to counter hashtable to store the keys as 64 bit value
instead of uint.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 target/riscv/pmu.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
index 21377518f4e0..2531d4f1a9c1 100644
--- a/target/riscv/pmu.c
+++ b/target/riscv/pmu.c
@@ -265,14 +265,14 @@ static void riscv_pmu_cycle_update_priv(CPURISCVState *env,
     counter_arr[env->priv] += delta;
 }
 
-static bool riscv_pmu_htable_lookup(RISCVCPU *cpu, uint32_t key,
+static bool riscv_pmu_htable_lookup(RISCVCPU *cpu, uint64_t key,
                                     uint32_t *value)
 {
     GHashTable *table = cpu->pmu_event_ctr_map;
     gpointer val_ptr;
 
     pthread_rwlock_rdlock(&cpu->pmu_map_lock);
-    gpointer val_ptr = g_hash_table_lookup(table, GUINT_TO_POINTER(key));
+    val_ptr = g_hash_table_lookup(table, &key);
     if (!val_ptr) {
         pthread_rwlock_unlock(&cpu->pmu_map_lock);
         return false;
@@ -378,9 +378,10 @@ static int64_t pmu_icount_ticks_to_ns(int64_t value)
 int riscv_pmu_update_event_map(CPURISCVState *env, uint64_t value,
                                uint32_t ctr_idx)
 {
-    uint32_t event_idx;
+    uint64_t event_idx;
     RISCVCPU *cpu = env_archcpu(env);
     uint32_t mapped_ctr_idx;
+    gint64 *eid_ptr;
 
     if (!riscv_pmu_counter_valid(cpu, ctr_idx) || !cpu->pmu_event_ctr_map) {
         return -1;
@@ -415,8 +416,10 @@ int riscv_pmu_update_event_map(CPURISCVState *env, uint64_t value,
         /* We don't support any raw events right now */
         return -1;
     }
+    eid_ptr = g_new(gint64, 1);
+    *eid_ptr = event_idx;
     pthread_rwlock_wrlock(&cpu->pmu_map_lock);
-    g_hash_table_insert(cpu->pmu_event_ctr_map, GUINT_TO_POINTER(event_idx),
+    g_hash_table_insert(cpu->pmu_event_ctr_map, eid_ptr,
                         GUINT_TO_POINTER(ctr_idx));
     pthread_rwlock_unlock(&cpu->pmu_map_lock);
 
@@ -597,7 +600,8 @@ void riscv_pmu_init(RISCVCPU *cpu, Error **errp)
         return;
     }
 
-    cpu->pmu_event_ctr_map = g_hash_table_new(g_direct_hash, g_direct_equal);
+    cpu->pmu_event_ctr_map = g_hash_table_new_full(g_int64_hash, g_int64_equal,
+                                                   g_free, NULL);
     if (!cpu->pmu_event_ctr_map) {
         error_setg(errp, "Unable to allocate PMU event hash table");
         return;

-- 
2.34.1