[PATCH v3 0/3] target/riscv: Remove redundant insn length check for zama16b

LIU Zhiwei posted 3 patches 3 months, 3 weeks ago
target/riscv/insn_trans/trans_rvd.c.inc | 18 ++++++++++++++++--
target/riscv/insn_trans/trans_rvf.c.inc |  4 ++--
target/riscv/insn_trans/trans_rvi.c.inc |  4 ++--
3 files changed, 20 insertions(+), 6 deletions(-)
[PATCH v3 0/3] target/riscv: Remove redundant insn length check for zama16b
Posted by LIU Zhiwei 3 months, 3 weeks ago
In this patch set, we remove the redundant insn length check for zama16b as the
specification clarified that zama16b applies to compressed encodings[1].

Richard points out we should obey the MXLEN requirement for F/D/Q loads or stores,
so we add this constraint for trans_fld/fsd.

I notice that we have a too strict aligment implementation for fld/fsd when xlen < 64.
It will hide some problems. So relex it from MO_ATOM_IFALIGN to MO_ATOM_NONE.

[1]: https://github.com/riscv/riscv-isa-manual/pull/1557

v3<-v2:
  1. Using get_xl_max instead of ctx->misa_mxl_max as documentation.
  2. Fix not clean split in patch 1.
  3. Explicitly specified aligment for fld/fsd under all cases. 

v2<-v1:
  1. Add mxlen check for fld when applies zama16b.
  2. Relax fld/fsd alignment for MO_ATOM_IFALIGN to MO_ATOM_NONE.

LIU Zhiwei (3):
  target/riscv: Remove redundant insn length check for zama16b
  target/riscv: Add MXLEN check for F/D/Q applies to zama16b
  target/riscv: Relax fld alignment requirement

 target/riscv/insn_trans/trans_rvd.c.inc | 18 ++++++++++++++++--
 target/riscv/insn_trans/trans_rvf.c.inc |  4 ++--
 target/riscv/insn_trans/trans_rvi.c.inc |  4 ++--
 3 files changed, 20 insertions(+), 6 deletions(-)

-- 
2.25.1
Re: [PATCH v3 0/3] target/riscv: Remove redundant insn length check for zama16b
Posted by Alistair Francis 3 months, 3 weeks ago
On Fri, Aug 2, 2024 at 5:25 PM LIU Zhiwei <zhiwei_liu@linux.alibaba.com> wrote:
>
> In this patch set, we remove the redundant insn length check for zama16b as the
> specification clarified that zama16b applies to compressed encodings[1].
>
> Richard points out we should obey the MXLEN requirement for F/D/Q loads or stores,
> so we add this constraint for trans_fld/fsd.
>
> I notice that we have a too strict aligment implementation for fld/fsd when xlen < 64.
> It will hide some problems. So relex it from MO_ATOM_IFALIGN to MO_ATOM_NONE.
>
> [1]: https://github.com/riscv/riscv-isa-manual/pull/1557
>
> v3<-v2:
>   1. Using get_xl_max instead of ctx->misa_mxl_max as documentation.
>   2. Fix not clean split in patch 1.
>   3. Explicitly specified aligment for fld/fsd under all cases.
>
> v2<-v1:
>   1. Add mxlen check for fld when applies zama16b.
>   2. Relax fld/fsd alignment for MO_ATOM_IFALIGN to MO_ATOM_NONE.
>
> LIU Zhiwei (3):
>   target/riscv: Remove redundant insn length check for zama16b
>   target/riscv: Add MXLEN check for F/D/Q applies to zama16b
>   target/riscv: Relax fld alignment requirement

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/insn_trans/trans_rvd.c.inc | 18 ++++++++++++++++--
>  target/riscv/insn_trans/trans_rvf.c.inc |  4 ++--
>  target/riscv/insn_trans/trans_rvi.c.inc |  4 ++--
>  3 files changed, 20 insertions(+), 6 deletions(-)
>
> --
> 2.25.1
>
>