Hi,
Per Jason Wang's suggestion, iommufd nesting series[1] is split into
"Enable stage-1 translation for emulated device" series and
"Enable stage-1 translation for passthrough device" series.
This series enables stage-1 translation support for emulated device
in intel iommu which we called "modern" mode.
PATCH1-5: Some preparing work before support stage-1 translation
PATCH6-8: Implement stage-1 translation for emulated device
PATCH9-14: Emulate iotlb invalidation of stage-1 mapping
PATCH15: Set default aw_bits to 48 in scalable modern mode
PATCH16: Introduce "modern" mode to distinguish with legacy mode
PATCH17: Add qtest
Note in spec revision 3.4, it renames "First-level" to "First-stage",
"Second-level" to "Second-stage". But the scalable mode was added
before that change. So we keep old favor using First-level/fl/Second-level/sl
in code but change to use stage-1/stage-2 in commit log.
But keep in mind First-level/fl/stage-1 all have same meaning,
same for Second-level/sl/stage-2.
Qemu code can be found at [2]
[1] https://lists.gnu.org/archive/html/qemu-devel/2024-01/msg02740.html
[2] https://github.com/yiliu1765/qemu/tree/zhenzhong/iommufd_stage1_emu_v1
Thanks
Zhenzhong
Changelog:
v1:
- define VTD_HOST_AW_AUTO (Clement)
- passing pgtt as a parameter to vtd_update_iotlb (Clement)
- prefix sl_/fl_ to second/first level specific functions (Clement)
- pick reserved bit check from Clement, add his Co-developed-by
- Update test without using libqtest-single.h (Thomas)
rfcv2:
- split from nesting series (Jason)
- merged some commits from Clement
- add qtest (jason)
Clément Mathieu--Drif (5):
intel_iommu: Check if the input address is canonical
intel_iommu: Set accessed and dirty bits during first stage
translation
intel_iommu: Extract device IOTLB invalidation logic
intel_iommu: Add an internal API to find an address space with PASID
intel_iommu: Add support for PASID-based device IOTLB invalidation
Yi Liu (3):
intel_iommu: Rename slpte to pte
intel_iommu: Implement stage-1 translation
intel_iommu: Modify x-scalable-mode to be string option
Yu Zhang (1):
intel_iommu: Use the latest fault reasons defined by spec
Zhenzhong Duan (8):
intel_iommu: Make pasid entry type check accurate
intel_iommu: Add a placeholder variable for scalable modern mode
intel_iommu: Flush stage-2 cache in PADID-selective PASID-based iotlb
invalidation
intel_iommu: Flush stage-1 cache in iotlb invalidation
intel_iommu: Process PASID-based iotlb invalidation
intel_iommu: piotlb invalidation should notify unmap
intel_iommu: Set default aw_bits to 48 in scalable modren mode
tests/qtest: Add intel-iommu test
MAINTAINERS | 1 +
hw/i386/intel_iommu_internal.h | 90 +++-
include/hw/i386/intel_iommu.h | 8 +-
hw/i386/intel_iommu.c | 742 +++++++++++++++++++++++++++------
tests/qtest/intel-iommu-test.c | 71 ++++
tests/qtest/meson.build | 1 +
6 files changed, 764 insertions(+), 149 deletions(-)
create mode 100644 tests/qtest/intel-iommu-test.c
--
2.34.1