Implements RISC-V WorldGuard extension v0.4

[RFC PATCH 08/16] target/riscv: Allow global WG config to set WG CPU callbacks

Jim Shu posted 16 patches 4 months, 1 week ago

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Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bmeng.cn@gmail.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Eduardo Habkost <eduardo@habkost.net>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Yanan Wang <wangyanan55@huawei.com>, Peter Xu <peterx@redhat.com>, David Hildenbrand <david@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, Michael Rolnik <mrolnik@gmail.com>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Song Gao <gaosong@loongson.cn>, Laurent Vivier <laurent@vivier.eu>, Aurelien Jarno <aurelien@aurel32.net>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aleksandar Rikalo <arikalo@gmail.com>, Stafford Horne <shorne@gmail.com>, Nicholas Piggin <npiggin@gmail.com>, Yoshinori Sato <ysato@users.sourceforge.jp>, Ilya Leoshkevich <iii@linux.ibm.com>, Thomas Huth <thuth@redhat.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, Artyom Tarasenko <atar4qemu@gmail.com>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Max Filippov <jcmvbkbc@gmail.com>

Some WG CPU functions depend on global WG config (like num-of-world), so we let the global WG config device to set callbacks of a RISC-V HART. Signed-off-by: Jim Shu <jim.shu@sifive.com> --- target/riscv/cpu.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 2d3bfedbba..50a0fba127 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -431,6 +431,10 @@ struct CPUArchState { uint64_t kvm_timer_state; uint64_t kvm_timer_frequency; #endif /* CONFIG_KVM */ + + /* machine specific WorldGuard callback */ + void (*wg_reset)(CPURISCVState *env); + void (*wid_to_mem_attrs)(MemTxAttrs *attrs, uint32_t wid); }; /* -- 2.17.1