This patchset implements the Arm FEAT_ECV architectural feature, which provides:
* some new trap bits for hypervisors to trap accesses to various
counter and timer registers
* support for scaling of the event stream for the guest (which we don't
need to implement because our events are always nops)
* new registers CNTPCTSS_EL0 and NCTVCTSS_EL0 which are
"self-sychronizing" views of the CNTPCT_EL0 and CNTVCT_EL0, meaning
that no barriers are needed around their accesses. For us these
are just the same as the normal views, because all our sysregs are
inherently self-sychronizing.
* a new register CNTPOFF_EL2, which allows the hypervisor to set
an adjustable offset for what the guest sees in the physical
timer and counter (similar to the existing CNTVOFF_EL2 for the
virtual timer and counter)
These patchsets implement support for this and enable them in the 'max' CPU.
At the start of the series there's one patch doing some "move things to a
better header file" and one bugfix for a "no sensible guest should ever
do this" corner case.
I'm hoping we can get these reviewed in time to get them in before
softfreeze.
thanks
-- PMM
Peter Maydell (8):
target/arm: Move some register related defines to internals.h
target/arm: Timer _EL02 registers UNDEF for E2H == 0
target/arm: use FIELD macro for CNTHCTL bit definitions
target/arm: Don't allow RES0 CNTHCTL_EL2 bits to be written
target/arm: Implement new FEAT_ECV trap bits
target/arm: Define CNTPCTSS_EL0 and CNTVCTSS_EL0
target/arm: Implement FEAT_ECV CNTPOFF_EL2 handling
target/arm: Enable FEAT_ECV for 'max' CPU
docs/system/arm/emulation.rst | 1 +
target/arm/cpu-features.h | 10 ++
target/arm/cpu.h | 129 +----------------------
target/arm/internals.h | 143 +++++++++++++++++++++++++
target/arm/helper.c | 189 +++++++++++++++++++++++++++++++---
target/arm/tcg/cpu64.c | 1 +
target/arm/trace-events | 1 +
7 files changed, 334 insertions(+), 140 deletions(-)
--
2.34.1