[RFC PATCH 0/5] hw/i386/q35: Decouple virtual SMI# lines and wire them to ICH9 chipset

Philippe Mathieu-Daudé posted 5 patches 9 months ago
Failed in applying to current master (apply log)
include/hw/acpi/ich9.h        |  1 +
include/hw/acpi/ich9_tco.h    |  4 ++--
include/hw/i386/pc.h          |  2 --
include/hw/isa/ich9_lpc.h     | 12 ++++++++++++
include/hw/southbridge/ich9.h |  1 +
target/i386/cpu-internal.h    |  1 +
hw/acpi/ich9.c                |  3 ++-
hw/acpi/ich9_tco.c            | 13 ++++++++++---
hw/i386/pc.c                  |  9 ---------
hw/i386/pc_piix.c             |  4 ++--
hw/i386/pc_q35.c              | 26 ++++++++++++++++++++++++++
hw/isa/ich9_lpc.c             | 15 ++++-----------
hw/southbridge/ich9.c         |  1 +
target/i386/cpu-sysemu.c      | 11 +++++++++++
target/i386/cpu.c             |  2 ++
hw/isa/meson.build            |  3 +--
16 files changed, 76 insertions(+), 32 deletions(-)
[RFC PATCH 0/5] hw/i386/q35: Decouple virtual SMI# lines and wire them to ICH9 chipset
Posted by Philippe Mathieu-Daudé 9 months ago
Hi,

This is an experimental series to reduce calls to the
cpu_interrupt() API from generic HW/. I'm trying to use
the ICH9 chipset from a non-x86 machine. Without this
experiment, we can not because cpu_interrupt() is target
specific. Here the interrupt is decoupled using the QDev
GPIO API. Even if the SMI# line is left unconnected, the
device is still usable by a guest.

Based-on: <20240226111416.39217-1-philmd@linaro.org>

Philippe Mathieu-Daudé (5):
  target/i386/cpu: Expose SMI# IRQ line via QDev
  hw/i386/piix: Set CPU SMI# interrupt using QDev GPIO API
  hw/ahci/ich9_tco: Set CPU SMI# interrupt using QDev GPIO API
  hw/i386/q35: Wire virtual SMI# lines to ICH9 chipset
  hw/isa: Build ich9_lpc.c once

 include/hw/acpi/ich9.h        |  1 +
 include/hw/acpi/ich9_tco.h    |  4 ++--
 include/hw/i386/pc.h          |  2 --
 include/hw/isa/ich9_lpc.h     | 12 ++++++++++++
 include/hw/southbridge/ich9.h |  1 +
 target/i386/cpu-internal.h    |  1 +
 hw/acpi/ich9.c                |  3 ++-
 hw/acpi/ich9_tco.c            | 13 ++++++++++---
 hw/i386/pc.c                  |  9 ---------
 hw/i386/pc_piix.c             |  4 ++--
 hw/i386/pc_q35.c              | 26 ++++++++++++++++++++++++++
 hw/isa/ich9_lpc.c             | 15 ++++-----------
 hw/southbridge/ich9.c         |  1 +
 target/i386/cpu-sysemu.c      | 11 +++++++++++
 target/i386/cpu.c             |  2 ++
 hw/isa/meson.build            |  3 +--
 16 files changed, 76 insertions(+), 32 deletions(-)

-- 
2.41.0


Re: [RFC PATCH 0/5] hw/i386/q35: Decouple virtual SMI# lines and wire them to ICH9 chipset
Posted by Laszlo Ersek 9 months ago
Hi Phil,

On 2/26/24 17:49, Philippe Mathieu-Daudé wrote:
> Hi,
>
> This is an experimental series to reduce calls to the
> cpu_interrupt() API from generic HW/. I'm trying to use
> the ICH9 chipset from a non-x86 machine. Without this
> experiment, we can not because cpu_interrupt() is target
> specific. Here the interrupt is decoupled using the QDev
> GPIO API. Even if the SMI# line is left unconnected, the
> device is still usable by a guest.
>
> Based-on: <20240226111416.39217-1-philmd@linaro.org>
>
> Philippe Mathieu-Daudé (5):
>   target/i386/cpu: Expose SMI# IRQ line via QDev
>   hw/i386/piix: Set CPU SMI# interrupt using QDev GPIO API
>   hw/ahci/ich9_tco: Set CPU SMI# interrupt using QDev GPIO API
>   hw/i386/q35: Wire virtual SMI# lines to ICH9 chipset
>   hw/isa: Build ich9_lpc.c once
>
>  include/hw/acpi/ich9.h        |  1 +
>  include/hw/acpi/ich9_tco.h    |  4 ++--
>  include/hw/i386/pc.h          |  2 --
>  include/hw/isa/ich9_lpc.h     | 12 ++++++++++++
>  include/hw/southbridge/ich9.h |  1 +
>  target/i386/cpu-internal.h    |  1 +
>  hw/acpi/ich9.c                |  3 ++-
>  hw/acpi/ich9_tco.c            | 13 ++++++++++---
>  hw/i386/pc.c                  |  9 ---------
>  hw/i386/pc_piix.c             |  4 ++--
>  hw/i386/pc_q35.c              | 26 ++++++++++++++++++++++++++
>  hw/isa/ich9_lpc.c             | 15 ++++-----------
>  hw/southbridge/ich9.c         |  1 +
>  target/i386/cpu-sysemu.c      | 11 +++++++++++
>  target/i386/cpu.c             |  2 ++
>  hw/isa/meson.build            |  3 +--
>  16 files changed, 76 insertions(+), 32 deletions(-)
>

This series is over my head for a review, so the best I could offer
would be to test it.

However, even testing it seems like a challenge. First, I've found that,
when building QEMU at dccbaf0cc0f1, my usual libvirt guests don't start
-- I needed to search the web for the error message, and then apply the
revert series

  [PATCH 0/2] Revert "hw/i386/pc: Confine system flash handling to pc_sysfw"
  https://patchew.org/QEMU/20240226215909.30884-1-shentey@gmail.com/

With that, I managed to establish a "baseline" (test some OVMF SMM
stuff, such as UEFI variable services, ACPI S3 suspend/resume, VCPU
hotplug/hot-unplug).

Then I wanted to apply this series (on top of those reverts on top of
dccbaf0cc0f1). It doesn't apply.

Then I noticed you mentioned the dependency on:

  [PATCH v2 00/15] hw/southbridge: Extract ICH9 QOM container model
  https://patchew.org/QEMU/20240226111416.39217-1-philmd@linaro.org/

That only seems to make things more complicated:

- patchew says "Failed in applying to current master"

- in the blurb, you mention "Rebased on top of Bernhard patches";
however, the above reverts appear to undo some of those patches
precisely, so I'm unsure how stable that foundation should be
considered.

I'd prefer waiting until all these patches stabilized a bit, and the
foundation all went upstream, and then I'd have to apply (a new version
of) this particular series only, on the then-master branch, for testing.

Laszlo