On Tue, Jan 30, 2024 at 9:39 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Free up the riscv_cpu_mmu_index name for other usage;
> emphasize that the argument is 'env'.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu.h | 4 ++--
> target/riscv/cpu_helper.c | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 5f3955c38d..9c825c7b51 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -498,7 +498,7 @@ target_ulong riscv_cpu_get_geilen(CPURISCVState *env);
> void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen);
> bool riscv_cpu_vector_enabled(CPURISCVState *env);
> void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable);
> -int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch);
> +int riscv_env_mmu_index(CPURISCVState *env, bool ifetch);
> G_NORETURN void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
> MMUAccessType access_type,
> int mmu_idx, uintptr_t retaddr);
> @@ -507,7 +507,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> bool probe, uintptr_t retaddr);
> char *riscv_isa_string(RISCVCPU *cpu);
>
> -#define cpu_mmu_index riscv_cpu_mmu_index
> +#define cpu_mmu_index riscv_env_mmu_index
>
> #ifndef CONFIG_USER_ONLY
> void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index c7cc7eb423..15f87ecdb0 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -33,7 +33,7 @@
> #include "debug.h"
> #include "tcg/oversized-guest.h"
>
> -int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
> +int riscv_env_mmu_index(CPURISCVState *env, bool ifetch)
> {
> #ifdef CONFIG_USER_ONLY
> return 0;
> --
> 2.34.1
>
>