Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/openrisc/cpu.h | 10 ++--------
target/openrisc/cpu.c | 13 +++++++++++++
2 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index b454014ddd..7dbed8d8be 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -361,16 +361,10 @@ static inline void cpu_get_tb_cpu_state(CPUOpenRISCState *env, vaddr *pc,
| (env->sr & (SR_SM | SR_DME | SR_IME | SR_OVE));
}
+int openrisc_cpu_mmu_index(CPUState *cs, bool ifetch);
static inline int cpu_mmu_index(CPUOpenRISCState *env, bool ifetch)
{
- int ret = MMU_NOMMU_IDX; /* mmu is disabled */
-
- if (env->sr & (ifetch ? SR_IME : SR_DME)) {
- /* The mmu is enabled; test supervisor state. */
- ret = env->sr & SR_SM ? MMU_SUPERVISOR_IDX : MMU_USER_IDX;
- }
-
- return ret;
+ return openrisc_cpu_mmu_index(env_cpu(env), ifetch);
}
static inline uint32_t cpu_get_sr(const CPUOpenRISCState *env)
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 477d49d4bc..8670152c84 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -68,6 +68,18 @@ static bool openrisc_cpu_has_work(CPUState *cs)
CPU_INTERRUPT_TIMER);
}
+int openrisc_cpu_mmu_index(CPUState *cs, bool ifetch)
+{
+ CPUOpenRISCState *env = cpu_env(cs);
+
+ if (env->sr & (ifetch ? SR_IME : SR_DME)) {
+ /* The mmu is enabled; test supervisor state. */
+ return env->sr & SR_SM ? MMU_SUPERVISOR_IDX : MMU_USER_IDX;
+ }
+
+ return MMU_NOMMU_IDX; /* mmu is disabled */
+}
+
static void openrisc_disas_set_info(CPUState *cpu, disassemble_info *info)
{
info->print_insn = print_insn_or1k;
@@ -239,6 +251,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = openrisc_cpu_class_by_name;
cc->has_work = openrisc_cpu_has_work;
+ cc->mmu_index = openrisc_cpu_mmu_index;
cc->dump_state = openrisc_cpu_dump_state;
cc->set_pc = openrisc_cpu_set_pc;
cc->get_pc = openrisc_cpu_get_pc;
--
2.34.1