On Mon, Dec 18, 2023 at 11:00 PM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Certain S-mode profiles, like RVA22S64 and RVA23S64, mandate all the
> mandatory extensions of their respective U-mode profiles. RVA22S64
> includes all mandatory extensions of RVA22U64, and the same happens with
> RVA23 profiles.
>
> Add a 'parent' field to allow profiles to enable other profiles. This
> will allow us to describe S-mode profiles by specifying their parent
> U-mode profile, then adding just the S-mode specific extensions.
>
> We're naming the field 'parent' to consider the possibility of other
> uses (e.g. a s-mode profile including a previous s-mode profile) in the
> future.
>
> Suggested-by: Andrew Jones <ajones@ventanamicro.com>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu.c | 1 +
> target/riscv/cpu.h | 1 +
> target/riscv/tcg/tcg-cpu.c | 14 +++++++++++++-
> 3 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 6795f5da41..aa33e7a1cf 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -1540,6 +1540,7 @@ Property riscv_cpu_options[] = {
> * having a cfg offset) at this moment.
> */
> static RISCVCPUProfile RVA22U64 = {
> + .parent = NULL,
> .name = "rva22u64",
> .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVU,
> .priv_spec = RISCV_PROFILE_ATTR_UNUSED,
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 6c5fceb5f5..44fb0a9ca8 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -77,6 +77,7 @@ const char *riscv_get_misa_ext_description(uint32_t bit);
> #define CPU_CFG_OFFSET(_prop) offsetof(struct RISCVCPUConfig, _prop)
>
> typedef struct riscv_cpu_profile {
> + struct riscv_cpu_profile *parent;
> const char *name;
> uint32_t misa_ext;
> bool enabled;
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index 152f95718b..6284d36809 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -797,7 +797,7 @@ static void riscv_cpu_validate_profile(RISCVCPU *cpu,
> CPURISCVState *env = &cpu->env;
> const char *warn_msg = "Profile %s mandates disabled extension %s";
> bool send_warn = profile->user_set && profile->enabled;
> - bool profile_impl = true;
> + bool parent_enabled, profile_impl = true;
> int i;
>
> #ifndef CONFIG_USER_ONLY
> @@ -850,6 +850,13 @@ static void riscv_cpu_validate_profile(RISCVCPU *cpu,
> }
>
> profile->enabled = profile_impl;
> +
> + if (profile->parent != NULL) {
> + parent_enabled = object_property_get_bool(OBJECT(cpu),
> + profile->parent->name,
> + NULL);
> + profile->enabled = profile->enabled && parent_enabled;
> + }
> }
>
> static void riscv_cpu_validate_profiles(RISCVCPU *cpu)
> @@ -1107,6 +1114,11 @@ static void cpu_set_profile(Object *obj, Visitor *v, const char *name,
> profile->user_set = true;
> profile->enabled = value;
>
> + if (profile->parent != NULL) {
> + object_property_set_bool(obj, profile->parent->name,
> + profile->enabled, NULL);
> + }
> +
> if (profile->enabled) {
> cpu->env.priv_ver = profile->priv_spec;
> }
> --
> 2.43.0
>
>