From: Zhao Liu <zhao1.liu@intel.com>
Implement CPUTopoClass.check_topo_child() in cpu-slot to be compatible
with the limitations of the current smp topology.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
hw/core/cpu-slot.c | 37 +++++++++++++++++++++++++++++++++++++
hw/core/cpu-topo.c | 2 +-
include/hw/core/cpu-slot.h | 2 ++
include/hw/core/cpu-topo.h | 1 +
4 files changed, 41 insertions(+), 1 deletion(-)
diff --git a/hw/core/cpu-slot.c b/hw/core/cpu-slot.c
index e8e6f4d25532..2a796ad5b6e7 100644
--- a/hw/core/cpu-slot.c
+++ b/hw/core/cpu-slot.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "hw/core/cpu-slot.h"
+#include "qapi/error.h"
static inline
CPUTopoStatEntry *get_topo_stat_entry(CPUTopoStat *stat,
@@ -94,6 +95,37 @@ static void cpu_slot_update_topo_info(CPUTopoState *root, CPUTopoState *child,
}
}
+static void cpu_slot_check_topo_support(CPUTopoState *root, CPUTopoState *child,
+ Error **errp)
+{
+ CPUSlot *slot = CPU_SLOT(root);
+ CPUTopoLevel child_level = CPU_TOPO_LEVEL(child);
+
+ if (!test_bit(child_level, slot->supported_levels)) {
+ error_setg(errp, "cpu topo: the level %s is not supported",
+ cpu_topo_level_to_string(child_level));
+ return;
+ }
+
+ /*
+ * Currently we doesn't support hybrid topology. For SMP topology,
+ * each child under the same parent are same type.
+ */
+ if (child->parent->num_children) {
+ CPUTopoState *sibling = QTAILQ_FIRST(&child->parent->children);
+ const char *sibling_type = object_get_typename(OBJECT(sibling));
+ const char *child_type = object_get_typename(OBJECT(child));
+
+ if (strcmp(sibling_type, child_type)) {
+ error_setg(errp, "Invalid smp topology: different CPU "
+ "topology types (%s child vs %s sibling) "
+ "under the same parent (%s).",
+ child_type, sibling_type,
+ object_get_typename(OBJECT(child->parent)));
+ }
+ }
+}
+
static void cpu_slot_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -104,6 +136,7 @@ static void cpu_slot_class_init(ObjectClass *oc, void *data)
tc->level = CPU_TOPO_ROOT;
tc->update_topo_info = cpu_slot_update_topo_info;
+ tc->check_topo_child = cpu_slot_check_topo_support;
}
static void cpu_slot_instance_init(Object *obj)
@@ -112,6 +145,10 @@ static void cpu_slot_instance_init(Object *obj)
QTAILQ_INIT(&slot->cores);
set_bit(CPU_TOPO_ROOT, slot->stat.curr_levels);
+
+ /* Set all levels by default. */
+ bitmap_fill(slot->supported_levels, USER_AVAIL_LEVEL_NUM);
+ clear_bit(CPU_TOPO_UNKNOWN, slot->supported_levels);
}
static const TypeInfo cpu_slot_type_info = {
diff --git a/hw/core/cpu-topo.c b/hw/core/cpu-topo.c
index 687a4cc566ec..351112ca7a73 100644
--- a/hw/core/cpu-topo.c
+++ b/hw/core/cpu-topo.c
@@ -24,7 +24,7 @@
#include "hw/qdev-properties.h"
#include "qapi/error.h"
-static const char *cpu_topo_level_to_string(CPUTopoLevel level)
+const char *cpu_topo_level_to_string(CPUTopoLevel level)
{
switch (level) {
case CPU_TOPO_UNKNOWN:
diff --git a/include/hw/core/cpu-slot.h b/include/hw/core/cpu-slot.h
index fa2bd4af247d..7bf51988afb3 100644
--- a/include/hw/core/cpu-slot.h
+++ b/include/hw/core/cpu-slot.h
@@ -77,6 +77,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(CPUSlot, CPU_SLOT)
* queues for other topology levels to facilitate traversal
* when necessary.
* @stat: Statistical topology information for topology tree.
+ * @supported_levels: Supported topology levels for topology tree.
*/
struct CPUSlot {
/*< private >*/
@@ -85,6 +86,7 @@ struct CPUSlot {
/*< public >*/
QTAILQ_HEAD(, CPUCore) cores;
CPUTopoStat stat;
+ DECLARE_BITMAP(supported_levels, USER_AVAIL_LEVEL_NUM);
};
#endif /* CPU_SLOT_H */
diff --git a/include/hw/core/cpu-topo.h b/include/hw/core/cpu-topo.h
index 453bacbb558b..d27da0335c42 100644
--- a/include/hw/core/cpu-topo.h
+++ b/include/hw/core/cpu-topo.h
@@ -102,5 +102,6 @@ int cpu_topo_child_foreach(CPUTopoState *topo, unsigned long *levels,
int cpu_topo_child_foreach_recursive(CPUTopoState *topo,
unsigned long *levels,
topo_fn fn, void *opaque);
+const char *cpu_topo_level_to_string(CPUTopoLevel level);
#endif /* CPU_TOPO_H */
--
2.34.1