On 25/09/2023 06:03, Nick Bowler wrote:
> I noticed that the fmul8x16 instruction did not appear to be emulated
> correctly[1]. It would seem that emulation was not using a single-
> precision input register like the real hardware does, but rather a
> double-precision register, causing it to operate on the wrong data.
>
> Every other VIS instruction which contains one or more single-precision
> inputs and a double-precision output has the exact same problem.
>
> A few computational problems are found and fixed by this series too.
>
> All patches can be applied independently, except patch 2 adds some
> helpers which are subsequently needed by patches 3, 4 and 5.
>
> Emulation results are tested by manually comparing the output of a small
> Linux test program on an UltraSparc II against the output of running the
> same binary under qemu-sparc32plus on a ppc64le host system.
>
> [1] https://gitlab.com/qemu-project/qemu/-/issues/1901
>
> Nick Bowler (8):
> target/sparc: Fix VIS fmul8x16 input register.
> target/sparc: Fix VIS fmul8x16au instruction.
> target/sparc: Fix VIS fmul8x16al instruction.
> target/sparc: Fix VIS fmuld8sux16 instruction.
> target/sparc: Fix VIS fmuld8ulx16 instruction.
> target/sparc: Fix VIS fpmerge input registers.
> target/sparc: Fix VIS fexpand input register.
> target/sparc: Fix VIS subtraction instructions.
>
> target/sparc/helper.h | 14 ++---
> target/sparc/translate.c | 42 +++++++++++---
> target/sparc/vis_helper.c | 119 +++++++++++++++++++-------------------
> 3 files changed, 101 insertions(+), 74 deletions(-)
Thanks for the patches, Nick. I've had a look at the series, and whilst I'm not
overly familiar with the VIS instructions, your changes and detailed explanations
look good against a cursory read of the SPARCv9 specification.
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
I'll wait a few days to see if either Artyom or Richard has any further comments, but
if not then I'll queue them to my qemu-sparc branch.
ATB,
Mark.