Hi; here's the latest round of arm patches. I have included also
my patchset for the RTC devices to avoid keeping time_t and
time_t diffs in 32-bit variables.
thanks
-- PMM
The following changes since commit 156618d9ea67f2f2e31d9dedd97f2dcccbe6808c:
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging (2023-08-30 09:20:27 -0400)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230831
for you to fetch changes up to e73b8bb8a3e9a162f70e9ffbf922d4fafc96bbfb:
hw/arm: Set number of MPU regions correctly for an505, an521, an524 (2023-08-31 11:07:02 +0100)
----------------------------------------------------------------
target-arm queue:
* Some of the preliminary patches for Cortex-A710 support
* i.MX7 and i.MX6UL refactoring
* Implement SRC device for i.MX7
* Catch illegal-exception-return from EL3 with bad NSE/NS
* Use 64-bit offsets for holding time_t differences in RTC devices
* Model correct number of MPU regions for an505, an521, an524 boards
----------------------------------------------------------------
Alex Bennée (1):
target/arm: properly document FEAT_CRC32
Jean-Christophe Dubois (6):
Remove i.MX7 IOMUX GPR device from i.MX6UL
Refactor i.MX6UL processor code
Add i.MX6UL missing devices.
Refactor i.MX7 processor code
Add i.MX7 missing TZ devices and memory regions
Add i.MX7 SRC device implementation
Peter Maydell (8):
target/arm: Catch illegal-exception-return from EL3 with bad NSE/NS
hw/rtc/m48t59: Use 64-bit arithmetic in set_alarm()
hw/rtc/twl92230: Use int64_t for sec_offset and alm_sec
hw/rtc/aspeed_rtc: Use 64-bit offset for holding time_t difference
rtc: Use time_t for passing and returning time offsets
target/arm: Do all "ARM_FEATURE_X implies Y" checks in post_init
hw/arm/armv7m: Add mpu-ns-regions and mpu-s-regions properties
hw/arm: Set number of MPU regions correctly for an505, an521, an524
Richard Henderson (9):
target/arm: Reduce dcz_blocksize to uint8_t
target/arm: Allow cpu to configure GM blocksize
target/arm: Support more GM blocksizes
target/arm: When tag memory is not present, set MTE=1
target/arm: Introduce make_ccsidr64
target/arm: Apply access checks to neoverse-n1 special registers
target/arm: Apply access checks to neoverse-v1 special registers
target/arm: Suppress FEAT_TRBE (Trace Buffer Extension)
target/arm: Implement FEAT_HPDS2 as a no-op
docs/system/arm/emulation.rst | 2 +
include/hw/arm/armsse.h | 5 +
include/hw/arm/armv7m.h | 8 +
include/hw/arm/fsl-imx6ul.h | 158 ++++++++++++++++---
include/hw/arm/fsl-imx7.h | 338 ++++++++++++++++++++++++++++++-----------
include/hw/misc/imx7_src.h | 66 ++++++++
include/hw/rtc/aspeed_rtc.h | 2 +-
include/sysemu/rtc.h | 4 +-
target/arm/cpregs.h | 2 +
target/arm/cpu.h | 5 +-
target/arm/internals.h | 6 -
target/arm/tcg/translate.h | 2 +
hw/arm/armsse.c | 16 ++
hw/arm/armv7m.c | 21 +++
hw/arm/fsl-imx6ul.c | 174 +++++++++++++--------
hw/arm/fsl-imx7.c | 201 +++++++++++++++++++-----
hw/arm/mps2-tz.c | 29 ++++
hw/misc/imx7_src.c | 276 +++++++++++++++++++++++++++++++++
hw/rtc/aspeed_rtc.c | 5 +-
hw/rtc/m48t59.c | 2 +-
hw/rtc/twl92230.c | 4 +-
softmmu/rtc.c | 4 +-
target/arm/cpu.c | 207 ++++++++++++++-----------
target/arm/helper.c | 15 +-
target/arm/tcg/cpu32.c | 2 +-
target/arm/tcg/cpu64.c | 102 +++++++++----
target/arm/tcg/helper-a64.c | 9 ++
target/arm/tcg/mte_helper.c | 90 ++++++++---
target/arm/tcg/translate-a64.c | 5 +-
hw/misc/meson.build | 1 +
hw/misc/trace-events | 4 +
31 files changed, 1393 insertions(+), 372 deletions(-)
create mode 100644 include/hw/misc/imx7_src.h
create mode 100644 hw/misc/imx7_src.c