On 2023/4/28 22:47, Lawrence Hunter wrote:
> From: Dickon Hood <dickon.hood@codethink.co.uk>
>
> Zvbb (implemented in later commit) has a widening instruction, which
> requires an extra check on the enabled extensions. Refactor
> GEN_OPIVX_WIDEN_TRANS() to take a check function to avoid reimplementing
> it.
>
> Signed-off-by: Dickon Hood <dickon.hood@codethink.co.uk>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Weiwei Li
> target/riscv/insn_trans/trans_rvv.c.inc | 52 +++++++++++--------------
> 1 file changed, 23 insertions(+), 29 deletions(-)
>
> diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
> index 21731b784ec..2c2a097b76d 100644
> --- a/target/riscv/insn_trans/trans_rvv.c.inc
> +++ b/target/riscv/insn_trans/trans_rvv.c.inc
> @@ -1526,30 +1526,24 @@ static bool opivx_widen_check(DisasContext *s, arg_rmrr *a)
> vext_check_ds(s, a->rd, a->rs2, a->vm);
> }
>
> -static bool do_opivx_widen(DisasContext *s, arg_rmrr *a,
> - gen_helper_opivx *fn)
> -{
> - if (opivx_widen_check(s, a)) {
> - return opivx_trans(a->rd, a->rs1, a->rs2, a->vm, fn, s);
> - }
> - return false;
> +#define GEN_OPIVX_WIDEN_TRANS(NAME, CHECK) \
> +static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \
> +{ \
> + if (CHECK(s, a)) { \
> + static gen_helper_opivx * const fns[3] = { \
> + gen_helper_##NAME##_b, \
> + gen_helper_##NAME##_h, \
> + gen_helper_##NAME##_w \
> + }; \
> + return opivx_trans(a->rd, a->rs1, a->rs2, a->vm, fns[s->sew], s); \
> + } \
> + return false; \
> }
>
> -#define GEN_OPIVX_WIDEN_TRANS(NAME) \
> -static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \
> -{ \
> - static gen_helper_opivx * const fns[3] = { \
> - gen_helper_##NAME##_b, \
> - gen_helper_##NAME##_h, \
> - gen_helper_##NAME##_w \
> - }; \
> - return do_opivx_widen(s, a, fns[s->sew]); \
> -}
> -
> -GEN_OPIVX_WIDEN_TRANS(vwaddu_vx)
> -GEN_OPIVX_WIDEN_TRANS(vwadd_vx)
> -GEN_OPIVX_WIDEN_TRANS(vwsubu_vx)
> -GEN_OPIVX_WIDEN_TRANS(vwsub_vx)
> +GEN_OPIVX_WIDEN_TRANS(vwaddu_vx, opivx_widen_check)
> +GEN_OPIVX_WIDEN_TRANS(vwadd_vx, opivx_widen_check)
> +GEN_OPIVX_WIDEN_TRANS(vwsubu_vx, opivx_widen_check)
> +GEN_OPIVX_WIDEN_TRANS(vwsub_vx, opivx_widen_check)
>
> /* WIDEN OPIVV with WIDEN */
> static bool opiwv_widen_check(DisasContext *s, arg_rmrr *a)
> @@ -1997,9 +1991,9 @@ GEN_OPIVX_TRANS(vrem_vx, opivx_check)
> GEN_OPIVV_WIDEN_TRANS(vwmul_vv, opivv_widen_check)
> GEN_OPIVV_WIDEN_TRANS(vwmulu_vv, opivv_widen_check)
> GEN_OPIVV_WIDEN_TRANS(vwmulsu_vv, opivv_widen_check)
> -GEN_OPIVX_WIDEN_TRANS(vwmul_vx)
> -GEN_OPIVX_WIDEN_TRANS(vwmulu_vx)
> -GEN_OPIVX_WIDEN_TRANS(vwmulsu_vx)
> +GEN_OPIVX_WIDEN_TRANS(vwmul_vx, opivx_widen_check)
> +GEN_OPIVX_WIDEN_TRANS(vwmulu_vx, opivx_widen_check)
> +GEN_OPIVX_WIDEN_TRANS(vwmulsu_vx, opivx_widen_check)
>
> /* Vector Single-Width Integer Multiply-Add Instructions */
> GEN_OPIVV_TRANS(vmacc_vv, opivv_check)
> @@ -2015,10 +2009,10 @@ GEN_OPIVX_TRANS(vnmsub_vx, opivx_check)
> GEN_OPIVV_WIDEN_TRANS(vwmaccu_vv, opivv_widen_check)
> GEN_OPIVV_WIDEN_TRANS(vwmacc_vv, opivv_widen_check)
> GEN_OPIVV_WIDEN_TRANS(vwmaccsu_vv, opivv_widen_check)
> -GEN_OPIVX_WIDEN_TRANS(vwmaccu_vx)
> -GEN_OPIVX_WIDEN_TRANS(vwmacc_vx)
> -GEN_OPIVX_WIDEN_TRANS(vwmaccsu_vx)
> -GEN_OPIVX_WIDEN_TRANS(vwmaccus_vx)
> +GEN_OPIVX_WIDEN_TRANS(vwmaccu_vx, opivx_widen_check)
> +GEN_OPIVX_WIDEN_TRANS(vwmacc_vx, opivx_widen_check)
> +GEN_OPIVX_WIDEN_TRANS(vwmaccsu_vx, opivx_widen_check)
> +GEN_OPIVX_WIDEN_TRANS(vwmaccus_vx, opivx_widen_check)
>
> /* Vector Integer Merge and Move Instructions */
> static bool trans_vmv_v_v(DisasContext *s, arg_vmv_v_v *a)