On Tue, Oct 11, 2022 at 05:19:11PM -0400, Gregory Price wrote:
> Summary of Changes:
> 1) Correction of PCI_CLASS from STORAGE_EXPRESS to MEMORY_CXL on init
> 2) Add CXL_CAPACITY_MULTIPLIER definition to replace magic numbers
> 3) Refactor CDAT DSMAS Initialization for multi-region initialization
> 4) Multi-Region and Volatile Memory support for CXL Type-3 Devices
> 5) Test and Documentation updates
>
> Developed with input from Jonathan Cameron and Davidloh Bueso.
>
> This series brings 2 features to CXL Type-3 Devices:
> 1) Volatile Memory Region support
> 2) Multi-Region support (1 Volatile, 1 Persistent)
>
> In this series we implement multi-region and volatile region support
> through 6 major changes to CXL devices
> 1) The HostMemoryBackend [hostmem] has been replaced by two
> [hostvmem] and [hostpmem] to store volatile and persistent memory
> respectively
> 2) The single AddressSpace has been replaced by two AddressSpaces
> [hostvmem_as] and [hostpmem_as] to map respective memdevs.
> 3) Each memory region size and total region are stored separately
> 4) The CDAT and DVSEC memory map entries have been updated:
> a) if vmem is present, vmem is mapped at DPA(0)
> b) if pmem is present
> i) and vmem is present, pmem is mapped at DPA(vmem->size)
> ii) else, pmem is mapped at DPA(0)
> c) partitioning of pmem is not supported in this patch set but
> has been discussed and this design should suffice.
> 5) Read/Write functions have been updated to access AddressSpaces
> according to the mapping described in #4
> 6) cxl-mailbox has been updated to report the respective size of
> volatile and persistent memory regions
>
> CXL Spec (3.0) Section 8.2.9.8.2.0 - Get Partition Info
> Active Volatile Memory
> The device shall provide this volatile capacity starting at DPA 0
> Active Persistent Memory
> The device shall provide this persistent capacity starting at the
> DPA immediately following the volatile capacity
>
> Partitioning of Persistent Memory regions may be supported on following
> patch sets.
>
> Submitted as an extention to the CDAT emulation because the CDAT DSMAS
> entry concerns memory mapping and is required to successfully map memory
> regions correctly in bios/efi.
As there will be v8 of CDAT patches I expect there will be a rebase
of this patchset too.
> Gregory Price (5):
> hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL
> hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition
> hw/mem/cxl_type: Generalize CDATDsmas initialization for Memory
> Regions
> hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent)
> cxl: update tests and documentation for new cxl properties
>
> docs/system/devices/cxl.rst | 53 ++++-
> hw/cxl/cxl-mailbox-utils.c | 23 +-
> hw/mem/cxl_type3.c | 449 +++++++++++++++++++++++-------------
> include/hw/cxl/cxl_device.h | 11 +-
> tests/qtest/cxl-test.c | 81 ++++++-
> 5 files changed, 416 insertions(+), 201 deletions(-)
>
> --
> 2.37.3