[PATCH v6 00/24] target/arm: Cleanups, new features, new cpus

Richard Henderson posted 24 patches 1 year, 11 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20220506180242.216785-1-richard.henderson@linaro.org
Maintainers: Peter Maydell <peter.maydell@linaro.org>, Radoslaw Biernacki <rad@semihalf.com>, Leif Lindholm <leif@nuviainc.com>
docs/system/arm/emulation.rst |  10 +
docs/system/arm/virt.rst      |   2 +
target/arm/cpregs.h           |  11 +
target/arm/cpu.h              |  23 ++
target/arm/helper.h           |   1 +
target/arm/internals.h        |  16 +
target/arm/syndrome.h         |   5 +
target/arm/a32.decode         |  16 +-
target/arm/t32.decode         |  18 +-
hw/arm/sbsa-ref.c             |   2 +
hw/arm/virt.c                 |   2 +
target/arm/cpu.c              |  66 +++-
target/arm/cpu64.c            | 353 +++++++++++---------
target/arm/cpu_tcg.c          | 227 +++++++++----
target/arm/helper.c           | 600 ++++++++++++++++++++--------------
target/arm/op_helper.c        |  43 +++
target/arm/translate-a64.c    |  18 +
target/arm/translate.c        |  23 ++
18 files changed, 949 insertions(+), 487 deletions(-)
[PATCH v6 00/24] target/arm: Cleanups, new features, new cpus
Posted by Richard Henderson 1 year, 11 months ago
Changes for v6:
  * Expand the commit message for "Drop EL3 no EL2 fallbacks" (pmm)

All patches are reviewed.


r~


Richard Henderson (24):
  target/arm: Handle cpreg registration for missing EL
  target/arm: Drop EL3 no EL2 fallbacks
  target/arm: Merge zcr reginfo
  target/arm: Adjust definition of CONTEXTIDR_EL2
  target/arm: Move cortex impdef sysregs to cpu_tcg.c
  target/arm: Update qemu-system-arm -cpu max to cortex-a57
  target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max
  target/arm: Split out aa32_max_features
  target/arm: Annotate arm_max_initfn with FEAT identifiers
  target/arm: Use field names for manipulating EL2 and EL3 modes
  target/arm: Enable FEAT_Debugv8p2 for -cpu max
  target/arm: Enable FEAT_Debugv8p4 for -cpu max
  target/arm: Add minimal RAS registers
  target/arm: Enable SCR and HCR bits for RAS
  target/arm: Implement virtual SError exceptions
  target/arm: Implement ESB instruction
  target/arm: Enable FEAT_RAS for -cpu max
  target/arm: Enable FEAT_IESB for -cpu max
  target/arm: Enable FEAT_CSV2 for -cpu max
  target/arm: Enable FEAT_CSV2_2 for -cpu max
  target/arm: Enable FEAT_CSV3 for -cpu max
  target/arm: Enable FEAT_DGH for -cpu max
  target/arm: Define cortex-a76
  target/arm: Define neoverse-n1

 docs/system/arm/emulation.rst |  10 +
 docs/system/arm/virt.rst      |   2 +
 target/arm/cpregs.h           |  11 +
 target/arm/cpu.h              |  23 ++
 target/arm/helper.h           |   1 +
 target/arm/internals.h        |  16 +
 target/arm/syndrome.h         |   5 +
 target/arm/a32.decode         |  16 +-
 target/arm/t32.decode         |  18 +-
 hw/arm/sbsa-ref.c             |   2 +
 hw/arm/virt.c                 |   2 +
 target/arm/cpu.c              |  66 +++-
 target/arm/cpu64.c            | 353 +++++++++++---------
 target/arm/cpu_tcg.c          | 227 +++++++++----
 target/arm/helper.c           | 600 ++++++++++++++++++++--------------
 target/arm/op_helper.c        |  43 +++
 target/arm/translate-a64.c    |  18 +
 target/arm/translate.c        |  23 ++
 18 files changed, 949 insertions(+), 487 deletions(-)

-- 
2.34.1
Re: [PATCH v6 00/24] target/arm: Cleanups, new features, new cpus
Posted by Peter Maydell 1 year, 11 months ago
On Fri, 6 May 2022 at 19:03, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Changes for v6:
>   * Expand the commit message for "Drop EL3 no EL2 fallbacks" (pmm)
>
> All patches are reviewed.
>
>
> r~



Applied to target-arm.next, thanks.

-- PMM