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[PATCH] hw/gpio/aspeed_gpio: Fix QOM pin property

Peter Delevoryas posted 1 patch 1 year, 12 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20220502080827.244815-1-pdel@fb.com
Maintainers: "Cédric Le Goater" <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>, Andrew Jeffery <andrew@aj.id.au>, Joel Stanley <joel@jms.id.au>, Thomas Huth <thuth@redhat.com>, Laurent Vivier <lvivier@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>
hw/gpio/aspeed_gpio.c          |  2 +-
tests/qtest/aspeed_gpio-test.c | 87 ++++++++++++++++++++++++++++++++++
tests/qtest/meson.build        |  3 +-
3 files changed, 90 insertions(+), 2 deletions(-)
create mode 100644 tests/qtest/aspeed_gpio-test.c
[PATCH] hw/gpio/aspeed_gpio: Fix QOM pin property
Posted by Peter Delevoryas 1 year, 12 months ago 
I was setting gpioV4-7 to "1110" using the QOM pin property handler and
noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too.

    (qemu) qom-set /machine/soc/gpio gpioV4 true
    (qemu) qom-set /machine/soc/gpio gpioV5 true
    (qemu) qom-set /machine/soc/gpio gpioV6 true
    (qemu) qom-get /machine/soc/gpio gpioV4
    true
    (qemu) qom-set /machine/soc/gpio gpioV7 false
    (qemu) qom-get /machine/soc/gpio gpioV4
    false

An expression in aspeed_gpio_set_pin_level was using a logical NOT
operator instead of a bitwise NOT operator:

    value &= !pin_mask;

The original author probably intended to make a bitwise NOT expression
"~", but mistakenly used a logical NOT operator "!" instead. Some
programming languages like Rust use "!" for both purposes.

Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and
AST2500")
Signed-off-by: Peter Delevoryas <pdel@fb.com>
---
 hw/gpio/aspeed_gpio.c          |  2 +-
 tests/qtest/aspeed_gpio-test.c | 87 ++++++++++++++++++++++++++++++++++
 tests/qtest/meson.build        |  3 +-
 3 files changed, 90 insertions(+), 2 deletions(-)
 create mode 100644 tests/qtest/aspeed_gpio-test.c

diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
index c63634d3d3..9b736e7a9f 100644
--- a/hw/gpio/aspeed_gpio.c
+++ b/hw/gpio/aspeed_gpio.c
@@ -312,7 +312,7 @@ static void aspeed_gpio_set_pin_level(AspeedGPIOState *s, uint32_t set_idx,
     if (level) {
         value |= pin_mask;
     } else {
-        value &= !pin_mask;
+        value &= ~pin_mask;
     }
 
     aspeed_gpio_update(s, &s->sets[set_idx], value);
diff --git a/tests/qtest/aspeed_gpio-test.c b/tests/qtest/aspeed_gpio-test.c
new file mode 100644
index 0000000000..c1003f2d1b
--- /dev/null
+++ b/tests/qtest/aspeed_gpio-test.c
@@ -0,0 +1,87 @@
+/*
+ * QTest testcase for the Aspeed GPIO Controller.
+ *
+ * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/bitops.h"
+#include "qemu/timer.h"
+#include "qapi/qmp/qdict.h"
+#include "libqtest-single.h"
+
+static bool qom_get_bool(QTestState *s, const char *path, const char *property)
+{
+    QDict *r;
+    bool b;
+
+    r = qtest_qmp(s, "{ 'execute': 'qom-get', 'arguments': "
+                     "{ 'path': %s, 'property': %s } }", path, property);
+    b = qdict_get_bool(r, "return");
+    qobject_unref(r);
+
+    return b;
+}
+
+static void qom_set_bool(QTestState *s, const char *path, const char *property,
+                         bool value)
+{
+    QDict *r;
+
+    r = qtest_qmp(s, "{ 'execute': 'qom-set', 'arguments': "
+                     "{ 'path': %s, 'property': %s, 'value': %i } }",
+                     path, property, value);
+    qobject_unref(r);
+}
+
+static void test_set_colocated_pins(const void *data)
+{
+    QTestState *s = (QTestState *)data;
+
+    /*
+     * gpioV4-7 occupy bits within a single 32-bit value, so we want to make
+     * sure that modifying one doesn't affect the other.
+     */
+    qom_set_bool(s, "/machine/soc/gpio", "gpioV4", true);
+    qom_set_bool(s, "/machine/soc/gpio", "gpioV5", false);
+    qom_set_bool(s, "/machine/soc/gpio", "gpioV6", true);
+    qom_set_bool(s, "/machine/soc/gpio", "gpioV7", false);
+    g_assert(qom_get_bool(s, "/machine/soc/gpio", "gpioV4"));
+    g_assert(!qom_get_bool(s, "/machine/soc/gpio", "gpioV5"));
+    g_assert(qom_get_bool(s, "/machine/soc/gpio", "gpioV6"));
+    g_assert(!qom_get_bool(s, "/machine/soc/gpio", "gpioV7"));
+}
+
+int main(int argc, char **argv)
+{
+    QTestState *s;
+    int r;
+
+    g_test_init(&argc, &argv, NULL);
+
+    s = qtest_init("-machine ast2600-evb");
+    qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
+                        test_set_colocated_pins);
+    r = g_test_run();
+    qtest_quit(s);
+
+    return r;
+}
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index 6b9807c183..32fb8cf755 100644
--- a/tests/qtest/meson.build
+++ b/tests/qtest/meson.build
@@ -189,7 +189,8 @@ qtests_npcm7xx = \
    (slirp.found() ? ['npcm7xx_emc-test'] : [])
 qtests_aspeed = \
   ['aspeed_hace-test',
-   'aspeed_smc-test']
+   'aspeed_smc-test',
+   'aspeed_gpio-test']
 qtests_arm = \
   (config_all_devices.has_key('CONFIG_MPS2') ? ['sse-timer-test'] : []) + \
   (config_all_devices.has_key('CONFIG_CMSDK_APB_DUALTIMER') ? ['cmsdk-apb-dualtimer-test'] : []) + \
-- 
2.30.2
Re: [PATCH] hw/gpio/aspeed_gpio: Fix QOM pin property
Posted by Rashmica Gupta 1 year, 11 months ago 
On Mon, 2022-05-02 at 01:08 -0700, Peter Delevoryas wrote:
> I was setting gpioV4-7 to "1110" using the QOM pin property handler
> and
> noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too.
> 
>     (qemu) qom-set /machine/soc/gpio gpioV4 true
>     (qemu) qom-set /machine/soc/gpio gpioV5 true
>     (qemu) qom-set /machine/soc/gpio gpioV6 true
>     (qemu) qom-get /machine/soc/gpio gpioV4
>     true
>     (qemu) qom-set /machine/soc/gpio gpioV7 false
>     (qemu) qom-get /machine/soc/gpio gpioV4
>     false
> 
> An expression in aspeed_gpio_set_pin_level was using a logical NOT
> operator instead of a bitwise NOT operator:
> 
>     value &= !pin_mask;
> 
> The original author probably intended to make a bitwise NOT
> expression
> "~", but mistakenly used a logical NOT operator "!" instead. Some
> programming languages like Rust use "!" for both purposes.
> 
> Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for
> AST2400 and
> AST2500")
> Signed-off-by: Peter Delevoryas <pdel@fb.com>


Oops! Thanks for catching this. The tests look good.
Re: [PATCH] hw/gpio/aspeed_gpio: Fix QOM pin property
Posted by Peter Delevoryas 1 year, 11 months ago 

> On May 18, 2022, at 12:31 AM, Rashmica Gupta <rashmica@linux.ibm.com> wrote:
> 
> On Mon, 2022-05-02 at 01:08 -0700, Peter Delevoryas wrote:
>> I was setting gpioV4-7 to "1110" using the QOM pin property handler
>> and
>> noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too.
>> 
>>     (qemu) qom-set /machine/soc/gpio gpioV4 true
>>     (qemu) qom-set /machine/soc/gpio gpioV5 true
>>     (qemu) qom-set /machine/soc/gpio gpioV6 true
>>     (qemu) qom-get /machine/soc/gpio gpioV4
>>     true
>>     (qemu) qom-set /machine/soc/gpio gpioV7 false
>>     (qemu) qom-get /machine/soc/gpio gpioV4
>>     false
>> 
>> An expression in aspeed_gpio_set_pin_level was using a logical NOT
>> operator instead of a bitwise NOT operator:
>> 
>>     value &= !pin_mask;
>> 
>> The original author probably intended to make a bitwise NOT
>> expression
>> "~", but mistakenly used a logical NOT operator "!" instead. Some
>> programming languages like Rust use "!" for both purposes.
>> 
>> Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for
>> AST2400 and
>> AST2500")
>> Signed-off-by: Peter Delevoryas <pdel@fb.com>
> 
> 
> Oops! Thanks for catching this. The tests look good.

Thanks!

> 
>
Re: [PATCH] hw/gpio/aspeed_gpio: Fix QOM pin property
Posted by Cédric Le Goater 1 year, 12 months ago 
On 5/2/22 10:08, Peter Delevoryas wrote:
> I was setting gpioV4-7 to "1110" using the QOM pin property handler and
> noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too.
> 
>      (qemu) qom-set /machine/soc/gpio gpioV4 true
>      (qemu) qom-set /machine/soc/gpio gpioV5 true
>      (qemu) qom-set /machine/soc/gpio gpioV6 true
>      (qemu) qom-get /machine/soc/gpio gpioV4
>      true
>      (qemu) qom-set /machine/soc/gpio gpioV7 false
>      (qemu) qom-get /machine/soc/gpio gpioV4
>      false
> 
> An expression in aspeed_gpio_set_pin_level was using a logical NOT
> operator instead of a bitwise NOT operator:
> 
>      value &= !pin_mask;
> 
> The original author probably intended to make a bitwise NOT expression
> "~", but mistakenly used a logical NOT operator "!" instead. Some
> programming languages like Rust use "!" for both purposes.
> 
> Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and
> AST2500")
> Signed-off-by: Peter Delevoryas <pdel@fb.com>

Nice catch !

Reviewed-by: Cédric Le Goater <clg@kaod.org>

I was going to send a PR but I will wait a bit to include this fix.

Thanks,

C.


> ---
>   hw/gpio/aspeed_gpio.c          |  2 +-
>   tests/qtest/aspeed_gpio-test.c | 87 ++++++++++++++++++++++++++++++++++
>   tests/qtest/meson.build        |  3 +-
>   3 files changed, 90 insertions(+), 2 deletions(-)
>   create mode 100644 tests/qtest/aspeed_gpio-test.c
> 
> diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
> index c63634d3d3..9b736e7a9f 100644
> --- a/hw/gpio/aspeed_gpio.c
> +++ b/hw/gpio/aspeed_gpio.c
> @@ -312,7 +312,7 @@ static void aspeed_gpio_set_pin_level(AspeedGPIOState *s, uint32_t set_idx,
>       if (level) {
>           value |= pin_mask;
>       } else {
> -        value &= !pin_mask;
> +        value &= ~pin_mask;
>       }
>   
>       aspeed_gpio_update(s, &s->sets[set_idx], value);
> diff --git a/tests/qtest/aspeed_gpio-test.c b/tests/qtest/aspeed_gpio-test.c
> new file mode 100644
> index 0000000000..c1003f2d1b
> --- /dev/null
> +++ b/tests/qtest/aspeed_gpio-test.c
> @@ -0,0 +1,87 @@
> +/*
> + * QTest testcase for the Aspeed GPIO Controller.
> + *
> + * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com)
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a copy
> + * of this software and associated documentation files (the "Software"), to deal
> + * in the Software without restriction, including without limitation the rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/bitops.h"
> +#include "qemu/timer.h"
> +#include "qapi/qmp/qdict.h"
> +#include "libqtest-single.h"
> +
> +static bool qom_get_bool(QTestState *s, const char *path, const char *property)
> +{
> +    QDict *r;
> +    bool b;
> +
> +    r = qtest_qmp(s, "{ 'execute': 'qom-get', 'arguments': "
> +                     "{ 'path': %s, 'property': %s } }", path, property);
> +    b = qdict_get_bool(r, "return");
> +    qobject_unref(r);
> +
> +    return b;
> +}
> +
> +static void qom_set_bool(QTestState *s, const char *path, const char *property,
> +                         bool value)
> +{
> +    QDict *r;
> +
> +    r = qtest_qmp(s, "{ 'execute': 'qom-set', 'arguments': "
> +                     "{ 'path': %s, 'property': %s, 'value': %i } }",
> +                     path, property, value);
> +    qobject_unref(r);
> +}
> +
> +static void test_set_colocated_pins(const void *data)
> +{
> +    QTestState *s = (QTestState *)data;
> +
> +    /*
> +     * gpioV4-7 occupy bits within a single 32-bit value, so we want to make
> +     * sure that modifying one doesn't affect the other.
> +     */
> +    qom_set_bool(s, "/machine/soc/gpio", "gpioV4", true);
> +    qom_set_bool(s, "/machine/soc/gpio", "gpioV5", false);
> +    qom_set_bool(s, "/machine/soc/gpio", "gpioV6", true);
> +    qom_set_bool(s, "/machine/soc/gpio", "gpioV7", false);
> +    g_assert(qom_get_bool(s, "/machine/soc/gpio", "gpioV4"));
> +    g_assert(!qom_get_bool(s, "/machine/soc/gpio", "gpioV5"));
> +    g_assert(qom_get_bool(s, "/machine/soc/gpio", "gpioV6"));
> +    g_assert(!qom_get_bool(s, "/machine/soc/gpio", "gpioV7"));
> +}
> +
> +int main(int argc, char **argv)
> +{
> +    QTestState *s;
> +    int r;
> +
> +    g_test_init(&argc, &argv, NULL);
> +
> +    s = qtest_init("-machine ast2600-evb");
> +    qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
> +                        test_set_colocated_pins);
> +    r = g_test_run();
> +    qtest_quit(s);
> +
> +    return r;
> +}
> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
> index 6b9807c183..32fb8cf755 100644
> --- a/tests/qtest/meson.build
> +++ b/tests/qtest/meson.build
> @@ -189,7 +189,8 @@ qtests_npcm7xx = \
>      (slirp.found() ? ['npcm7xx_emc-test'] : [])
>   qtests_aspeed = \
>     ['aspeed_hace-test',
> -   'aspeed_smc-test']
> +   'aspeed_smc-test',
> +   'aspeed_gpio-test']
>   qtests_arm = \
>     (config_all_devices.has_key('CONFIG_MPS2') ? ['sse-timer-test'] : []) + \
>     (config_all_devices.has_key('CONFIG_CMSDK_APB_DUALTIMER') ? ['cmsdk-apb-dualtimer-test'] : []) + \
Re: [PATCH] hw/gpio/aspeed_gpio: Fix QOM pin property
Posted by Peter Delevoryas 1 year, 12 months ago 

> On May 2, 2022, at 8:09 AM, Cédric Le Goater <clg@kaod.org> wrote:
> 
> On 5/2/22 10:08, Peter Delevoryas wrote:
>> I was setting gpioV4-7 to "1110" using the QOM pin property handler and
>> noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too.
>> (qemu) qom-set /machine/soc/gpio gpioV4 true
>> (qemu) qom-set /machine/soc/gpio gpioV5 true
>> (qemu) qom-set /machine/soc/gpio gpioV6 true
>> (qemu) qom-get /machine/soc/gpio gpioV4
>> true
>> (qemu) qom-set /machine/soc/gpio gpioV7 false
>> (qemu) qom-get /machine/soc/gpio gpioV4
>> false
>> An expression in aspeed_gpio_set_pin_level was using a logical NOT
>> operator instead of a bitwise NOT operator:
>> value &= !pin_mask;
>> The original author probably intended to make a bitwise NOT expression
>> "~", but mistakenly used a logical NOT operator "!" instead. Some
>> programming languages like Rust use "!" for both purposes.
>> Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and
>> AST2500")
>> Signed-off-by: Peter Delevoryas <pdel@fb.com>
> 
> Nice catch !
> 
> Reviewed-by: Cédric Le Goater <clg@kaod.org>
> 
> I was going to send a PR but I will wait a bit to include this fix.

That’s great, thanks!

> 
> Thanks,
> 
> C.
> 
> 
>> ---
>> hw/gpio/aspeed_gpio.c | 2 +-
>> tests/qtest/aspeed_gpio-test.c | 87 ++++++++++++++++++++++++++++++++++
>> tests/qtest/meson.build | 3 +-
>> 3 files changed, 90 insertions(+), 2 deletions(-)
>> create mode 100644 tests/qtest/aspeed_gpio-test.c
>> diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
>> index c63634d3d3..9b736e7a9f 100644
>> --- a/hw/gpio/aspeed_gpio.c
>> +++ b/hw/gpio/aspeed_gpio.c
>> @@ -312,7 +312,7 @@ static void aspeed_gpio_set_pin_level(AspeedGPIOState *s, uint32_t set_idx,
>> if (level) {
>> value |= pin_mask;
>> } else {
>> - value &= !pin_mask;
>> + value &= ~pin_mask;
>> }
>> aspeed_gpio_update(s, &s->sets[set_idx], value);
>> diff --git a/tests/qtest/aspeed_gpio-test.c b/tests/qtest/aspeed_gpio-test.c
>> new file mode 100644
>> index 0000000000..c1003f2d1b
>> --- /dev/null
>> +++ b/tests/qtest/aspeed_gpio-test.c
>> @@ -0,0 +1,87 @@
>> +/*
>> + * QTest testcase for the Aspeed GPIO Controller.
>> + *
>> + * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com)
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a copy
>> + * of this software and associated documentation files (the "Software"), to deal
>> + * in the Software without restriction, including without limitation the rights
>> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
>> + * copies of the Software, and to permit persons to whom the Software is
>> + * furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be included in
>> + * all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
>> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
>> + * THE SOFTWARE.
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "qemu/bitops.h"
>> +#include "qemu/timer.h"
>> +#include "qapi/qmp/qdict.h"
>> +#include "libqtest-single.h"
>> +
>> +static bool qom_get_bool(QTestState *s, const char *path, const char *property)
>> +{
>> + QDict *r;
>> + bool b;
>> +
>> + r = qtest_qmp(s, "{ 'execute': 'qom-get', 'arguments': "
>> + "{ 'path': %s, 'property': %s } }", path, property);
>> + b = qdict_get_bool(r, "return");
>> + qobject_unref(r);
>> +
>> + return b;
>> +}
>> +
>> +static void qom_set_bool(QTestState *s, const char *path, const char *property,
>> + bool value)
>> +{
>> + QDict *r;
>> +
>> + r = qtest_qmp(s, "{ 'execute': 'qom-set', 'arguments': "
>> + "{ 'path': %s, 'property': %s, 'value': %i } }",
>> + path, property, value);
>> + qobject_unref(r);
>> +}
>> +
>> +static void test_set_colocated_pins(const void *data)
>> +{
>> + QTestState *s = (QTestState *)data;
>> +
>> + /*
>> + * gpioV4-7 occupy bits within a single 32-bit value, so we want to make
>> + * sure that modifying one doesn't affect the other.
>> + */
>> + qom_set_bool(s, "/machine/soc/gpio", "gpioV4", true);
>> + qom_set_bool(s, "/machine/soc/gpio", "gpioV5", false);
>> + qom_set_bool(s, "/machine/soc/gpio", "gpioV6", true);
>> + qom_set_bool(s, "/machine/soc/gpio", "gpioV7", false);
>> + g_assert(qom_get_bool(s, "/machine/soc/gpio", "gpioV4"));
>> + g_assert(!qom_get_bool(s, "/machine/soc/gpio", "gpioV5"));
>> + g_assert(qom_get_bool(s, "/machine/soc/gpio", "gpioV6"));
>> + g_assert(!qom_get_bool(s, "/machine/soc/gpio", "gpioV7"));
>> +}
>> +
>> +int main(int argc, char **argv)
>> +{
>> + QTestState *s;
>> + int r;
>> +
>> + g_test_init(&argc, &argv, NULL);
>> +
>> + s = qtest_init("-machine ast2600-evb");
>> + qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
>> + test_set_colocated_pins);
>> + r = g_test_run();
>> + qtest_quit(s);
>> +
>> + return r;
>> +}
>> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
>> index 6b9807c183..32fb8cf755 100644
>> --- a/tests/qtest/meson.build
>> +++ b/tests/qtest/meson.build
>> @@ -189,7 +189,8 @@ qtests_npcm7xx = \
>> (slirp.found() ? ['npcm7xx_emc-test'] : [])
>> qtests_aspeed = \
>> ['aspeed_hace-test',
>> - 'aspeed_smc-test']
>> + 'aspeed_smc-test',
>> + 'aspeed_gpio-test']
>> qtests_arm = \
>> (config_all_devices.has_key('CONFIG_MPS2') ? ['sse-timer-test'] : []) + \
>> (config_all_devices.has_key('CONFIG_CMSDK_APB_DUALTIMER') ? ['cmsdk-apb-dualtimer-test'] : []) + \

Patchew 2.1-devel-0870f84

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