On 4/21/22 04:18, Peter Maydell wrote:
> First arm pullreq for 7.1. The bulk of this is the qemu_split_irq
> removal.
>
> I have enough stuff in my to-review queue that I expect to do another
> pullreq early next week, but 31 patches is enough to not hang on to.
>
> thanks
> -- PMM
>
> The following changes since commit 9c125d17e9402c232c46610802e5931b3639d77b:
>
> Merge tag 'pull-tcg-20220420' of https://gitlab.com/rth7680/qemu into staging (2022-04-20 16:43:11 -0700)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220421
>
> for you to fetch changes up to 5b415dd61bdbf61fb4be0e9f1a7172b8bce682c6:
>
> hw/arm: Use bit fields for NPCM7XX PWRON STRAPs (2022-04-21 11:37:05 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * hw/arm/virt: Check for attempt to use TrustZone with KVM or HVF
> * versal: Add the Cortex-R5s in the Real-Time Processing Unit (RPU) subsystem
> * versal: model enough of the Clock/Reset Low-power domain (CRL) to allow control of the Cortex-R5s
> * xlnx-zynqmp: Connect 4 TTC timers
> * exynos4210: Refactor GIC/combiner code to stop using qemu_split_irq
> * realview: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ'
> * stellaris: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ'
> * hw/core/irq: remove unused 'qemu_irq_split' function
> * npcm7xx: use symbolic constants for PWRON STRAP bit fields
> * virt: document impact of gic-version on max CPUs
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate.
r~
>
> ----------------------------------------------------------------
> Edgar E. Iglesias (6):
> timer: cadence_ttc: Break out header file to allow embedding
> hw/arm/xlnx-zynqmp: Connect 4 TTC timers
> hw/arm: versal: Create an APU CPU Cluster
> hw/arm: versal: Add the Cortex-R5Fs
> hw/misc: Add a model of the Xilinx Versal CRL
> hw/arm: versal: Connect the CRL
>
> Hao Wu (2):
> hw/misc: Add PWRON STRAP bit fields in GCR module
> hw/arm: Use bit fields for NPCM7XX PWRON STRAPs
>
> Heinrich Schuchardt (1):
> hw/arm/virt: impact of gic-version on max CPUs
>
> Peter Maydell (19):
> hw/arm/virt: Check for attempt to use TrustZone with KVM or HVF
> hw/arm/exynos4210: Use TYPE_OR_IRQ instead of custom OR-gate device
> hw/intc/exynos4210_gic: Remove unused TYPE_EXYNOS4210_IRQ_GATE
> hw/arm/exynos4210: Put a9mpcore device into state struct
> hw/arm/exynos4210: Drop int_gic_irq[] from Exynos4210Irq struct
> hw/arm/exynos4210: Coalesce board_irqs and irq_table
> hw/arm/exynos4210: Fix code style nit in combiner_grp_to_gic_id[]
> hw/arm/exynos4210: Move exynos4210_init_board_irqs() into exynos4210.c
> hw/arm/exynos4210: Put external GIC into state struct
> hw/arm/exynos4210: Drop ext_gic_irq[] from Exynos4210Irq struct
> hw/arm/exynos4210: Move exynos4210_combiner_get_gpioin() into exynos4210.c
> hw/arm/exynos4210: Delete unused macro definitions
> hw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_board_irqs()
> hw/arm/exynos4210: Fill in irq_table[] for internal-combiner-only IRQ lines
> hw/arm/exynos4210: Connect MCT_G0 and MCT_G1 to both combiners
> hw/arm/exynos4210: Don't connect multiple lines to external GIC inputs
> hw/arm/exynos4210: Fold combiner splits into exynos4210_init_board_irqs()
> hw/arm/exynos4210: Put combiners into state struct
> hw/arm/exynos4210: Drop Exynos4210Irq struct
>
> Zongyuan Li (3):
> hw/arm/realview: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ'
> hw/arm/stellaris: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ'
> hw/core/irq: remove unused 'qemu_irq_split' function
>
> docs/system/arm/virt.rst | 4 +-
> include/hw/arm/exynos4210.h | 50 ++--
> include/hw/arm/xlnx-versal.h | 16 ++
> include/hw/arm/xlnx-zynqmp.h | 4 +
> include/hw/intc/exynos4210_combiner.h | 57 +++++
> include/hw/intc/exynos4210_gic.h | 43 ++++
> include/hw/irq.h | 5 -
> include/hw/misc/npcm7xx_gcr.h | 30 +++
> include/hw/misc/xlnx-versal-crl.h | 235 +++++++++++++++++++
> include/hw/timer/cadence_ttc.h | 54 +++++
> hw/arm/exynos4210.c | 430 ++++++++++++++++++++++++++++++----
> hw/arm/npcm7xx_boards.c | 24 +-
> hw/arm/realview.c | 33 ++-
> hw/arm/stellaris.c | 15 +-
> hw/arm/virt.c | 7 +
> hw/arm/xlnx-versal-virt.c | 6 +-
> hw/arm/xlnx-versal.c | 99 +++++++-
> hw/arm/xlnx-zynqmp.c | 22 ++
> hw/core/irq.c | 15 --
> hw/intc/exynos4210_combiner.c | 108 +--------
> hw/intc/exynos4210_gic.c | 344 +--------------------------
> hw/misc/xlnx-versal-crl.c | 421 +++++++++++++++++++++++++++++++++
> hw/timer/cadence_ttc.c | 32 +--
> MAINTAINERS | 2 +-
> hw/misc/meson.build | 1 +
> 25 files changed, 1457 insertions(+), 600 deletions(-)
> create mode 100644 include/hw/intc/exynos4210_combiner.h
> create mode 100644 include/hw/intc/exynos4210_gic.h
> create mode 100644 include/hw/misc/xlnx-versal-crl.h
> create mode 100644 include/hw/timer/cadence_ttc.h
> create mode 100644 hw/misc/xlnx-versal-crl.c
>