On 3/4/22 17:54, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
>
> As the configuration scripts used -mbig and -mlittle, building PPC tests
> with Clang was silently skipped. With the patch to fix these options[1],
> "make check-tcg" fails because of build and runtime errors. This patch
> series tries to fix some of these problems.
>
> The first patch fixes tests/tcg/ppc64le/mtfsf.c by removing the GCC-only
> builtins used to emit mtfsf and mffs. We can emit these insns with
> inline asm instead.
>
> The second patch addresses differences in the output of float_madds.c.
> The __builtin_fmaf used in this test emits fmadds with GCC and
> xsmaddasp with LLVM. The first insn had rounding errors fixed in
> d04ca895dc7f ("target/ppc: Add helpers for fmadds et al"), we apply a
> similar fix to xsmaddasp.
>
> Then we have build and runtime errors of bcdsub. According to GCC
> docs[2], the '-mpower8-vector' flag provides some bcdsub builtins, so
> it'd be reasonable to assume that the rest of the toolchain knows about
> the insn if the compiler accepts this flag. Clang has supported this
> flag since version 3.6[3], but the insn and builtins were only added in
> LLVM 14[4]. I couldn't find a good config-time solution, so we use
> __has_builtin to check for __builtin_bcdsub at compile-time and, if not
> available, emit the opcode with a ".long." If __has_builtin itself is
> not available, we assume that -mpower8-vector is enough and that the
> insn is available.
>
> Even building with a newer Clang that accepts the bcdsub insn, the test
> fails at runtime because LLVM doesn't like "__int128" in inline asm. No
> error or warning is emitted, but the generated code only loads one
> doubleword of the VSR. The third patch avoids this issue by passing the
> VSR values in GPR pairs, as we did in
> 84ade98e87ea ("target/ppc: do not silence snan in xscvspdpn").
>
> The last patch fixes tests/tcg/ppc64le/non_signalling_xscv.c build with
> -mabi=elfv1. Clang only recognizes VSX register in the clobber list of
> inline asm when using ELFv2, so we use VSRs >= 32 and list them by their
> Altivec name.
>
> Finally, the insns tested by tests/tcg/ppc64le/byte_reverse.c are not
> yet supported by LLVM. Since the configuration script uses '-mpower10'
> to check for POWER10 support and Clang doesn't support this flag,
> "make check-tcg" doesn't fail. We should probably change this check in
> the future, but since LLVM support of POWER10 seems incomplete, I guess
> we can leave it for now.
>
> v3:
> - Removed unrelated changes in patch 2
> - Fixed __has_builtin check in bcdsub
>
> v2:
> - New patch to address non_signalling_xscv.c build problems with Clang
> and ELFv1;
> - Rework of bcdsub patch to work with LLVM < 14 and avoid vector types.
>
> [1] https://lists.gnu.org/archive/html/qemu-devel/2022-01/msg06506.html
> [2] https://gcc.gnu.org/onlinedocs/gcc-8.3.0/gcc/PowerPC-AltiVec_002fVSX-Built-in-Functions.html
> [3] https://github.com/llvm/llvm-project/commit/59eb767e11d4ffefb5f55409524e5c8416b2b0db
> [4] https://github.com/llvm/llvm-project/commit/c933c2eb334660c131f4afc9d194fafb0cec0423
>
> Matheus Ferst (5):
> tests/tcg/ppc64le: use inline asm instead of __builtin_mtfsf
> target/ppc: change xs[n]madd[am]sp to use float64r32_muladd
> tests/tcg/ppc64le: drop __int128 usage in bcdsub
> tests/tcg/ppc64le: emit bcdsub with .long when needed
> tests/tcg/ppc64le: Use Altivec register names in clobber list
>
> target/ppc/fpu_helper.c | 54 ++++------
> tests/tcg/ppc64le/bcdsub.c | 138 ++++++++++++------------
> tests/tcg/ppc64le/mtfsf.c | 19 ++--
> tests/tcg/ppc64le/non_signalling_xscv.c | 16 +--
> 4 files changed, 106 insertions(+), 121 deletions(-)
>
Queued for ppc-7.0.
Thanks,
C.