[RFC PATCH 0/7] AMX support in Qemu

Yang Zhong posted 7 patches 2 years, 3 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20220107093134.136441-1-yang.zhong@intel.com
Maintainers: "Michael S. Tsirkin" <mst@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, Marcelo Tosatti <mtosatti@redhat.com>, Eduardo Habkost <eduardo@habkost.net>, Cornelia Huck <cohuck@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>
There is a newer version of this series
linux-headers/asm-x86/kvm.h | 14 ++++++++
linux-headers/linux/kvm.h   |  2 ++
target/i386/cpu.h           | 40 ++++++++++++++++++++++-
hw/i386/x86.c               | 28 ++++++++++++++++
target/i386/cpu.c           | 64 +++++++++++++++++++++++++++++++++++--
target/i386/kvm/kvm-cpu.c   |  4 +++
target/i386/kvm/kvm.c       | 37 +++++++++++++++++++--
target/i386/machine.c       | 42 ++++++++++++++++++++++++
target/i386/xsave_helper.c  | 35 ++++++++++++++++++++
9 files changed, 259 insertions(+), 7 deletions(-)
[RFC PATCH 0/7] AMX support in Qemu
Posted by Yang Zhong 2 years, 3 months ago
Intel introduces Advanced Matrix Extensions (AMX) [1] feature that
consists of configurable two-dimensional "TILE" registers and new
accelerator instructions that operate on them. TMUL (Tile matrix
MULtiply) is the first accelerator instruction set to use the new
registers.

This series is based on the AMX KVM series [2] and exposes AMX feature
to guest (The detailed design discussions can be found in [3]).

According to the KVM design, the userspace VMM (e.g. Qemu) is expected
to request guest permission for the dynamically-enabled XSAVE features
only once when the first vCPU is created, and KVM checks guest permission
in KVM_SET_CPUID2.

Intel AMX is XSAVE supported and XSAVE enabled. Those extended features
has large state while current kvm_xsave only allows 4KB. The AMX KVM has
extended struct kvm_xsave to meet this requirenment and added one extra
KVM_GET_XSAVE2 ioctl to handle extended features. From our test, the AMX
live migration work well.

Notice: This version still includes some definitions in the linux-headers,
once AMX KVM is merged and Qemu sync those linux-headers, I will remove
those definitions. So please ignore those changes.

[1] Intel Architecture Instruction Set Extension Programming Reference
    https://software.intel.com/content/dam/develop/external/us/en/documents/\
    architecture-instruction-set-extensions-programming-reference.pdf
[2] https://www.spinics.net/lists/kvm/msg263577.html
[3] https://www.spinics.net/lists/kvm/msg259015.html

Thanks,
Yang
----

Jing Liu (5):
  x86: Fix the 64-byte boundary enumeration for extended state
  x86: Add AMX XTILECFG and XTILEDATA components
  x86: Add XFD faulting bit for state components
  x86: Add AMX CPUIDs enumeration
  x86: Use new XSAVE ioctls handling

Yang Zhong (1):
  x86: Grant AMX permission for guest

Zeng Guang (1):
  x86: Support XFD and AMX xsave data migration

 linux-headers/asm-x86/kvm.h | 14 ++++++++
 linux-headers/linux/kvm.h   |  2 ++
 target/i386/cpu.h           | 40 ++++++++++++++++++++++-
 hw/i386/x86.c               | 28 ++++++++++++++++
 target/i386/cpu.c           | 64 +++++++++++++++++++++++++++++++++++--
 target/i386/kvm/kvm-cpu.c   |  4 +++
 target/i386/kvm/kvm.c       | 37 +++++++++++++++++++--
 target/i386/machine.c       | 42 ++++++++++++++++++++++++
 target/i386/xsave_helper.c  | 35 ++++++++++++++++++++
 9 files changed, 259 insertions(+), 7 deletions(-)