This patchseries is the fourth slice of the MVE implementation,
including the "turn it on" patch. These patches have all been
on-list before and have been reviewed; changes since v1 are
mostly just the ones requested by Richard.

v1->v2:
 * use float* types in macro arguments, not uint*_t
   (in most patches)
 * make do_vcvt_sh/do_vcvt_hs functions, not macros
 * new DO_2OP_FP_ALL, DO_2OP_FP_SCALAR_ALL macros that invoke
   DO_2OP_FP/DO_2OP_FP_SCALAR once each for float16, float32
 * pass a CHS bool to DO_VFMA rather than a function name

thanks
-- PMM

Peter Maydell (18):
  target/arm: Implement MVE VADD (floating-point)
  target/arm: Implement MVE VSUB, VMUL, VABD, VMAXNM, VMINNM
  target/arm: Implement MVE VCADD
  target/arm: Implement MVE VFMA and VFMS
  target/arm: Implement MVE VCMUL and VCMLA
  target/arm: Implement MVE VMAXNMA and VMINNMA
  target/arm: Implement MVE scalar fp insns
  target/arm: Implement MVE fp-with-scalar VFMA, VFMAS
  softfloat: Remove assertion preventing silencing of NaN in default-NaN
    mode
  target/arm: Implement MVE FP max/min across vector
  target/arm: Implement MVE fp vector comparisons
  target/arm: Implement MVE fp scalar comparisons
  target/arm: Implement MVE VCVT between floating and fixed point
  target/arm: Implement MVE VCVT between fp and integer
  target/arm: Implement MVE VCVT with specified rounding mode
  target/arm: Implement MVE VCVT between single and half precision
  target/arm: Implement MVE VRINT insns
  target/arm: Enable MVE in Cortex-M55

 target/arm/helper-mve.h        | 142 +++++++
 target/arm/translate.h         |   6 +
 target/arm/mve.decode          | 277 ++++++++++++--
 target/arm/cpu_tcg.c           |   7 +-
 target/arm/mve_helper.c        | 650 +++++++++++++++++++++++++++++++++
 target/arm/translate-mve.c     | 277 +++++++++++++-
 target/arm/translate-neon.c    |   6 -
 fpu/softfloat-specialize.c.inc |   1 -
 8 files changed, 1318 insertions(+), 48 deletions(-)

-- 
2.20.1