[PATCH for-6.2 07/25] armsse: Wire up systick cpuclk clock

Peter Maydell posted 25 patches 4 years, 6 months ago
Maintainers: Alistair Francis <alistair@alistair23.me>, Peter Maydell <peter.maydell@linaro.org>, Alexandre Iooss <erdnaxe@crans.org>, Subbaraya Sundeep <sundeep.lkml@gmail.com>, Luc Michel <luc@lmichel.fr>, Damien Hedde <damien.hedde@greensocs.com>, Joel Stanley <joel@jms.id.au>
[PATCH for-6.2 07/25] armsse: Wire up systick cpuclk clock
Posted by Peter Maydell 4 years, 6 months ago
Wire up the cpuclk for the systick devices to the SSE object's
existing mainclk clock.

We do not wire up the refclk because the SSE subsystems do not
provide a refclk.  (This is documented in the IoTKit and SSE-200
TRMs; the SSE-300 TRM doesn't mention it but we assume it follows the
same approach.) When we update the systick device later to honour "no
refclk connected" this will fix a minor emulation inaccuracy for the
SSE-based boards.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/armsse.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index a1456cb0f42..70b52c3d4b9 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -995,6 +995,9 @@ static void armsse_realize(DeviceState *dev, Error **errp)
         int j;
         char *gpioname;
 
+        qdev_connect_clock_in(cpudev, "cpuclk", s->mainclk);
+        /* The SSE subsystems do not wire up a systick refclk */
+
         qdev_prop_set_uint32(cpudev, "num-irq", s->exp_numirq + NUM_SSE_IRQS);
         /*
          * In real hardware the initial Secure VTOR is set from the INITSVTOR*
-- 
2.20.1


Re: [PATCH for-6.2 07/25] armsse: Wire up systick cpuclk clock
Posted by Alistair Francis 4 years, 6 months ago
On Thu, Aug 12, 2021 at 7:42 PM Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Wire up the cpuclk for the systick devices to the SSE object's
> existing mainclk clock.
>
> We do not wire up the refclk because the SSE subsystems do not
> provide a refclk.  (This is documented in the IoTKit and SSE-200
> TRMs; the SSE-300 TRM doesn't mention it but we assume it follows the
> same approach.) When we update the systick device later to honour "no
> refclk connected" this will fix a minor emulation inaccuracy for the
> SSE-based boards.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/arm/armsse.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
> index a1456cb0f42..70b52c3d4b9 100644
> --- a/hw/arm/armsse.c
> +++ b/hw/arm/armsse.c
> @@ -995,6 +995,9 @@ static void armsse_realize(DeviceState *dev, Error **errp)
>          int j;
>          char *gpioname;
>
> +        qdev_connect_clock_in(cpudev, "cpuclk", s->mainclk);
> +        /* The SSE subsystems do not wire up a systick refclk */
> +
>          qdev_prop_set_uint32(cpudev, "num-irq", s->exp_numirq + NUM_SSE_IRQS);
>          /*
>           * In real hardware the initial Secure VTOR is set from the INITSVTOR*
> --
> 2.20.1
>
>

Re: [PATCH for-6.2 07/25] armsse: Wire up systick cpuclk clock
Posted by Luc Michel 4 years, 5 months ago
On 10:33 Thu 12 Aug     , Peter Maydell wrote:
> Wire up the cpuclk for the systick devices to the SSE object's
> existing mainclk clock.
> 
> We do not wire up the refclk because the SSE subsystems do not
> provide a refclk.  (This is documented in the IoTKit and SSE-200
> TRMs; the SSE-300 TRM doesn't mention it but we assume it follows the
> same approach.) When we update the systick device later to honour "no
> refclk connected" this will fix a minor emulation inaccuracy for the
> SSE-based boards.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Luc Michel <luc@lmichel.fr>

> ---
>  hw/arm/armsse.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
> index a1456cb0f42..70b52c3d4b9 100644
> --- a/hw/arm/armsse.c
> +++ b/hw/arm/armsse.c
> @@ -995,6 +995,9 @@ static void armsse_realize(DeviceState *dev, Error **errp)
>          int j;
>          char *gpioname;
>  
> +        qdev_connect_clock_in(cpudev, "cpuclk", s->mainclk);
> +        /* The SSE subsystems do not wire up a systick refclk */
> +
>          qdev_prop_set_uint32(cpudev, "num-irq", s->exp_numirq + NUM_SSE_IRQS);
>          /*
>           * In real hardware the initial Secure VTOR is set from the INITSVTOR*
> -- 
> 2.20.1
> 

--