This is fixing #404 ("windows xp boot takes much longer...")
and several other similar reports.

Changes for v5:
  * Include missing hunk in tb_gen_code, as noted in reply to v4.
  * Remove helper_check_breakpoints from target/arm/.
  * Reorg cflags_for_breakpoints into check_for_breakpoints;
    reorg cpu_exec to use a break instead of a longjmp.
  * Move singlestep_enabled check from cflags_for_breakpoints
    to curr_cflags, which makes cpu_exec_step_atomic cleaner.

Changes for v4:
  * Issue breakpoints directly from cflags_for_breakpoints.
    Do not generate code for a TB beginning with a BP at all.
  * Drop the problematic TranslatorOps.breakpoint_check hook entirely.

Changes for v3:
  * Map CF_COUNT_MASK == 0 -> TCG_MAX_INSNS.
  * Split out *_breakpoint_check fixes for avr, mips, riscv.

Changes for v2:
  * All prerequisites and 7 of the patches from v1 with are merged.

Patches lacking review are all new:
  03-target-alpha-Drop-goto_tb-path-in-gen_call_pal.patch
  08-hw-core-Introduce-TCGCPUOps.debug_check_breakpoin.patch
  09-target-arm-Implement-debug_check_breakpoint.patch
  10-target-i386-Implement-debug_check_breakpoint.patch
  11-accel-tcg-Merge-tb_find-into-its-only-caller.patch
  12-accel-tcg-Move-breakpoint-recognition-outside-tra.patch
  13-accel-tcg-Remove-TranslatorOps.breakpoint_check.patch
  15-accel-tcg-Record-singlestep_enabled-in-tb-cflags.patch


r~


Richard Henderson (15):
  accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS
  accel/tcg: Move curr_cflags into cpu-exec.c
  target/alpha: Drop goto_tb path in gen_call_pal
  accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR
  accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain
  accel/tcg: Handle -singlestep in curr_cflags
  accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic
  hw/core: Introduce TCGCPUOps.debug_check_breakpoint
  target/arm: Implement debug_check_breakpoint
  target/i386: Implement debug_check_breakpoint
  accel/tcg: Merge tb_find into its only caller
  accel/tcg: Move breakpoint recognition outside translation
  accel/tcg: Remove TranslatorOps.breakpoint_check
  accel/tcg: Hoist tb_cflags to a local in translator_loop
  accel/tcg: Record singlestep_enabled in tb->cflags

 include/exec/exec-all.h       |  24 +++--
 include/exec/translator.h     |  11 --
 include/hw/core/tcg-cpu-ops.h |   6 ++
 target/arm/helper.h           |   2 -
 target/arm/internals.h        |   3 +
 accel/tcg/cpu-exec.c          | 192 +++++++++++++++++++++++++---------
 accel/tcg/translate-all.c     |   7 +-
 accel/tcg/translator.c        |  39 ++-----
 cpu.c                         |  24 -----
 target/alpha/translate.c      |  31 +-----
 target/arm/cpu.c              |   1 +
 target/arm/cpu_tcg.c          |   1 +
 target/arm/debug_helper.c     |  12 +--
 target/arm/translate-a64.c    |  25 -----
 target/arm/translate.c        |  29 -----
 target/avr/translate.c        |  10 --
 target/cris/translate.c       |  20 ----
 target/hexagon/translate.c    |  17 ---
 target/hppa/translate.c       |  11 --
 target/i386/tcg/tcg-cpu.c     |  12 +++
 target/i386/tcg/translate.c   |  28 -----
 target/m68k/translate.c       |  18 ----
 target/microblaze/translate.c |  18 ----
 target/mips/tcg/translate.c   |  19 ----
 target/nios2/translate.c      |  27 -----
 target/openrisc/translate.c   |  17 ---
 target/ppc/translate.c        |  18 ----
 target/riscv/translate.c      |  17 ---
 target/rx/translate.c         |  14 ---
 target/s390x/tcg/translate.c  |  24 -----
 target/sh4/translate.c        |  18 ----
 target/sparc/translate.c      |  17 ---
 target/tricore/translate.c    |  16 ---
 target/xtensa/translate.c     |  17 ---
 tcg/tcg-op.c                  |  28 +++--
 35 files changed, 206 insertions(+), 567 deletions(-)

-- 
2.25.1

On 7/19/21 3:17 PM, Richard Henderson wrote:
> Patches lacking review are all new:
>    03-target-alpha-Drop-goto_tb-path-in-gen_call_pal.patch
>    08-hw-core-Introduce-TCGCPUOps.debug_check_breakpoin.patch
>    09-target-arm-Implement-debug_check_breakpoint.patch
>    10-target-i386-Implement-debug_check_breakpoint.patch
>    11-accel-tcg-Merge-tb_find-into-its-only-caller.patch
>    12-accel-tcg-Move-breakpoint-recognition-outside-tra.patch
>    13-accel-tcg-Remove-TranslatorOps.breakpoint_check.patch
>    15-accel-tcg-Record-singlestep_enabled-in-tb-cflags.patch

... and then there's a bit of code in translate/avr that's a bit odd:

     /*
      * This is due to some strange GDB behavior
      * Let's assume main has address 0x100:
      * b main   - sets breakpoint at address 0x00000100 (code)
      * b *0x100 - sets breakpoint at address 0x00800100 (data)
      *
      * The translator driver has already taken care of the code pointer.
      */
     if (!ctx->base.singlestep_enabled &&
         cpu_breakpoint_test(cs, OFFSET_DATA + ctx->base.pc_next, BP_ANY)) {
         gen_breakpoint(ctx);
         return;
     }

I guess the thing to do is to allow the address to be frobbed in cpu_breakpoint_insert, so 
that we squash this phantom address early.


r~