[PATCH 3/6] target/microblaze: Assert transaction failures have exception enabled

Philippe Mathieu-Daudé posted 6 patches 4 years, 8 months ago
[PATCH 3/6] target/microblaze: Assert transaction failures have exception enabled
Posted by Philippe Mathieu-Daudé 4 years, 8 months ago
If exceptions are disabled, we must not get a transaction failure.
Assert they are enabled passed that point.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/microblaze/op_helper.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
index 8d20522ee88..1048e656e27 100644
--- a/target/microblaze/op_helper.c
+++ b/target/microblaze/op_helper.c
@@ -122,9 +122,7 @@ void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
                   access_type == MMU_INST_FETCH ? "INST_FETCH" :
                   (access_type == MMU_DATA_LOAD ? "DATA_LOAD" : "DATA_STORE"));
 
-    if (!(env->msr & MSR_EE)) {
-        return;
-    }
+    assert(env->msr & MSR_EE);
 
     if (access_type == MMU_INST_FETCH) {
         if (!cpu->cfg.iopb_bus_exception) {
-- 
2.26.3

Re: [PATCH 3/6] target/microblaze: Assert transaction failures have exception enabled
Posted by Edgar E. Iglesias 4 years, 8 months ago
On Thu, Jun 03, 2021 at 11:03:07AM +0200, Philippe Mathieu-Daudé wrote:
> If exceptions are disabled, we must not get a transaction failure.
> Assert they are enabled passed that point.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/microblaze/op_helper.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
> index 8d20522ee88..1048e656e27 100644
> --- a/target/microblaze/op_helper.c
> +++ b/target/microblaze/op_helper.c
> @@ -122,9 +122,7 @@ void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
>                    access_type == MMU_INST_FETCH ? "INST_FETCH" :
>                    (access_type == MMU_DATA_LOAD ? "DATA_LOAD" : "DATA_STORE"));
>  
> -    if (!(env->msr & MSR_EE)) {
> -        return;
> -    }
> +    assert(env->msr & MSR_EE);


This doesn't look correct. MSR_EE is a runtime flag...


>  
>      if (access_type == MMU_INST_FETCH) {
>          if (!cpu->cfg.iopb_bus_exception) {
> -- 
> 2.26.3
>