[v1] ppc: rework AIL logic, add POWER10 exception model

[PATCH 0/2] ppc: rework AIL logic, add POWER10 exception model

Nicholas Piggin posted 2 patches 3 years ago

Diff against v1 v2
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hw/ppc/spapr_hcall.c            |   8 +-
target/ppc/cpu-qom.h            |   2 +
target/ppc/cpu.h                |  13 +-
target/ppc/excp_helper.c        | 217 +++++++++++++++++++++++---------
target/ppc/translate.c          |   3 +-
target/ppc/translate_init.c.inc |   4 +-
6 files changed, 171 insertions(+), 76 deletions(-)

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[PATCH 0/2] ppc: rework AIL logic, add POWER10 exception model

Posted by Nicholas Piggin 3 years ago

Here are the last 2 patches of this series rebased on the ppc-for-6.1
tree.  I've tidied up the comments and control flow around the reserved
values of AIL, so different behaviours/reasons are treated individually
which hopefully addresses David's comments.

On real hardware, setting LPCR[AIL] to a reserved value (e.g., 1 on
POWER9) causes the register to retain that value but it's treated like
0, which matches what the patch does.

Thanks,
Nick

Nicholas Piggin (2):
  target/ppc: rework AIL logic in interrupt delivery
  target/ppc: Add POWER10 exception model

 hw/ppc/spapr_hcall.c            |   8 +-
 target/ppc/cpu-qom.h            |   2 +
 target/ppc/cpu.h                |  13 +-
 target/ppc/excp_helper.c        | 217 +++++++++++++++++++++++---------
 target/ppc/translate.c          |   3 +-
 target/ppc/translate_init.c.inc |   4 +-
 6 files changed, 171 insertions(+), 76 deletions(-)

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2.23.0