Trivial fixes extracted from another series which became too big,
so I prefer to send them in a previous step.

(This is a resend for Zoltan).

Philippe Mathieu-Daudé (6):
  hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize()
  hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers
  hw/mips/gt64xxx: Fix typos in qemu_log_mask() formats
  hw/mips/gt64xxx: Rename trace events related to interrupt registers
  hw/mips/gt64xxx: Trace accesses to ISD registers
  hw/mips/gt64xxx: Let the GT64120 manage the lower 512MiB hole

 hw/mips/gt64xxx_pci.c | 67 +++++++++++++++++++++++++++----------------
 hw/mips/malta.c       |  7 -----
 hw/mips/trace-events  |  6 ++--
 3 files changed, 47 insertions(+), 33 deletions(-)

-- 
2.26.2

On 3/9/21 3:26 PM, Philippe Mathieu-Daudé wrote:
> Trivial fixes extracted from another series which became too big,
> so I prefer to send them in a previous step.
> 
> (This is a resend for Zoltan).
> 
> Philippe Mathieu-Daudé (6):
>   hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize()
>   hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers
>   hw/mips/gt64xxx: Fix typos in qemu_log_mask() formats
>   hw/mips/gt64xxx: Rename trace events related to interrupt registers
>   hw/mips/gt64xxx: Trace accesses to ISD registers
>   hw/mips/gt64xxx: Let the GT64120 manage the lower 512MiB hole
Thanks, patches 1-5 applied to mips-next.