From nobody Mon Feb 9 06:08:59 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.208.50 as permitted sender) client-ip=209.85.208.50; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-f50.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.50 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1615299999; cv=none; d=zohomail.com; s=zohoarc; b=C80j4TH6+afQ5ZoL6bCgZ1ePBiS7r1TdZooGPWYh6UjRoy4SE+1TgsIFDnrEEm0X5vQp1IXAEac43D2lYpQDwZ0JjAKzFeGsTaPiz+2iEkYrOmeeGaOspx+iVvxh2Fv51De3/EyHH80lASYs4xBAuGtIDl+vA4KO9yiwQ5awNLU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615299999; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=EVB7ePXcQjZw4uETcObG8sFKSRsuTJl6nrIlWHavPsM=; b=f4zJHNyYDwluY0XiNnkMTz9T6pkwnkiNan743FQXXslCoJgZQA+cVavWiKhbCHf249dIjBadhFrseEChvW1rPTP76vkehv6oupsDMXqKvsEyJ2fg4gB5EpacJNlezqWW2bumkoHpPhswoIii25x3KFjvg3vawzjJHalwcud1JCY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.50 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ed1-f50.google.com (mail-ed1-f50.google.com [209.85.208.50]) by mx.zohomail.com with SMTPS id 1615299999313778.7756381964916; Tue, 9 Mar 2021 06:26:39 -0800 (PST) Received: by mail-ed1-f50.google.com with SMTP id m9so20468220edd.5 for ; Tue, 09 Mar 2021 06:26:38 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id u16sm9361089edq.4.2021.03.09.06.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 06:26:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EVB7ePXcQjZw4uETcObG8sFKSRsuTJl6nrIlWHavPsM=; b=Oa1mRk2S+YDQ4qA1OBgVLC+5cxUzHGUx9hBqoe2c9FEDs7LtqS72Nd/D0AOsE2CM1J MQXXrSSIilXP2TxoDFS+XUxBXqlKi3Oqz8OJrVvovhgcxnz0FJO4XXPtHR55WWR9fAU0 GHPRrlMXbowfdMcwC0+3iUDc97IFSYOotRHfhcUoI/9LHrMeiWpJ4AAnJD+BxKkHHitj u5O1tPc2fW4g8B0dAfXIcYi4w/AdwqiiiscfZp97r42dkrR1/3U75ruatMVHLcidpnV2 yM5xMYvdueAv/40EEW1mYzstDBBXrmPpEYaH8Ht3GCyCOf0LSHtzryKuhr87Xwy8nYq2 d3UQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=EVB7ePXcQjZw4uETcObG8sFKSRsuTJl6nrIlWHavPsM=; b=j+H/ubmNJYlGfBG5jZh5iXQhTSxp0f3odn4MzTm6tcbhRoz199ODd4XP3LRfwyELlm KlcX8lEQd4LZta3bEgLtlRRKJnE/Zyrg5AaX7FJWM+Qa51U2kaWN0LX/9/57Ds3s1FLk NZRVZo4NP7zx+HZJy7KayGuCqT5xiCEc/BB47u0EjcxpgM7V4QCNkDMIdcJk1UnrBcKy 94en0TLCifuMBTXeydsYe8WoOP3/ZbrjggT3x6PtXxYfXMvbYdkBdYUf9eywKLLqEKgJ liamPrq75BhBIdhfa9xyHKhmCeUt02szcroju3iDvmwGiEmCEfNGuRxLl0q4TxT0CZ5v UgHw== X-Gm-Message-State: AOAM531vYzfQ88/y/cMMcrNnEBYNEiDlvudhSaBuMgC6apIxyHG4L6OQ Acx/wF7LSwYPsYkyN7Mh8T4= X-Google-Smtp-Source: ABdhPJx1XLXIp2cWD2NoiJAPf3mjBP+R3DmREU2o4gkHTTuR0Rq0Z51VBBM06z0f0OfAZJdzhWFLJA== X-Received: by 2002:aa7:dc04:: with SMTP id b4mr4360579edu.221.1615299997608; Tue, 09 Mar 2021 06:26:37 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , BALATON Zoltan Subject: [PATCH RESEND 1/6] hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize() Date: Tue, 9 Mar 2021 15:26:25 +0100 Message-Id: <20210309142630.728014-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210309142630.728014-1-f4bug@amsat.org> References: <20210309142630.728014-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The ISD I/O region belongs to the TYPE_GT64120_PCI_HOST_BRIDGE, so initialize it before it is realized, not after. Rename the region as 'gt64120-isd' so it is clearer to realize it belongs to the GT64120 in the memory tree view. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: BALATON Zoltan --- hw/mips/gt64xxx_pci.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 588e6f99301..6eb73e77057 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1196,6 +1196,14 @@ static void gt64120_reset(DeviceState *dev) gt64120_pci_mapping(s); } =20 +static void gt64120_realize(DeviceState *dev, Error **errp) +{ + GT64120State *s =3D GT64120_PCI_HOST_BRIDGE(dev); + + memory_region_init_io(&s->ISD_mem, OBJECT(dev), &isd_mem_ops, s, + "gt64120-isd", 0x1000); +} + PCIBus *gt64120_register(qemu_irq *pic) { GT64120State *d; @@ -1214,8 +1222,6 @@ PCIBus *gt64120_register(qemu_irq *pic) get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, - "isd-mem", 0x1000); =20 pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); return phb->bus; @@ -1270,6 +1276,7 @@ static void gt64120_class_init(ObjectClass *klass, vo= id *data) DeviceClass *dc =3D DEVICE_CLASS(klass); =20 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->realize =3D gt64120_realize; dc->reset =3D gt64120_reset; dc->vmsd =3D &vmstate_gt64120; } --=20 2.26.2 From nobody Mon Feb 9 06:08:59 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.218.54 as permitted sender) client-ip=209.85.218.54; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-f54.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.54 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1615300004; cv=none; d=zohomail.com; s=zohoarc; b=AkqqTxjsqPs7XZDhHH7F2D3qdnFj82syMivm5QXAuCl7VMxUjodYC5dRJ1j7anICF7t4ZT9KZ9FMOe8zoaCkOSFKcbJX4wbkto7Zy/cQTvGrxxPfbVAhiX1eCV1pw9VWhumfG+IMQQKs+Vr5NcgT79QhE54ie4ustgG5YcLVA7w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615300004; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=fHShbnL609j0MJwdNHwq2VVMU06lFz5d39e3YBTfjlM=; b=g8fEjJSWxrD4X/A6OJ4XWaAURT9AKAQOCjsP2fe22mqFv33/5723A7lAvi2xfIshzBFKv6SlBP9fQjXfq2EjgJ1gOzHCkr2vaRtdoVa0wG3rQ4x+8owALpaDjU68DKbZOat+2dlDaILwCC+gLFSDsmiyXfVW0JwSWs2Uh9KhMcg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.54 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) by mx.zohomail.com with SMTPS id 1615300004475952.9652041178553; Tue, 9 Mar 2021 06:26:44 -0800 (PST) Received: by mail-ej1-f54.google.com with SMTP id c10so28119269ejx.9 for ; Tue, 09 Mar 2021 06:26:43 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id n2sm8340751ejl.1.2021.03.09.06.26.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 06:26:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fHShbnL609j0MJwdNHwq2VVMU06lFz5d39e3YBTfjlM=; b=mRFpumqGEVNpA5+uXsEp9koWeDRufmAAmXZLwzLV4Tcrstu4LRzGsDsi/TQ2PctIKW vA8Ywtru2zNvPspdE6H7pZ/CczkY7uqubKdER+cw5H22hwIv70KPaDz772uYmY/Jq4I/ BxoFUF6gveqgNtgf6bTcmtbbi/nE1fvXnzamkSlTzOjdOHX91JTmnIdXpFjlbKxklBcS Gf/bQToSM6vq3jLhWhWwvLs+tItMpO8yXlBTxl/6WLZ/Muggr4uaXhmSQNaRK1qF2W69 kK4RpaqnGSwjJ7EFzmFOvkmpuRNbRj63+CnX++ZHkYXtTjbmEYfQjaPKj21TmFSfZC+2 r52g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=fHShbnL609j0MJwdNHwq2VVMU06lFz5d39e3YBTfjlM=; b=mNfy/5/nlqv0Q5fhstyNkgcrbG3LlvGYXFnDPOTVlQ6OT0XPu8QW0hQ8KRQdkcg1GJ l+kUxKLnBjGR2SmAg4gb7vSTRlB9ykVxQsbWFuik1u1c1SXs2+F7qGLDcvUy0OoX4C6f bvvsP7CJF4nSu/2aVsEOhKa0OrcZbYUIDlWlwUq+F+xhuJG9LjgqC1a/KR+zeE0y1iiQ JR014d0BHJRtTCBemscA1QQKcqoeCrvzjft64m0ia6h4ynEwxAbY8nFRi1ZcnlZQ0g8w lve8+5ZKT5LDBSdS04O0GhoGkZsT5410dLNK12CxI88HarVQr12MbQ/MOplY1cZeTLUB imZw== X-Gm-Message-State: AOAM533LjHInrfwQ/nqBCIDiVc4hsHAwh6QxUnegvMZ3mr9vBYzue3nn GPGrzwRelULKXAXO2kO4phY= X-Google-Smtp-Source: ABdhPJyY2xGphduKpgVYRaWxoNMhcq+mwZrwrSUUsvqT+POJQ06HZtvvr+/I9AgxZOE8TDIE/Pbd1w== X-Received: by 2002:a17:906:1a44:: with SMTP id j4mr20957347ejf.401.1615300002725; Tue, 09 Mar 2021 06:26:42 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , BALATON Zoltan Subject: [PATCH RESEND 2/6] hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers Date: Tue, 9 Mar 2021 15:26:26 +0100 Message-Id: <20210309142630.728014-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210309142630.728014-1-f4bug@amsat.org> References: <20210309142630.728014-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The ISD MemoryRegion is implemented for 32-bit accesses. Simplify it by setting the MemoryRegionOps::impl min/max access size fields. Since the region is registered with a size of 0x1000 bytes, we can remove the hwaddr mask. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: BALATON Zoltan --- hw/mips/gt64xxx_pci.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 6eb73e77057..99b1690af19 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -385,13 +385,12 @@ static void gt64120_writel(void *opaque, hwaddr addr, { GT64120State *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); - uint32_t saddr; + uint32_t saddr =3D addr >> 2; =20 if (!(s->regs[GT_CPU] & 0x00001000)) { val =3D bswap32(val); } =20 - saddr =3D (addr & 0xfff) >> 2; switch (saddr) { =20 /* CPU Configuration */ @@ -695,9 +694,8 @@ static uint64_t gt64120_readl(void *opaque, GT64120State *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); uint32_t val; - uint32_t saddr; + uint32_t saddr =3D addr >> 2; =20 - saddr =3D (addr & 0xfff) >> 2; switch (saddr) { =20 /* CPU Configuration */ @@ -976,6 +974,10 @@ static const MemoryRegionOps isd_mem_ops =3D { .read =3D gt64120_readl, .write =3D gt64120_writel, .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, }; =20 static int gt64120_pci_map_irq(PCIDevice *pci_dev, int irq_num) --=20 2.26.2 From nobody Mon Feb 9 06:08:59 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.218.41 as permitted sender) client-ip=209.85.218.41; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-f41.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.41 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1615300009; cv=none; d=zohomail.com; s=zohoarc; b=JuM5wbLO3nc6Nw/dMnirgBtCD6fWmx0Omb4tZwv03E9KrGx+ZUbmkytNNm/ByL4edBJ5Aw/n81OssgyooD0md8gryW7fDfjmH8I1wW3VBXJQLC5k5zJiA2qvo1OREZ3vVjvQq3SQjDk/L4kICX6D9+pI1IK4++YDlHoU78KP4PM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615300009; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=wPcnqGU4UTHM8Jk/Lrqw/LIFbJVS4CYQnfKcUElhSEw=; b=AFSqWmlFSvVW/aeoKOZpEu1Pk96IH7SNLnpQMR41qn0oIbm02LvU9hFYVGvjNj9MTxr4CRFeqEsspiKLaRQ+yej4v1PuwR4Ny/E7p7oj+lfGRUvuAyRlnBeKm30h6TAvW5IqnrNVGdPM83vTXlnd/8jsrpRAcZfc0mr7ETI5yEU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.41 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ej1-f41.google.com (mail-ej1-f41.google.com [209.85.218.41]) by mx.zohomail.com with SMTPS id 1615300009708345.5950325324909; Tue, 9 Mar 2021 06:26:49 -0800 (PST) Received: by mail-ej1-f41.google.com with SMTP id p8so28158764ejb.10 for ; Tue, 09 Mar 2021 06:26:49 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id r17sm7184291edx.1.2021.03.09.06.26.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 06:26:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wPcnqGU4UTHM8Jk/Lrqw/LIFbJVS4CYQnfKcUElhSEw=; b=Dbr/iudgcy31GQbHuC2eXzT8lxx/ihsiQsF3hU9uXw75ZUd5+vBvUSHuy+91bHMoBA h2TgpKcstOnpwmVrpbyqQSWeI2tXu/JnWbfGdBhvSkSGH8IS/g+aPYylH3DUlzykSE0+ qn40jSS5jKBB/+gQWZ/h5PWFMX+9YvZUlkX1tj+3Poo4SUqR9IyqoCOE+W1rGVm9dQ74 GH1OtpD4U/4H36R8JiHS9Ewh8GHzcJUTeHZzFVwybfWDu5BYiO+F4p4nxQz0Ag8RSf4N V9G+kYa3EBogi6geu2i8SQMWYqeRAaTP7yY+nfUJ1GO+y+5mzzVGLzunUp0BXviM75SW O4/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=wPcnqGU4UTHM8Jk/Lrqw/LIFbJVS4CYQnfKcUElhSEw=; b=f45aZXjxqlERBxbRRrhQaOYhpcJxlAf70fbkK5H/dr+qol3iORL9L0E0lNYRrVMgRr MUcQw644gUQrI+Qmk4kDlUF6aRPIYxwaqvH04nYPeP76UFEfLVhEGQI7LBHOaPEvnu/5 Lc38i/nvKHidusTZkcZDyIgEzoo5JA3Nrc3uTurpfNFr1mVOLUXGx0LeIKL3nE3cNSWg 9xsgc5348uMImXSAaIKfoWw85DNg1/GDq59PrlgO37/UOjb7K/y8G15Yuw3f7R9RNVce jr6XsPZp+/jMcPR5on4W9oSbJ+mzeUYZvcJBg7VbFprVK1V1g+qAUjCNHtWDtEo3iTbQ 2FuQ== X-Gm-Message-State: AOAM530HpRNgaAyrpm5XwLVmdG1O7IwZu8CCWfcaoA9aMbQx7T0LhvcB pU9xU6UklK5qYl8pVFyW+i8= X-Google-Smtp-Source: ABdhPJwVZBel/BROAPrKw6VmjeWIQVoZGj2UUSz6vDOHTKTKVdOnDYy9d6ce9wLH+UWdd+aUpXSi4g== X-Received: by 2002:a17:907:7355:: with SMTP id dq21mr18195608ejc.159.1615300007902; Tue, 09 Mar 2021 06:26:47 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , BALATON Zoltan Subject: [PATCH RESEND 3/6] hw/mips/gt64xxx: Fix typos in qemu_log_mask() formats Date: Tue, 9 Mar 2021 15:26:27 +0100 Message-Id: <20210309142630.728014-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210309142630.728014-1-f4bug@amsat.org> References: <20210309142630.728014-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Fix the following typos: - GT_PCI1_CFGDATA is not a timer register but a PCI one, - zero-padding flag is out of the format Fixes: 641ca2bfcd5 ("hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of de= bug printf()") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: BALATON Zoltan --- hw/mips/gt64xxx_pci.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 99b1690af19..8ff31380d74 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -463,7 +463,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Read-only registers, do nothing */ qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Read-only register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -473,7 +473,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Read-only registers, do nothing */ qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Read-only register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -515,7 +515,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Not implemented */ qemu_log_mask(LOG_UNIMP, "gt64120: Unimplemented device register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -528,7 +528,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Read-only registers, do nothing */ qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Read-only register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -565,7 +565,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Not implemented */ qemu_log_mask(LOG_UNIMP, "gt64120: Unimplemented DMA register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -578,7 +578,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Not implemented */ qemu_log_mask(LOG_UNIMP, "gt64120: Unimplemented timer register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -621,8 +621,8 @@ static void gt64120_writel(void *opaque, hwaddr addr, case GT_PCI1_CFGDATA: /* not implemented */ qemu_log_mask(LOG_UNIMP, - "gt64120: Unimplemented timer register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "gt64120: Unimplemented PCI register write " + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; case GT_PCI0_CFGADDR: @@ -682,7 +682,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, default: qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Illegal register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; } @@ -958,7 +958,7 @@ static uint64_t gt64120_readl(void *opaque, val =3D s->regs[saddr]; qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Illegal register read " - "reg:0x03%x size:%u value:0x%0*x\n", + "reg:0x%03x size:%u value:0x%0*x\n", saddr << 2, size, size << 1, val); break; } --=20 2.26.2 From nobody Mon Feb 9 06:08:59 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.218.49 as permitted sender) client-ip=209.85.218.49; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-f49.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.49 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1615300017; cv=none; d=zohomail.com; s=zohoarc; b=M42mDWy043rYmJIC8Lmn9q6ZzK9StZxVvlf86qX3st6Ki1GSHaIQFcbt9eny+tyIsgRDPvqDGncKjezz1Ub+67siKTKNZz5IAHYQzRGjsqdC2+VUw4WGIZefecgJzcoARkPOkJhxHu0YvMci3OoD6VXBgi+h2WPOTImiY5Qsn2Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615300017; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=kTzOWUKGqF7Ld/iGKjPTw96gS52bnIzue7kcTaEyF0A=; b=CILCxMgisz/oCfr8dEZtSUaoLC2iNCBafmhCDh8TMFJkkgVeA5VVZlQJOmiY0cBkgFOE7r0/ew6D6Zw2gJ49TWh4yh8elWEvCvT/o8O8iVzRFP1IZISwT/elH8Y120C2Pp8OnS4clpMPSd336Id9CCvNCsXEmU0SoXLlJM4fmjU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.49 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) by mx.zohomail.com with SMTPS id 1615300017076819.9025820291112; Tue, 9 Mar 2021 06:26:57 -0800 (PST) Received: by mail-ej1-f49.google.com with SMTP id r17so28143073ejy.13 for ; Tue, 09 Mar 2021 06:26:54 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id fi11sm8334289ejb.73.2021.03.09.06.26.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 06:26:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kTzOWUKGqF7Ld/iGKjPTw96gS52bnIzue7kcTaEyF0A=; b=P1E0nl4ApF344B/DEimob+BwmXQW9S6iciz3emiux8uHmIECrr+jOfxXv324ArZ/l3 5BuuX6hvFHbT9qJWtQSEbwze4CfsdP+z+PJKqQjfN0i5n6VU110tmesCMonhmBwmTajq BZeIcMu/tl5rYLi0ZcszMQ7boFmRCgTcVw4cDDnnSWUhRkMS3CdFz0/7FNcLbnisJ6rQ jl3qZDAT7XdS2PZTd0jKEJ5BlLmwTR/CCY3d7Ejzyr2l2Cc86utx0tG8mABGNwHC8Y0D P7lCO/B5OIXd1kP97nH3nr+U/huyr0a8f1mJDxoFavbC2yD9McRM4FZSuPDVaVAV4fvw RKUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=kTzOWUKGqF7Ld/iGKjPTw96gS52bnIzue7kcTaEyF0A=; b=mkAZjmobtkkQR5M//YzgcFxEhOFSHMTZ090qPKdjAFEFZCSWS6VeT8kqpo0sarEXlF TjIeauVyjiL/dB4/dHnTOu5cCsA9xMc8FARCjDz7UIBGdb4Hb8VJL4lItqRXRtOUy/us s+UzE3jN+IAudXk1mD05NDYemj1d6ayTYDfdKBRnkhkdYX44GbZtFcCAdlL6JzKVYqMI RzDsjCOVxD8Mduheckds/6fjRuW77e2UXUkFws0uw4IHlHRYgdsQsUTFcpvrtOCiKkwE yDFD97FVfutR2m6YJUph9kFZkqTEEtM/NWSI4x6dQ2gA3noZkqP9wn2x1JhZ4shJczdO LP6w== X-Gm-Message-State: AOAM531YIZSC7E/snsX2CCge1rc0EhiBHNOqOHaIH1nvFBxqjUliCanB Ps6c6ALiPCObI8I4BeemcTd8I9bIXIk= X-Google-Smtp-Source: ABdhPJw1XqhAvLADOuBl1+YA1ITDwzXbDHzpgnzAGtL0saGD7JJTelhu2DDZ9z6mM6SVcOgEnV8Sew== X-Received: by 2002:a17:906:3849:: with SMTP id w9mr20939996ejc.7.1615300013215; Tue, 09 Mar 2021 06:26:53 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , BALATON Zoltan Subject: [PATCH RESEND 4/6] hw/mips/gt64xxx: Rename trace events related to interrupt registers Date: Tue, 9 Mar 2021 15:26:28 +0100 Message-Id: <20210309142630.728014-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210309142630.728014-1-f4bug@amsat.org> References: <20210309142630.728014-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) We want to trace all register accesses. First rename the current gt64120_read / gt64120_write events with '_intreg' suffix, as they are restricted to interrupt registers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: BALATON Zoltan --- hw/mips/gt64xxx_pci.c | 16 ++++++++-------- hw/mips/trace-events | 4 ++-- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 8ff31380d74..9a12d00d1e1 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -642,19 +642,19 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* not really implemented */ s->regs[saddr] =3D ~(~(s->regs[saddr]) | ~(val & 0xfffffffe)); s->regs[saddr] |=3D !!(s->regs[saddr] & 0xfffffffe); - trace_gt64120_write("INTRCAUSE", size, val); + trace_gt64120_write_intreg("INTRCAUSE", size, val); break; case GT_INTRMASK: s->regs[saddr] =3D val & 0x3c3ffffe; - trace_gt64120_write("INTRMASK", size, val); + trace_gt64120_write_intreg("INTRMASK", size, val); break; case GT_PCI0_ICMASK: s->regs[saddr] =3D val & 0x03fffffe; - trace_gt64120_write("ICMASK", size, val); + trace_gt64120_write_intreg("ICMASK", size, val); break; case GT_PCI0_SERR0MASK: s->regs[saddr] =3D val & 0x0000003f; - trace_gt64120_write("SERR0MASK", size, val); + trace_gt64120_write_intreg("SERR0MASK", size, val); break; =20 /* Reserved when only PCI_0 is configured. */ @@ -929,19 +929,19 @@ static uint64_t gt64120_readl(void *opaque, /* Interrupts */ case GT_INTRCAUSE: val =3D s->regs[saddr]; - trace_gt64120_read("INTRCAUSE", size, val); + trace_gt64120_read_intreg("INTRCAUSE", size, val); break; case GT_INTRMASK: val =3D s->regs[saddr]; - trace_gt64120_read("INTRMASK", size, val); + trace_gt64120_read_intreg("INTRMASK", size, val); break; case GT_PCI0_ICMASK: val =3D s->regs[saddr]; - trace_gt64120_read("ICMASK", size, val); + trace_gt64120_read_intreg("ICMASK", size, val); break; case GT_PCI0_SERR0MASK: val =3D s->regs[saddr]; - trace_gt64120_read("SERR0MASK", size, val); + trace_gt64120_read_intreg("SERR0MASK", size, val); break; =20 /* Reserved when only PCI_0 is configured. */ diff --git a/hw/mips/trace-events b/hw/mips/trace-events index 915139d9811..b7e934c3933 100644 --- a/hw/mips/trace-events +++ b/hw/mips/trace-events @@ -1,4 +1,4 @@ # gt64xxx_pci.c -gt64120_read(const char *regname, unsigned size, uint64_t value) "gt64120 = read %s size:%u value:0x%08" PRIx64 -gt64120_write(const char *regname, unsigned size, uint64_t value) "gt64120= write %s size:%u value:0x%08" PRIx64 +gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "g= t64120 read %s size:%u value:0x%08" PRIx64 +gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "= gt64120 write %s size:%u value:0x%08" PRIx64 gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_le= ngth, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRI= x64 "@0x%08" PRIx64 --=20 2.26.2 From nobody Mon Feb 9 06:08:59 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.218.43 as permitted sender) client-ip=209.85.218.43; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-f43.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.43 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1615300020; cv=none; d=zohomail.com; s=zohoarc; b=fMJQef01D1viYnvip7zBsBvNiYodr+3SpNFf0vMXc0zxajmx70voWNAURM1+NYT7JqlsGJ66Se/MJ+3YbT1uTxbBsJd3XU9OtqqkgrCr7YQmnvpIl5/MERtz7uXyRiP8nV/31a04R11zvNdXrEPHGChRYWBwrzqZrjz2ENn2nIU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615300020; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=L3v18ZL7N+cktt0efKAeS8NVT3CCQT0jjeaLH5CTmjc=; b=KnJQfrz7GbUwrP7myswI7VW66TBFyzfqI9GUkx+EyEWPIsm9Kh2cBsgQS0lzYmKh5ii2t77y85WZlLe4Pjl/IV+EOjmPCpgV7waUqpvAIN8B10xJUi39RUFZ6XAoB8/ZILQO5aeJsmuDJ0XCGnXrwyW8h34RYWiaeRtp+W8eG6U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.43 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ej1-f43.google.com (mail-ej1-f43.google.com [209.85.218.43]) by mx.zohomail.com with SMTPS id 1615300020173691.0836738714872; Tue, 9 Mar 2021 06:27:00 -0800 (PST) Received: by mail-ej1-f43.google.com with SMTP id bm21so28159382ejb.4 for ; Tue, 09 Mar 2021 06:26:59 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id s11sm3065335edt.27.2021.03.09.06.26.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 06:26:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L3v18ZL7N+cktt0efKAeS8NVT3CCQT0jjeaLH5CTmjc=; b=FrqJHveuA7Z+/pB0t1KxhikvGLPi6lv9laW28yFYD9A/lJ5RLNZctUe8UB0WG0HfIb 9yfFPCCifSZp5+gC1hwsWkT+E6mdo9M6UCthFzjFv1ELF0RVGl6TcOXsoAwpG3xoYFYz HrDhNUrnsdqnyOU8s3owmBW9/lngTAtU3FAv7RGUeK3TLSjWKFBgE01rR/rGq5jf6Ruo LA10l9bh5TMAfOJgzHgfVGHnPgvAdl1vL+AsPxMuhlUKi4ElB+WNp9+1gukDRuW09j0Z low8OSQMsAXNel4h65dR5MMzcpTl2KqNjcceqQgn0wCfC8QeXDlOK4k5WtiMnERhjGrW HG/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=L3v18ZL7N+cktt0efKAeS8NVT3CCQT0jjeaLH5CTmjc=; b=JVos/8EUwSQEavku+JuQ5T0LTJyCoYCUmqMPI1iQw8jdOfRBF45yP+33F7TBZtvVmk MbtrIp4P/sG8ByS0v/jon84jamgCIKNEKDNc8xx7h6cGsdwcrRrsRQFnnCkmUps9wUG0 bvfDEAWX+a/4yZmtovrpIHALclerqmG3nDCAo9c4buPWtVYDOV9QnoJn2fHMdghS+LaC gz8f4k5ZhOtVdt7UTFo5eq9gbduEbprK2yTc4OxbvSSXPr2/FY60vESEcvI4kNgdz2Zw pUW/r8Su91wiKvhby4OZ2aNmMDkezxBxB6oKGnzTpRP1Omcz5JiRC2yKjxUWy125zMYc ShTQ== X-Gm-Message-State: AOAM530VtaHaOzTYFBYYtisN9GqdooSBZTcpWx8LHHEdmSbE6218z1z9 OuyRUYqcls0pLpbxrWJyUvs= X-Google-Smtp-Source: ABdhPJx1Ys/9MMOAZWU/fFfAVB2g9FVVlyJ+7Y7XCgD7JdN6/EIjYZfZmgfJWoMo+1o4BN9pTRogPw== X-Received: by 2002:a17:907:9808:: with SMTP id ji8mr18971135ejc.333.1615300018292; Tue, 09 Mar 2021 06:26:58 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , BALATON Zoltan Subject: [PATCH RESEND 5/6] hw/mips/gt64xxx: Trace accesses to ISD registers Date: Tue, 9 Mar 2021 15:26:29 +0100 Message-Id: <20210309142630.728014-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210309142630.728014-1-f4bug@amsat.org> References: <20210309142630.728014-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Trace all accesses to Internal Space Decode (ISD) registers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: BALATON Zoltan --- hw/mips/gt64xxx_pci.c | 2 ++ hw/mips/trace-events | 2 ++ 2 files changed, 4 insertions(+) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 9a12d00d1e1..43349d6837d 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -387,6 +387,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, PCIHostState *phb =3D PCI_HOST_BRIDGE(s); uint32_t saddr =3D addr >> 2; =20 + trace_gt64120_write(addr, val); if (!(s->regs[GT_CPU] & 0x00001000)) { val =3D bswap32(val); } @@ -966,6 +967,7 @@ static uint64_t gt64120_readl(void *opaque, if (!(s->regs[GT_CPU] & 0x00001000)) { val =3D bswap32(val); } + trace_gt64120_read(addr, val); =20 return val; } diff --git a/hw/mips/trace-events b/hw/mips/trace-events index b7e934c3933..13ee731a488 100644 --- a/hw/mips/trace-events +++ b/hw/mips/trace-events @@ -1,4 +1,6 @@ # gt64xxx_pci.c +gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" va= lue:0x%08" PRIx64 +gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64" = value:0x%08" PRIx64 gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "g= t64120 read %s size:%u value:0x%08" PRIx64 gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "= gt64120 write %s size:%u value:0x%08" PRIx64 gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_le= ngth, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRI= x64 "@0x%08" PRIx64 --=20 2.26.2 From nobody Mon Feb 9 06:08:59 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.208.48 as permitted sender) client-ip=209.85.208.48; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-f48.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.48 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1615300026; cv=none; d=zohomail.com; s=zohoarc; b=IFaw3YKVHlQzcMMYjPHQ5Y/rzH8pC1Ekp9hvaAFPnV7bOWv6NGuxm6PBwqXTdwDJJOyses7T7+9mQaCiznA97dVES4qr6EIQctK7SxWvphIO+X5b1zbmdH30/aamMoqvj8np9uI7EYALIUkdksN7VfFqnFqOyLe97HVYMYU1mjI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615300026; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RFA8710d7y21V9/sjoSrymWAAotgH49b0pKscVplcYw=; b=Y+XUa+DnRmkAieHpPSu2fUXFt7NYvyRCW/D+bptNiTnesJf8dHgSZsbnvHMeSDSomWw3WBB/jLRaGCp3WYdtHiHUNIWwU6BgjfNR4x6V1zH2KXhwxZuqPEubkUGlWEPvBHoPSLgc9eaqF80ZMuzoPB1S8SKpXLWwP9HWLfJbJR4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.48 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ed1-f48.google.com (mail-ed1-f48.google.com [209.85.208.48]) by mx.zohomail.com with SMTPS id 1615300026501402.92350242067914; Tue, 9 Mar 2021 06:27:06 -0800 (PST) Received: by mail-ed1-f48.google.com with SMTP id b7so20487996edz.8 for ; Tue, 09 Mar 2021 06:27:05 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id b17sm8149195ejj.9.2021.03.09.06.27.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 06:27:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RFA8710d7y21V9/sjoSrymWAAotgH49b0pKscVplcYw=; b=BSjvmPHAIVVMSfZIVzs+16uxOxSkk81HRBA0kRvpV8nhzTnllQkIqUP8CLXe1mLlEo 0nsRB3X2ZslglNoccglBj5hFHVLB9hjxA8aC9RTEQto4XkBUVsb5O8MzH/4vG5zoc2q3 EDOUm9X9ZJBrvleGOXgPIIZnHL+4TpZTdsS7zBFgWuTIZaQTFF8r06ncxn7idOkndB5f 2A+vSx7nonUs1Hbb5q57ybaxiP81ra0WgaGxINeP6/z5el2siAF7Ge7eOpAvJH8M2jN8 Y6uSuTDwJWQcJKdwjKKpIx6UtDG5esZd3BiKTwrkWjZGOB8tG59wnDN6GpZxu44xYs17 ZDjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=RFA8710d7y21V9/sjoSrymWAAotgH49b0pKscVplcYw=; b=RdEb8iN+MWHQ1T9rkb1XGpV2aZsuy0NzA9dz2QraQv2TU5rYT2kwqqzYclUHdd4qdL siJqZY5bAxMZ9GQcB2Tsn+xTADxmpIeBdE90zUkoRROj9NU34cYCfWoeb819btdXNQgQ GUVE3wEAvq54NSA6i7b27DA4Tf2CgnOvt7Jfu3T1tBL8ZRkfGG/UJ7VC50vMKi0hKyfC GTeWucJtZvHoh5Rkx8Yo75UOexHRHGxleOC1HF7XLlIfdO2QBsr5sSBZ5csLhCnOOpY2 WMiN1FD5lgWmp3cGsa2QUYg1DoMjRhMiP5EUSMHoRYnJ4wxptk2h/agtL3Ya3NFxNslA 1t7Q== X-Gm-Message-State: AOAM5336YB4Hs+vZAEH86urBMcFfhPYuW2voXVFNtXp71V508U1vfAEA vvxX3YgXRzLQ63scw/hLkRo= X-Google-Smtp-Source: ABdhPJxwUkTSFGUX3GsQ956FVFaacpGs3ogL35e8zZVueABofAF5C5cafZZGvsyMxc6g0/Q6OxPWuQ== X-Received: by 2002:aa7:d416:: with SMTP id z22mr4343910edq.239.1615300023694; Tue, 09 Mar 2021 06:27:03 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , BALATON Zoltan Subject: [PATCH RESEND 6/6] hw/mips/gt64xxx: Let the GT64120 manage the lower 512MiB hole Date: Tue, 9 Mar 2021 15:26:30 +0100 Message-Id: <20210309142630.728014-7-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210309142630.728014-1-f4bug@amsat.org> References: <20210309142630.728014-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Per the comment in the Malta board, the [0x0000.0000-0x2000.0000] range is decoded by the GT64120, so move the "empty_slot" there. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/gt64xxx_pci.c | 8 ++++++++ hw/mips/malta.c | 7 ------- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 43349d6837d..a3926e5cb8a 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -29,6 +29,7 @@ #include "hw/mips/mips.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" +#include "hw/misc/empty_slot.h" #include "hw/southbridge/piix.h" #include "migration/vmstate.h" #include "hw/intc/i8259.h" @@ -1206,6 +1207,13 @@ static void gt64120_realize(DeviceState *dev, Error = **errp) =20 memory_region_init_io(&s->ISD_mem, OBJECT(dev), &isd_mem_ops, s, "gt64120-isd", 0x1000); + + /* + * The whole address space decoded by the GT-64120A doesn't generate + * exception when accessing invalid memory. Create an empty slot to + * emulate this feature. + */ + empty_slot_init("GT64120", 0, 0x20000000); } =20 PCIBus *gt64120_register(qemu_irq *pic) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 9afc0b427bf..b2469f8ee78 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -56,7 +56,6 @@ #include "sysemu/runstate.h" #include "qapi/error.h" #include "qemu/error-report.h" -#include "hw/misc/empty_slot.h" #include "sysemu/kvm.h" #include "hw/semihosting/semihost.h" #include "hw/mips/cps.h" @@ -1396,12 +1395,6 @@ void mips_malta_init(MachineState *machine) =20 /* Northbridge */ pci_bus =3D gt64120_register(s->i8259); - /* - * The whole address space decoded by the GT-64120A doesn't generate - * exception when accessing invalid memory. Create an empty slot to - * emulate this feature. - */ - empty_slot_init("GT64120", 0, 0x20000000); =20 /* Southbridge */ dev =3D piix4_create(pci_bus, &isa_bus, &smbus); --=20 2.26.2