target/arm/translate.h | 8 +- target/arm/neon-dp.decode | 106 +++ target/arm/translate-a64.c | 8 +- target/arm/translate-neon.inc.c | 1191 ++++++++++++++++++++++++++++++- target/arm/translate.c | 1061 +-------------------------- 5 files changed, 1311 insertions(+), 1063 deletions(-)
This patchset completes the conversion of Neon to decodetree
by converting all the instructions in the 2-reg-misc grouping.
There are some potential further cleanups available, which I don't
propose to do (I've spent what feels like too much time on this
refactoring already; I want to move onto implementing FP16 now,
which is what the refactoring was intended to permit):
* the oddball "TCG temps in global variables" cpu_V0, cpu_V1,
cpu_M0 are now used only in the iwmmxt codegen; V0 and V1
would be easy to replace with local temporaries. M0 is
slightly trickier. The main thing that dissuades me from
this refactoring is that I don't have an easy way to test the
iwmmxt codegen.
* we have a confusingly large number of ways to load and
store from the Neon/VFP register file:
- neon_load_reg/neon_store_reg
- neon_load_reg64/neon_store_reg64
- neon_load_reg32/neon_store_reg32
- neon_load_element/neon_store_element
- neon_load_element64/neon_store_element64
which all have subtly different semantics. The way that
neon_load_reg/neon_store_reg do a "create temp on load,
destroy temp on store" and none of the rest do is particularly
confusing. I'd like us to have fewer of these but it's not
immediately obvious what the correct small set of primitives
should be.
* it would be nice to make the vfp and neon decode really
separate translation units rather than #including them
into translate.c someday
thanks
-- PMM
Peter Maydell (21):
target/arm: Convert Neon 2-reg-misc VREV64 to decodetree
target/arm: Convert Neon 2-reg-misc pairwise ops to decodetree
target/arm: Convert VZIP, VUZP to decodetree
target/arm: Convert Neon narrowing moves to decodetree
target/arm: Convert Neon 2-reg-misc VSHLL to decodetree
target/arm: Convert Neon VCVT f16/f32 insns to decodetree
target/arm: Convert vectorised 2-reg-misc Neon ops to decodetree
target/arm: Convert Neon 2-reg-misc crypto operations to decodetree
target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn
target/arm: Fix capitalization in NeonGenTwo{Single,Double}OPFn
typedefs
target/arm: Make gen_swap_half() take separate src and dest
target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetree
target/arm: Convert remaining simple 2-reg-misc Neon ops
target/arm: Convert Neon VQABS, VQNEG to decodetree
target/arm: Convert simple fp Neon 2-reg-misc insns
target/arm: Convert Neon 2-reg-misc fp-compare-with-zero insns to
decodetree
target/arm: Convert Neon 2-reg-misc VRINT insns to decodetree
target/arm: Convert Neon 2-reg-misc VCVT insns to decodetree
target/arm: Convert Neon VSWP to decodetree
target/arm: Convert Neon VTRN to decodetree
target/arm: Move some functions used only in translate-neon.inc.c to
that file
target/arm/translate.h | 8 +-
target/arm/neon-dp.decode | 106 +++
target/arm/translate-a64.c | 8 +-
target/arm/translate-neon.inc.c | 1191 ++++++++++++++++++++++++++++++-
target/arm/translate.c | 1061 +--------------------------
5 files changed, 1311 insertions(+), 1063 deletions(-)
--
2.20.1
Patchew URL: https://patchew.org/QEMU/20200616170844.13318-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH 00/21] target/arm: Finish neon decodetree conversion
Type: series
Message-id: 20200616170844.13318-1-peter.maydell@linaro.org
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
f6e3d71 target/arm: Move some functions used only in translate-neon.inc.c to that file
4a2df60 target/arm: Convert Neon VTRN to decodetree
26f74d6 target/arm: Convert Neon VSWP to decodetree
7a0fa02 target/arm: Convert Neon 2-reg-misc VCVT insns to decodetree
73198e7 target/arm: Convert Neon 2-reg-misc VRINT insns to decodetree
0908381 target/arm: Convert Neon 2-reg-misc fp-compare-with-zero insns to decodetree
f6d72da target/arm: Convert simple fp Neon 2-reg-misc insns
3ef1127 target/arm: Convert Neon VQABS, VQNEG to decodetree
624f399 target/arm: Convert remaining simple 2-reg-misc Neon ops
9bb8fa6 target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetree
3535d27 target/arm: Make gen_swap_half() take separate src and dest
2eac819 target/arm: Fix capitalization in NeonGenTwo{Single, Double}OPFn typedefs
e30825b target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn
7d1109a target/arm: Convert Neon 2-reg-misc crypto operations to decodetree
9d87342 target/arm: Convert vectorised 2-reg-misc Neon ops to decodetree
605ae75 target/arm: Convert Neon VCVT f16/f32 insns to decodetree
5fb6c16 target/arm: Convert Neon 2-reg-misc VSHLL to decodetree
e2e99ab target/arm: Convert Neon narrowing moves to decodetree
3dde5dd target/arm: Convert VZIP, VUZP to decodetree
3ed7eaf target/arm: Convert Neon 2-reg-misc pairwise ops to decodetree
37f7428 target/arm: Convert Neon 2-reg-misc VREV64 to decodetree
=== OUTPUT BEGIN ===
1/21 Checking commit 37f7428534e5 (target/arm: Convert Neon 2-reg-misc VREV64 to decodetree)
2/21 Checking commit 3ed7eaff8f5f (target/arm: Convert Neon 2-reg-misc pairwise ops to decodetree)
3/21 Checking commit 3dde5ddb764b (target/arm: Convert VZIP, VUZP to decodetree)
4/21 Checking commit e2e99ab61e59 (target/arm: Convert Neon narrowing moves to decodetree)
5/21 Checking commit 5fb6c161af86 (target/arm: Convert Neon 2-reg-misc VSHLL to decodetree)
6/21 Checking commit 605ae75d2431 (target/arm: Convert Neon VCVT f16/f32 insns to decodetree)
7/21 Checking commit 9d87342857c8 (target/arm: Convert vectorised 2-reg-misc Neon ops to decodetree)
8/21 Checking commit 7d1109aae4db (target/arm: Convert Neon 2-reg-misc crypto operations to decodetree)
9/21 Checking commit e30825bbd0a4 (target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn)
10/21 Checking commit 2eac8198e699 (target/arm: Fix capitalization in NeonGenTwo{Single, Double}OPFn typedefs)
11/21 Checking commit 3535d2721010 (target/arm: Make gen_swap_half() take separate src and dest)
ERROR: trailing statements should be on next line
#50: FILE: target/arm/translate.c:4963:
+ case 1: gen_swap_half(tmp, tmp); break;
total: 1 errors, 0 warnings, 43 lines checked
Patch 11/21 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/21 Checking commit 9bb8fa6a3658 (target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetree)
13/21 Checking commit 624f399e8573 (target/arm: Convert remaining simple 2-reg-misc Neon ops)
14/21 Checking commit 3ef11275c669 (target/arm: Convert Neon VQABS, VQNEG to decodetree)
15/21 Checking commit f6d72da4c6fc (target/arm: Convert simple fp Neon 2-reg-misc insns)
16/21 Checking commit 090838197cf0 (target/arm: Convert Neon 2-reg-misc fp-compare-with-zero insns to decodetree)
17/21 Checking commit 73198e721bff (target/arm: Convert Neon 2-reg-misc VRINT insns to decodetree)
18/21 Checking commit 7a0fa02240e2 (target/arm: Convert Neon 2-reg-misc VCVT insns to decodetree)
19/21 Checking commit 26f74d6de184 (target/arm: Convert Neon VSWP to decodetree)
20/21 Checking commit 4a2df6081512 (target/arm: Convert Neon VTRN to decodetree)
21/21 Checking commit f6e3d7186b3e (target/arm: Move some functions used only in translate-neon.inc.c to that file)
WARNING: Block comments use a leading /* on a separate line
#28: FILE: target/arm/translate-neon.inc.c:57:
+/* Return the offset of a 2**SIZE piece of a NEON register, at index ELE,
WARNING: Block comments use a leading /* on a separate line
#37: FILE: target/arm/translate-neon.inc.c:66:
+ /* Calculate the offset assuming fully little-endian,
total: 0 errors, 2 warnings, 226 lines checked
Patch 21/21 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20200616170844.13318-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20200616170844.13318-1-peter.maydell@linaro.org/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
export ARCH=x86_64
make docker-image-fedora V=1 NETWORK=1
time make docker-test-debug@fedora TARGET_LIST=x86_64-softmmu J=14 NETWORK=1
=== TEST SCRIPT END ===
CC qga/guest-agent-command-state.o
CC qga/main.o
CC qga/commands-posix.o
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
CC qga/channel-posix.o
CC qga/qapi-generated/qga-qapi-types.o
CC qga/qapi-generated/qga-qapi-visit.o
---
AR libvhost-user.a
GEN docs/interop/qemu-ga-ref.html
GEN docs/interop/qemu-ga-ref.txt
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
GEN docs/interop/qemu-ga-ref.7
LINK qemu-keymap
LINK ivshmem-client
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
LINK ivshmem-server
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
LINK qemu-nbd
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
AS pc-bios/optionrom/multiboot.o
AS pc-bios/optionrom/linuxboot.o
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
LINK qemu-storage-daemon
CC pc-bios/optionrom/linuxboot_dma.o
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
AS pc-bios/optionrom/kvmvapic.o
AS pc-bios/optionrom/pvh.o
CC pc-bios/optionrom/pvh_main.o
---
SIGN pc-bios/optionrom/linuxboot.bin
SIGN pc-bios/optionrom/linuxboot_dma.bin
SIGN pc-bios/optionrom/kvmvapic.bin
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
BUILD pc-bios/optionrom/pvh.raw
SIGN pc-bios/optionrom/pvh.bin
LINK qemu-io
LINK qemu-edid
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
LINK fsdev/virtfs-proxy-helper
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
LINK scsi/qemu-pr-helper
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
LINK qemu-bridge-helper
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
LINK virtiofsd
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
LINK vhost-user-input
LINK qemu-ga
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
/usr/bin/ld: /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors_vfork.S.o): warning: common of `__interception::real_vfork' overridden by definition from /usr/lib64/clang/10.0.0/lib/linux/libclang_rt.asan-x86_64.a(asan_interceptors.cpp.o)
GEN x86_64-softmmu/hmp-commands.h
GEN x86_64-softmmu/config-target.h
GEN x86_64-softmmu/hmp-commands-info.h
---
CC x86_64-softmmu/accel/tcg/translator.o
CC x86_64-softmmu/accel/xen/xen-all.o
CC x86_64-softmmu/dump/dump.o
/tmp/qemu-test/src/fpu/softfloat.c:3365:13: error: bitwise negation of a boolean expression; did you mean logical negation? [-Werror,-Wbool-operation]
absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
!
/tmp/qemu-test/src/fpu/softfloat.c:3423:18: error: bitwise negation of a boolean expression; did you mean logical negation? [-Werror,-Wbool-operation]
absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven );
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
!
/tmp/qemu-test/src/fpu/softfloat.c:3483:18: error: bitwise negation of a boolean expression; did you mean logical negation? [-Werror,-Wbool-operation]
absZ0 &= ~(((uint64_t)(absZ1<<1) == 0) & roundNearestEven);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
!
/tmp/qemu-test/src/fpu/softfloat.c:3606:13: error: bitwise negation of a boolean expression; did you mean logical negation? [-Werror,-Wbool-operation]
zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
!
/tmp/qemu-test/src/fpu/softfloat.c:3760:13: error: bitwise negation of a boolean expression; did you mean logical negation? [-Werror,-Wbool-operation]
zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
!
/tmp/qemu-test/src/fpu/softfloat.c:3987:21: error: bitwise negation of a boolean expression; did you mean logical negation? [-Werror,-Wbool-operation]
~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
!
/tmp/qemu-test/src/fpu/softfloat.c:4003:22: error: bitwise negation of a boolean expression; did you mean logical negation? [-Werror,-Wbool-operation]
zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
!
/tmp/qemu-test/src/fpu/softfloat.c:4273:18: error: bitwise negation of a boolean expression; did you mean logical negation? [-Werror,-Wbool-operation]
zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
!
8 errors generated.
make[1]: *** [/tmp/qemu-test/src/rules.mak:69: fpu/softfloat.o] Error 1
make[1]: *** Waiting for unfinished jobs....
/tmp/qemu-test/src/migration/ram.c:919:45: error: implicit conversion from 'unsigned long' to 'double' changes value from 18446744073709551615 to 18446744073709551616 [-Werror,-Wimplicit-int-float-conversion]
xbzrle_counters.encoding_rate = UINT64_MAX;
~ ^~~~~~~~~~
/usr/include/stdint.h:130:23: note: expanded from macro 'UINT64_MAX'
---
18446744073709551615UL
^~~~~~~~~~~~~~~~~~~~~~
1 error generated.
make[1]: *** [/tmp/qemu-test/src/rules.mak:69: migration/ram.o] Error 1
make: *** [Makefile:527: x86_64-softmmu/all] Error 2
Traceback (most recent call last):
File "./tests/docker/docker.py", line 669, in <module>
sys.exit(main())
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', '--label', 'com.qemu.instance.uuid=626d1d5e121543ca8c3bbdb19797f602', '-u', '1003', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=x86_64-softmmu', '-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 'SHOW_ENV=', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', '/home/patchew2/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', '/var/tmp/patchew-tester-tmp-heh_4z5t/src/docker-src.2020-06-16-17.47.36.4664:/var/tmp/qemu:z,ro', 'qemu:fedora', '/var/tmp/qemu/run', 'test-debug']' returned non-zero exit status 2.
filter=--filter=label=com.qemu.instance.uuid=626d1d5e121543ca8c3bbdb19797f602
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-heh_4z5t/src'
make: *** [docker-run-test-debug@fedora] Error 2
real 4m29.254s
user 0m7.869s
The full log is available at
http://patchew.org/logs/20200616170844.13318-1-peter.maydell@linaro.org/testing.asan/?type=message.
---
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