[PATCH v2 0/9] target/arm: Convert 2-reg-shift and 1-reg-imm Neon insns to decodetree

Peter Maydell posted 9 patches 1 week ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20200522145520.6778-1-peter.maydell@linaro.org
Maintainers: Peter Maydell <peter.maydell@linaro.org>
target/arm/neon-dp.decode       | 196 ++++++++++
target/arm/translate-neon.inc.c | 625 ++++++++++++++++++++++++++++++++
target/arm/translate.c          | 488 +------------------------
3 files changed, 823 insertions(+), 486 deletions(-)

[PATCH v2 0/9] target/arm: Convert 2-reg-shift and 1-reg-imm Neon insns to decodetree

Posted by Peter Maydell 1 week ago
This patchset converts the Neon insns in the 2-register-and-shift-amount
and 1-register-and-modified-immediate groups to decodetree.

Changes since v1:
 * old patch 1 is now in master
 * patch 1, 2, 3, 4: create and use separate formats for each size of shift
 * patch 5, 6, 7: use new @2reg_shrn_[dsh] formats and keep Q bit in the
   per-insn decode rather than folding it into the format
 * patch 8: use %neon_rshift_i5 in new @2reg_vcvt format
 * patch 9: various changes

Patches still needing review: 1, 5, 9.  (RTH: you might want to look over
2 as well: I didn't use quite the same shift formats you suggested.)

thanks
-- PMM

Peter Maydell (9):
  target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree
  target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree
  target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to
    decodetree
  target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree
  target/arm: Convert Neon narrowing shifts with op==8 to decodetree
  target/arm: Convert Neon narrowing shifts with op==9 to decodetree
  target/arm: Convert Neon VSHLL, VMOVL to decodetree
  target/arm: Convert VCVT fixed-point ops to decodetree
  target/arm: Convert Neon one-register-and-immediate insns to
    decodetree

 target/arm/neon-dp.decode       | 196 ++++++++++
 target/arm/translate-neon.inc.c | 625 ++++++++++++++++++++++++++++++++
 target/arm/translate.c          | 488 +------------------------
 3 files changed, 823 insertions(+), 486 deletions(-)

-- 
2.20.1


Re: [PATCH v2 0/9] target/arm: Convert 2-reg-shift and 1-reg-imm Neon insns to decodetree

Posted by no-reply@patchew.org 1 week ago
Patchew URL: https://patchew.org/QEMU/20200522145520.6778-1-peter.maydell@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20200522145520.6778-1-peter.maydell@linaro.org
Subject: [PATCH v2 0/9] target/arm: Convert 2-reg-shift and 1-reg-imm Neon insns to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
bbfdb6d target/arm: Convert Neon one-register-and-immediate insns to decodetree
e12ab4f target/arm: Convert VCVT fixed-point ops to decodetree
e32ffd0 target/arm: Convert Neon VSHLL, VMOVL to decodetree
09f9294 target/arm: Convert Neon narrowing shifts with op==9 to decodetree
7235981 target/arm: Convert Neon narrowing shifts with op==8 to decodetree
1df57d5 target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree
c2b6277 target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree
f48b59c target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree
2a2d74c target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree

=== OUTPUT BEGIN ===
1/9 Checking commit 2a2d74c89bb5 (target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#55: FILE: target/arm/translate-neon.inc.c:1314:
+static bool do_vector_2sh(DisasContext *s, arg_2reg_shift *a, GVecGen2iFn *fn)
                                                           ^

ERROR: spaces required around that '*' (ctx:WxV)
#85: FILE: target/arm/translate-neon.inc.c:1344:
+    static bool trans_##INSN##_2sh(DisasContext *s, arg_2reg_shift *a)  \
                                                                    ^

total: 2 errors, 0 warnings, 99 lines checked

Patch 1/9 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

2/9 Checking commit f48b59c62b8a (target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#93: FILE: target/arm/translate-neon.inc.c:1370:
+static bool trans_VSHR_S_2sh(DisasContext *s, arg_2reg_shift *a)
                                                              ^

total: 1 errors, 0 warnings, 120 lines checked

Patch 2/9 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/9 Checking commit c2b6277a4e9c (target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree)
4/9 Checking commit 1df57d58e551 (target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree)
5/9 Checking commit 7235981fbe43 (target/arm: Convert Neon narrowing shifts with op==8 to decodetree)
ERROR: do not use C99 // comments
#170: FILE: target/arm/translate-neon.inc.c:1611:
+    // todo expand out the shift-narrow and the narrow-op

total: 1 errors, 0 warnings, 214 lines checked

Patch 5/9 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

6/9 Checking commit 09f9294fe86a (target/arm: Convert Neon narrowing shifts with op==9 to decodetree)
7/9 Checking commit e32ffd0ffb35 (target/arm: Convert Neon VSHLL, VMOVL to decodetree)
8/9 Checking commit e12ab4f9bff6 (target/arm: Convert VCVT fixed-point ops to decodetree)
9/9 Checking commit bbfdb6dcc6d8 (target/arm: Convert Neon one-register-and-immediate insns to decodetree)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200522145520.6778-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
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