[PATCH 8/8] target/arm: Use a non-overlapping group for misc control

Richard Henderson posted 8 patches 5 years, 6 months ago
Maintainers: Richard Henderson <rth@twiddle.net>, Cleber Rosa <crosa@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>, Eduardo Habkost <ehabkost@redhat.com>, Peter Maydell <peter.maydell@linaro.org>
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[PATCH 8/8] target/arm: Use a non-overlapping group for misc control
Posted by Richard Henderson 5 years, 6 months ago
This sub-group in the t32 deocode are mutually exclusive.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/t32.decode | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/arm/t32.decode b/target/arm/t32.decode
index c63082fc9c..c21a988f97 100644
--- a/target/arm/t32.decode
+++ b/target/arm/t32.decode
@@ -312,13 +312,13 @@ CLZ              1111 1010 1011 ---- 1111 .... 1000 ....      @rdm
                  &cps
 
     # Miscellaneous control
-    {
+    [
       CLREX      1111 0011 1011 1111 1000 1111 0010 1111
       DSB        1111 0011 1011 1111 1000 1111 0100 ----
       DMB        1111 0011 1011 1111 1000 1111 0101 ----
       ISB        1111 0011 1011 1111 1000 1111 0110 ----
       SB         1111 0011 1011 1111 1000 1111 0111 0000
-    }
+    ]
 
     # Note that the v7m insn overlaps both the normal and banked insn.
     {
-- 
2.20.1


Re: [PATCH 8/8] target/arm: Use a non-overlapping group for misc control
Posted by Philippe Mathieu-Daudé 5 years, 6 months ago
On 5/18/20 6:40 PM, Richard Henderson wrote:
> This sub-group in the t32 deocode are mutually exclusive.

"The miscellaneous control instructions are mutually exclusive within 
the t32 decode sub-group."?

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/arm/t32.decode | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/arm/t32.decode b/target/arm/t32.decode
> index c63082fc9c..c21a988f97 100644
> --- a/target/arm/t32.decode
> +++ b/target/arm/t32.decode
> @@ -312,13 +312,13 @@ CLZ              1111 1010 1011 ---- 1111 .... 1000 ....      @rdm
>                    &cps
>   
>       # Miscellaneous control
> -    {
> +    [
>         CLREX      1111 0011 1011 1111 1000 1111 0010 1111
>         DSB        1111 0011 1011 1111 1000 1111 0100 ----
>         DMB        1111 0011 1011 1111 1000 1111 0101 ----
>         ISB        1111 0011 1011 1111 1000 1111 0110 ----
>         SB         1111 0011 1011 1111 1000 1111 0111 0000
> -    }
> +    ]
>   
>       # Note that the v7m insn overlaps both the normal and banked insn.
>       {
>