Most of this is the Neon decodetree patches, followed by Edgar's versal cleanups.
thanks
-- PMM
The following changes since commit 2ef486e76d64436be90f7359a3071fb2a56ce835:
Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into staging (2020-05-03 14:12:56 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200504
for you to fetch changes up to 9aefc6cf9b73f66062d2f914a0136756e7a28211:
target/arm: Move gen_ function typedefs to translate.h (2020-05-04 12:59:26 +0100)
----------------------------------------------------------------
target-arm queue:
* Start of conversion of Neon insns to decodetree
* versal board: support SD and RTC
* Implement ARMv8.2-TTS2UXN
* Make VQDMULL undefined when U=1
* Some minor code cleanups
----------------------------------------------------------------
Edgar E. Iglesias (11):
hw/arm: versal: Remove inclusion of arm_gicv3_common.h
hw/arm: versal: Move misplaced comment
hw/arm: versal-virt: Fix typo xlnx-ve -> xlnx-versal
hw/arm: versal: Embed the UARTs into the SoC type
hw/arm: versal: Embed the GEMs into the SoC type
hw/arm: versal: Embed the ADMAs into the SoC type
hw/arm: versal: Embed the APUs into the SoC type
hw/arm: versal: Add support for SD
hw/arm: versal: Add support for the RTC
hw/arm: versal-virt: Add support for SD
hw/arm: versal-virt: Add support for the RTC
Fredrik Strupe (1):
target/arm: Make VQDMULL undefined when U=1
Peter Maydell (25):
target/arm: Don't use a TLB for ARMMMUIdx_Stage2
target/arm: Use enum constant in get_phys_addr_lpae() call
target/arm: Add new 's1_is_el0' argument to get_phys_addr_lpae()
target/arm: Implement ARMv8.2-TTS2UXN
target/arm: Use correct variable for setting 'max' cpu's ID_AA64DFR0
target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check
target/arm: Don't allow Thumb Neon insns without FEATURE_NEON
target/arm: Add stubs for AArch32 Neon decodetree
target/arm: Convert VCMLA (vector) to decodetree
target/arm: Convert VCADD (vector) to decodetree
target/arm: Convert V[US]DOT (vector) to decodetree
target/arm: Convert VFM[AS]L (vector) to decodetree
target/arm: Convert VCMLA (scalar) to decodetree
target/arm: Convert V[US]DOT (scalar) to decodetree
target/arm: Convert VFM[AS]L (scalar) to decodetree
target/arm: Convert Neon load/store multiple structures to decodetree
target/arm: Convert Neon 'load single structure to all lanes' to decodetree
target/arm: Convert Neon 'load/store single structure' to decodetree
target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree
target/arm: Convert Neon 3-reg-same logic ops to decodetree
target/arm: Convert Neon 3-reg-same VMAX/VMIN to decodetree
target/arm: Convert Neon 3-reg-same comparisons to decodetree
target/arm: Convert Neon 3-reg-same VQADD/VQSUB to decodetree
target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to decodetree
target/arm: Move gen_ function typedefs to translate.h
Philippe Mathieu-Daudé (2):
hw/arm/mps2-tz: Use TYPE_IOTKIT instead of hardcoded string
target/arm: Use uint64_t for midr field in CPU state struct
include/hw/arm/xlnx-versal.h | 31 +-
target/arm/cpu-param.h | 2 +-
target/arm/cpu.h | 38 ++-
target/arm/translate-a64.h | 9 -
target/arm/translate.h | 26 ++
target/arm/neon-dp.decode | 86 +++++
target/arm/neon-ls.decode | 52 +++
target/arm/neon-shared.decode | 66 ++++
hw/arm/mps2-tz.c | 2 +-
hw/arm/xlnx-versal-virt.c | 74 ++++-
hw/arm/xlnx-versal.c | 115 +++++--
target/arm/cpu.c | 3 +-
target/arm/cpu64.c | 8 +-
target/arm/helper.c | 183 ++++------
target/arm/translate-a64.c | 17 -
target/arm/translate-neon.inc.c | 714 +++++++++++++++++++++++++++++++++++++++
target/arm/translate-vfp.inc.c | 6 -
target/arm/translate.c | 716 +++-------------------------------------
target/arm/Makefile.objs | 18 +
19 files changed, 1302 insertions(+), 864 deletions(-)
create mode 100644 target/arm/neon-dp.decode
create mode 100644 target/arm/neon-ls.decode
create mode 100644 target/arm/neon-shared.decode
create mode 100644 target/arm/translate-neon.inc.c