From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588595658; cv=none; d=zohomail.com; s=zohoarc; b=FW2aZff0QrJEA9pOqDEhY29GKB684ZLzgpieu30Va+p8W9X/15iepcMsSBYG5FZCTGzY0E2T/NDSw79K33uYOy+fFJ1c6fDUZPlWKW++lmtKtjMJvPr1IEECokW4dvPseeStXulZNg1B+U6tPOvepaz5X0T7Lh9oz8ryHY4lcSA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588595658; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=lZ2EWhoMVecpL6ZkENj7WznZRxce4vuIoxgEVc92JjU=; b=IQUFe5qZxnuEVHKrInpks4VXSl7nK79Na8JJZ5jxgMDaiG3SHwVFDxYipUWNaxctFn3AuStSl/n/clgcL7OVyN6E6KWwgZSbjsnCgHSXF8morkHv2WDq9joJQ304yA1lNMOtEz5oL6hdFs2xIbQL+FcGlo8/HdmkML95jN4DY2E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588595658297197.30301154412905; Mon, 4 May 2020 05:34:18 -0700 (PDT) Received: from localhost ([::1]:36294 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaIb-0001Vw-0k for importer@patchew.org; Mon, 04 May 2020 08:34:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56372) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHd-0008FH-4q for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:17 -0400 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]:33024) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHb-0000j2-7E for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:16 -0400 Received: by mail-wm1-x32b.google.com with SMTP id v8so15468448wma.0 for ; Mon, 04 May 2020 05:33:14 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.12 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=lZ2EWhoMVecpL6ZkENj7WznZRxce4vuIoxgEVc92JjU=; b=hWGBCQgQZyuVbAXc8gpOr+Jm2q/AGMS9jpW2012linYYKMGqoiSsXzLAlAr5WAcO2q 9uYbv/lUEV6gZutiJv7bFJKEsKpctDngneIiRKzweZjpLzLmmPqjCDhMq8p2AfobqziX QVuRvlAzdCCNWVhWjocZvLJKE4VUkyYINifQHxvX/ibEpcGomgH/EHIcKgOpWm3Vjanm Z9RzcaeZse92Q6UMUripf8flq/SofBsEk4wqEueAuHQgjB9doxu+iHW1cLvTZdU+ZYAH r9DXCSqqH0XdYSK4JS7rFkr0NuxvF+V10JRMIQyKWxeQoI79KLgmQqf48dKugH/RpNVD Qa8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lZ2EWhoMVecpL6ZkENj7WznZRxce4vuIoxgEVc92JjU=; b=jWAhjQih9FBfkysiwqf0sZO3GntMRn0XHsHksXkVHwwMbHs4Xk1OGNactTKoQa4WhH gTT1xmnbSNdpcgZg8a7P7qLxLFJ8EZAlrVyjO4lcX+FnBMI+hujyoknpPTuZr2sJHPBr KScd6DSgqJI5Z3F7jYHnDXkOzalxv/gUN2KJSg7rbMX7yw+jxj5R+zMVZdK9B8mwYgZ3 r8OhNQ0B1RGdZspqD29B51FbJwwDhpjg/cw3znhC0yNGFaqTSe74wzZpJJBoy2fayIhk l6YsHUwLG6Y/O644BD4Ktd64jdi7PmBOwBjRmG9HprAkN0QIpEKjsUziDucUP39KdnjY wgIw== X-Gm-Message-State: AGi0PuYE5kiKq9gb7zWZEgMJkhfsxd7VS77j01qDQwdsGjw+UkJ6YBw6 0Txe4IpVv1HOGWK8fRose7L9uOAab0htAQ== X-Google-Smtp-Source: APiQypKeNVlAVtCQGP17Lm/ILxW/xRuKoFImitVUWo+VxVqzqbwUJYiRNDCNkVJ0QKQsCUqOAIGXew== X-Received: by 2002:a1c:5448:: with SMTP id p8mr13988660wmi.173.1588595593432; Mon, 04 May 2020 05:33:13 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/39] target/arm: Make VQDMULL undefined when U=1 Date: Mon, 4 May 2020 13:32:31 +0100 Message-Id: <20200504123309.3808-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32b.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Fredrik Strupe According to Arm ARM, VQDMULL is only valid when U=3D0, while having U=3D1 is unallocated. Signed-off-by: Fredrik Strupe Fixes: 695272dcb976 ("target-arm: Handle UNDEF cases for Neon 3-regs-differ= ent-widths") Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index d4ad2028f12..e3fc7924428 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -6016,7 +6016,7 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) {0, 0, 0, 0}, /* VMLSL */ {0, 0, 0, 9}, /* VQDMLSL */ {0, 0, 0, 0}, /* Integer VMULL */ - {0, 0, 0, 1}, /* VQDMULL */ + {0, 0, 0, 9}, /* VQDMULL */ {0, 0, 0, 0xa}, /* Polynomial VMULL */ {0, 0, 0, 7}, /* Reserved: always UNDEF */ }; --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588595659; cv=none; d=zohomail.com; s=zohoarc; b=B6EHTxViMMtD4BqPwPdpwofPjp+4Yvik7ZdFRRX7wcYHHvaC0NvzHhvWgPdbkWPEO2E6UJsqKF8XERuEC0xWc6bZHTiwqIbqEe5aKNIrrD4lwFocAGHdXtFSbqmYRUi2wuvGmIv4ILIVfZTjrVtfXX4beWLIsHIt4aLUoHtKy5U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588595659; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=xmwQJ59ebHjR9ouwlTnSfL4Ky/fRkTGEraev7ufNxkA=; b=Jhq9p7TvZSYykO7f6B0+SvJUE4iGbDz3nXQpjMmBwHdPxny1uJLLIo99CgXEz1gG14KaPwmoDjizQFoOesLyrwhjB8GpIfOO9s/aTultOtuy/qrjEeqO5WWHtJ6suKFoqMdQ4cGWSC5DjdfpQVUTPncdp/ZC2RRTHKHY5Zoqtx0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588595659744265.23266148442883; Mon, 4 May 2020 05:34:19 -0700 (PDT) Received: from localhost ([::1]:36384 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaIc-0001Xz-AI for importer@patchew.org; Mon, 04 May 2020 08:34:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56376) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHd-0008Fb-PI for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:17 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:45997) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHc-0000j9-Uh for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:17 -0400 Received: by mail-wr1-x430.google.com with SMTP id k1so1830269wro.12 for ; Mon, 04 May 2020 05:33:16 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.13 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=xmwQJ59ebHjR9ouwlTnSfL4Ky/fRkTGEraev7ufNxkA=; b=bqq0lQ1mpxvsAss8rbAXbX8FeEcQpXvVe3PMKyD2nWCO4AJtCOgTUv/wSDbCkrXf9w QbkkxcdIpHt8uPHYvl3clIBMdRHi94tODCvqMD2/A1Szi1MJXjsls7Px4W7LkESp13Wt WSZdB1iOxKns0tAzo3P3H2VELiL2AVGmUc3PF82eggJM5Iv2cOSZ4AwSPmrQi6nHUvy8 AofDml1U10p7BPwOP4zgkJC73RjNXHNKwGD49TzPO/QyWCN/i/8/TMmS/MKo6PS7iHFR Ws9ZBQFCeyOJtwk8qXZRZEy/iZTN4Kb6CRLVtpwBC4jviEWQF2yCV1t3rP3ySZ4V8j+f c4BQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xmwQJ59ebHjR9ouwlTnSfL4Ky/fRkTGEraev7ufNxkA=; b=sC8i7JHrCRCT2VK/8OVWcPSrAktHQ4kflnf/Eg9O0aYQRA2PdnSFVD4OzpOuXKP4VK /NSowIbXQ2IfH1IN89UAE9aX5hB+84EBLOOyZff7PJPzIw5dN5k5uO6AWuvuZ/IR0a55 vH+nmzB5o3OJw9MuMjCvK/4FSj9BZz+jbzgijC38N9vvg7Wx9gcb9cXagXbRzitlxxKW zxt63y8D04a3H5HsKUi+0ZSiiDahNwEoJmkCZxwdocalHsLgRT24FmmnBhdWHoJ5kvY0 WkjD26iHG0ihwbweyQJRropSfyA86sp1J+aw+C8McrmT5Yq5vqLtdg3ezGEykXjWtklQ nl7Q== X-Gm-Message-State: AGi0PuYo/nkcbCV9ZAtwH2XnQHzXibJyb4DH6ibVk3UJcni/XZcTmi45 zwpzDWxp3EpsbSTC1vG2SqkMQtrT6FIJKQ== X-Google-Smtp-Source: APiQypJXLgCp8D34gCB1ADz+2Pz+OnKYSOb3Y27CEEQR36qEs+CfGyUUHJc3coMteXhQBUtCWZL7yg== X-Received: by 2002:a05:6000:1146:: with SMTP id d6mr7078593wrx.289.1588595594518; Mon, 04 May 2020 05:33:14 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 02/39] hw/arm/mps2-tz: Use TYPE_IOTKIT instead of hardcoded string Date: Mon, 4 May 2020 13:32:32 +0100 Message-Id: <20200504123309.3808-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 By using the TYPE_* definitions for devices, we can: - quickly find where devices are used with 'git-grep' - easily rename a device (one-line change). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200428154650.21991-1-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/mps2-tz.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index a8dea7dde1c..2c43041564c 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -395,7 +395,7 @@ static void mps2tz_common_init(MachineState *machine) exit(EXIT_FAILURE); } =20 - sysbus_init_child_obj(OBJECT(machine), "iotkit", &mms->iotkit, + sysbus_init_child_obj(OBJECT(machine), TYPE_IOTKIT, &mms->iotkit, sizeof(mms->iotkit), mmc->armsse_type); iotkitdev =3D DEVICE(&mms->iotkit); object_property_set_link(OBJECT(&mms->iotkit), OBJECT(system_memory), --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588595662; cv=none; d=zohomail.com; s=zohoarc; b=Wcn0SZvKKVwKAHdldACES80pzx3vy6W6NPdfJIN+ARMFGgTccc1sbvOQMxrTmDlKElgg9+gmdp2pE59TvgnXwIv6NPcOHbD74Ra9jRLqJPQHTpwjYuVrMc06ZwSWhGuQVVDx7MGqKQ9Exjn9XHlwh2Y7kYaXpKJDEvafuwOENvU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588595662; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=UVhhXcdxrGLYsLe+7//SNheQ2AAv7+PIw7zV3mc83cI=; b=ZsMibjmBiZl4hdfi2qMbVwphA4gjwP1u3gFQWgEyqHshUz7pl13DM9FqR8sru1i5GIr93TSFgiBhSBCW+fN6Xa93MlOYVgTPAqLfaSyT9QTHtbvwpCr5tpwv9PFmRBm/fosNu97yMM90e+ZEHWqvlkvEP4ISi9USUtEwF4ew9+M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588595662322992.0122672324408; Mon, 4 May 2020 05:34:22 -0700 (PDT) Received: from localhost ([::1]:36622 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaIe-0001e0-W8 for importer@patchew.org; Mon, 04 May 2020 08:34:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56382) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHf-0008Fn-C7 for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:19 -0400 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]:50424) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHd-0000jK-QS for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:19 -0400 Received: by mail-wm1-x329.google.com with SMTP id x25so8239146wmc.0 for ; Mon, 04 May 2020 05:33:17 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.14 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=UVhhXcdxrGLYsLe+7//SNheQ2AAv7+PIw7zV3mc83cI=; b=FFuOAsvJqrEfDWjW/CObHYSJ0S1q9ld+nfC0vY+fXaxtaKLqlsUd8OG5WatLSld9Wy wQRhkUj6DCkEipEsDHIIlV4+wEtKlLdR3EREqnCmLKjLDDG46zp+7Md88RguPijYLhPu b/ew5op8zPg4kX7NSaCQiSOF7pT0Y5wa/Ju5G/FTLhg6xFrMVJ1B0ByWe43IlomqYiI0 TAfQX6uZDAKuSfeH+muKriggmUuPlSM7c9ojE10fGVtPl1vt60tmvFGbDGoTbh5bm04M Jr5Ur6ke06+saxyKagTD8RBwwEjBtwFerxXe50nQH2m5sestKkuwR8WUSVp3AYoWWF6F phYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UVhhXcdxrGLYsLe+7//SNheQ2AAv7+PIw7zV3mc83cI=; b=aX2f0fB5275rE88usAK6yn+Q27yQOX7lz0vReasw7QpWRfcGYTX24jd3I6AYzmfX3g c0HrmEV1pye5W2fsAXhq/PoHHKvwy30/uMdWaS9DdVfAo3SwAyQwSqlkmiRm4XcZ5i7C kIFz6kpFAxsijsjbUDd6rATIkGV5WoWKP1oSW3hnrLNun+X0jhCT4Wio3dh5ANADIxit /6q37OaxNsOMfrtwTJJ4jT2eMRivOjwS/KutHWILxFnt6i3aKcIqB4wHOYCFV+QQNnvS WvHbKYwDKh7kWxA056j7ZiEjOvb1PstkiT3HJF8Hqu4E91Awn9+1ELs07idwGbP/YfTc 7V9Q== X-Gm-Message-State: AGi0Pua3cYtrgKkCkhKKghF8SKZcmGl76S5arftPzOLhp66JGZTiYaky L9RE2v7gXjP6KjiUVaU415TVr9F6RlYgCw== X-Google-Smtp-Source: APiQypLMNEigRv42F7iMdYQUG2a2qjd438IQC+/U8qI34c+G8AriIz7i1b0kn6tXLW0wA8wpygS/jg== X-Received: by 2002:a05:600c:2c04:: with SMTP id q4mr13835079wmg.7.1588595595680; Mon, 04 May 2020 05:33:15 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 03/39] target/arm: Don't use a TLB for ARMMMUIdx_Stage2 Date: Mon, 4 May 2020 13:32:33 +0100 Message-Id: <20200504123309.3808-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" We define ARMMMUIdx_Stage2 as being an MMU index which uses a QEMU TLB. However we never actually use the TLB -- all stage 2 lookups are done by direct calls to get_phys_addr_lpae() followed by a physical address load via address_space_ld*(). Remove Stage2 from the list of ARM MMU indexes which correspond to real core MMU indexes, and instead put it in the set of "NOTLB" ARM MMU indexes. This allows us to drop NB_MMU_MODES to 11. It also means we can safely add support for the ARMv8.3-TTS2UXN extension, which adds permission bits to the stage 2 descriptors which define execute permission separatel for EL0 and EL1; supporting that while keeping Stage2 in a QEMU TLB would require us to use separate TLBs for "Stage2 for an EL0 access" and "Stage2 for an EL1 access", which is a lot of extra complication given we aren't even using the QEMU TLB. In the process of updating the comment on our MMU index use, fix a couple of other minor errors: * NS EL2 EL2&0 was missing from the list in the comment * some text hadn't been updated from when we bumped NB_MMU_MODES above 8 Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Reviewed-by: Richard Henderson Message-id: 20200330210400.11724-2-peter.maydell@linaro.org --- target/arm/cpu-param.h | 2 +- target/arm/cpu.h | 21 +++++--- target/arm/helper.c | 112 ++++------------------------------------- 3 files changed, 27 insertions(+), 108 deletions(-) diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index d593b60b28d..6321385b469 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -29,6 +29,6 @@ # define TARGET_PAGE_BITS_MIN 10 #endif =20 -#define NB_MMU_MODES 12 +#define NB_MMU_MODES 11 =20 #endif diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 8b9f2961ba0..fe03a74bf08 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2801,6 +2801,9 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_syn= c); * handling via the TLB. The only way to do a stage 1 translation with= out * the immediate stage 2 translation is via the ATS or AT system insns, * which can be slow-pathed and always do a page table walk. + * The only use of stage 2 translations is either as part of an s1+2 + * lookup or when loading the descriptors during a stage 1 page table = walk, + * and in both those cases we don't use the TLB. * 4. we can also safely fold together the "32 bit EL3" and "64 bit EL3" * translation regimes, because they map reasonably well to each other * and they can't both be active at the same time. @@ -2816,15 +2819,15 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_s= ync); * NS EL1 EL1&0 stage 1+2 (aka NS PL1) * NS EL1 EL1&0 stage 1+2 +PAN * NS EL0 EL2&0 + * NS EL2 EL2&0 * NS EL2 EL2&0 +PAN * NS EL2 (aka NS PL2) * S EL0 EL1&0 (aka S PL0) * S EL1 EL1&0 (not used if EL3 is 32 bit) * S EL1 EL1&0 +PAN * S EL3 (aka S PL1) - * NS EL1&0 stage 2 * - * for a total of 12 different mmu_idx. + * for a total of 11 different mmu_idx. * * R profile CPUs have an MPU, but can use the same set of MMU indexes * as A profile. They only need to distinguish NS EL0 and NS EL1 (and @@ -2846,7 +2849,8 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_syn= c); * are not quite the same -- different CPU types (most notably M profile * vs A/R profile) would like to use MMU indexes with different semantics, * but since we don't ever need to use all of those in a single CPU we - * can avoid setting NB_MMU_MODES to more than 8. The lower bits of + * can avoid having to set NB_MMU_MODES to "total number of A profile MMU + * modes + total number of M profile MMU modes". The lower bits of * ARMMMUIdx are the core TLB mmu index, and the higher bits are always * the same for any particular CPU. * Variables of type ARMMUIdx are always full values, and the core @@ -2894,8 +2898,6 @@ typedef enum ARMMMUIdx { ARMMMUIdx_SE10_1_PAN =3D 9 | ARM_MMU_IDX_A, ARMMMUIdx_SE3 =3D 10 | ARM_MMU_IDX_A, =20 - ARMMMUIdx_Stage2 =3D 11 | ARM_MMU_IDX_A, - /* * These are not allocated TLBs and are used only for AT system * instructions or for the first stage of an S12 page table walk. @@ -2903,6 +2905,14 @@ typedef enum ARMMMUIdx { ARMMMUIdx_Stage1_E0 =3D 0 | ARM_MMU_IDX_NOTLB, ARMMMUIdx_Stage1_E1 =3D 1 | ARM_MMU_IDX_NOTLB, ARMMMUIdx_Stage1_E1_PAN =3D 2 | ARM_MMU_IDX_NOTLB, + /* + * Not allocated a TLB: used only for second stage of an S12 page + * table walk, or for descriptor loads during first stage of an S1 + * page table walk. Note that if we ever want to have a TLB for this + * then various TLB flush insns which currently are no-ops or flush + * only stage 1 MMU indexes will need to change to flush stage 2. + */ + ARMMMUIdx_Stage2 =3D 3 | ARM_MMU_IDX_NOTLB, =20 /* * M-profile. @@ -2936,7 +2946,6 @@ typedef enum ARMMMUIdxBit { TO_CORE_BIT(SE10_1), TO_CORE_BIT(SE10_1_PAN), TO_CORE_BIT(SE3), - TO_CORE_BIT(Stage2), =20 TO_CORE_BIT(MUser), TO_CORE_BIT(MPriv), diff --git a/target/arm/helper.c b/target/arm/helper.c index dfefb9b3d9b..f785e012cde 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -814,8 +814,7 @@ static void tlbiall_nsnh_write(CPUARMState *env, const = ARMCPRegInfo *ri, tlb_flush_by_mmuidx(cs, ARMMMUIdxBit_E10_1 | ARMMMUIdxBit_E10_1_PAN | - ARMMMUIdxBit_E10_0 | - ARMMMUIdxBit_Stage2); + ARMMMUIdxBit_E10_0); } =20 static void tlbiall_nsnh_is_write(CPUARMState *env, const ARMCPRegInfo *ri, @@ -826,46 +825,9 @@ static void tlbiall_nsnh_is_write(CPUARMState *env, co= nst ARMCPRegInfo *ri, tlb_flush_by_mmuidx_all_cpus_synced(cs, ARMMMUIdxBit_E10_1 | ARMMMUIdxBit_E10_1_PAN | - ARMMMUIdxBit_E10_0 | - ARMMMUIdxBit_Stage2); + ARMMMUIdxBit_E10_0); } =20 -static void tlbiipas2_write(CPUARMState *env, const ARMCPRegInfo *ri, - uint64_t value) -{ - /* Invalidate by IPA. This has to invalidate any structures that - * contain only stage 2 translation information, but does not need - * to apply to structures that contain combined stage 1 and stage 2 - * translation information. - * This must NOP if EL2 isn't implemented or SCR_EL3.NS is zero. - */ - CPUState *cs =3D env_cpu(env); - uint64_t pageaddr; - - if (!arm_feature(env, ARM_FEATURE_EL2) || !(env->cp15.scr_el3 & SCR_NS= )) { - return; - } - - pageaddr =3D sextract64(value << 12, 0, 40); - - tlb_flush_page_by_mmuidx(cs, pageaddr, ARMMMUIdxBit_Stage2); -} - -static void tlbiipas2_is_write(CPUARMState *env, const ARMCPRegInfo *ri, - uint64_t value) -{ - CPUState *cs =3D env_cpu(env); - uint64_t pageaddr; - - if (!arm_feature(env, ARM_FEATURE_EL2) || !(env->cp15.scr_el3 & SCR_NS= )) { - return; - } - - pageaddr =3D sextract64(value << 12, 0, 40); - - tlb_flush_page_by_mmuidx_all_cpus_synced(cs, pageaddr, - ARMMMUIdxBit_Stage2); -} =20 static void tlbiall_hyp_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) @@ -4055,8 +4017,7 @@ static void vttbr_write(CPUARMState *env, const ARMCP= RegInfo *ri, tlb_flush_by_mmuidx(cs, ARMMMUIdxBit_E10_1 | ARMMMUIdxBit_E10_1_PAN | - ARMMMUIdxBit_E10_0 | - ARMMMUIdxBit_Stage2); + ARMMMUIdxBit_E10_0); raw_write(env, ri, value); } } @@ -4538,11 +4499,6 @@ static int alle1_tlbmask(CPUARMState *env) return ARMMMUIdxBit_SE10_1 | ARMMMUIdxBit_SE10_1_PAN | ARMMMUIdxBit_SE10_0; - } else if (arm_feature(env, ARM_FEATURE_EL2)) { - return ARMMMUIdxBit_E10_1 | - ARMMMUIdxBit_E10_1_PAN | - ARMMMUIdxBit_E10_0 | - ARMMMUIdxBit_Stage2; } else { return ARMMMUIdxBit_E10_1 | ARMMMUIdxBit_E10_1_PAN | @@ -4689,44 +4645,6 @@ static void tlbi_aa64_vae3is_write(CPUARMState *env,= const ARMCPRegInfo *ri, ARMMMUIdxBit_SE3); } =20 -static void tlbi_aa64_ipas2e1_write(CPUARMState *env, const ARMCPRegInfo *= ri, - uint64_t value) -{ - /* Invalidate by IPA. This has to invalidate any structures that - * contain only stage 2 translation information, but does not need - * to apply to structures that contain combined stage 1 and stage 2 - * translation information. - * This must NOP if EL2 isn't implemented or SCR_EL3.NS is zero. - */ - ARMCPU *cpu =3D env_archcpu(env); - CPUState *cs =3D CPU(cpu); - uint64_t pageaddr; - - if (!arm_feature(env, ARM_FEATURE_EL2) || !(env->cp15.scr_el3 & SCR_NS= )) { - return; - } - - pageaddr =3D sextract64(value << 12, 0, 48); - - tlb_flush_page_by_mmuidx(cs, pageaddr, ARMMMUIdxBit_Stage2); -} - -static void tlbi_aa64_ipas2e1is_write(CPUARMState *env, const ARMCPRegInfo= *ri, - uint64_t value) -{ - CPUState *cs =3D env_cpu(env); - uint64_t pageaddr; - - if (!arm_feature(env, ARM_FEATURE_EL2) || !(env->cp15.scr_el3 & SCR_NS= )) { - return; - } - - pageaddr =3D sextract64(value << 12, 0, 48); - - tlb_flush_page_by_mmuidx_all_cpus_synced(cs, pageaddr, - ARMMMUIdxBit_Stage2); -} - static CPAccessResult aa64_zva_access(CPUARMState *env, const ARMCPRegInfo= *ri, bool isread) { @@ -4965,12 +4883,10 @@ static const ARMCPRegInfo v8_cp_reginfo[] =3D { .writefn =3D tlbi_aa64_vae1_write }, { .name =3D "TLBI_IPAS2E1IS", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 1, .opc1 =3D 4, .crn =3D 8, .crm =3D 0, .opc2 =3D 1, - .access =3D PL2_W, .type =3D ARM_CP_NO_RAW, - .writefn =3D tlbi_aa64_ipas2e1is_write }, + .access =3D PL2_W, .type =3D ARM_CP_NOP }, { .name =3D "TLBI_IPAS2LE1IS", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 1, .opc1 =3D 4, .crn =3D 8, .crm =3D 0, .opc2 =3D 5, - .access =3D PL2_W, .type =3D ARM_CP_NO_RAW, - .writefn =3D tlbi_aa64_ipas2e1is_write }, + .access =3D PL2_W, .type =3D ARM_CP_NOP }, { .name =3D "TLBI_ALLE1IS", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 1, .opc1 =3D 4, .crn =3D 8, .crm =3D 3, .opc2 =3D 4, .access =3D PL2_W, .type =3D ARM_CP_NO_RAW, @@ -4981,12 +4897,10 @@ static const ARMCPRegInfo v8_cp_reginfo[] =3D { .writefn =3D tlbi_aa64_alle1is_write }, { .name =3D "TLBI_IPAS2E1", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 1, .opc1 =3D 4, .crn =3D 8, .crm =3D 4, .opc2 =3D 1, - .access =3D PL2_W, .type =3D ARM_CP_NO_RAW, - .writefn =3D tlbi_aa64_ipas2e1_write }, + .access =3D PL2_W, .type =3D ARM_CP_NOP }, { .name =3D "TLBI_IPAS2LE1", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 1, .opc1 =3D 4, .crn =3D 8, .crm =3D 4, .opc2 =3D 5, - .access =3D PL2_W, .type =3D ARM_CP_NO_RAW, - .writefn =3D tlbi_aa64_ipas2e1_write }, + .access =3D PL2_W, .type =3D ARM_CP_NOP }, { .name =3D "TLBI_ALLE1", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 1, .opc1 =3D 4, .crn =3D 8, .crm =3D 7, .opc2 =3D 4, .access =3D PL2_W, .type =3D ARM_CP_NO_RAW, @@ -5067,20 +4981,16 @@ static const ARMCPRegInfo v8_cp_reginfo[] =3D { .writefn =3D tlbimva_hyp_is_write }, { .name =3D "TLBIIPAS2", .cp =3D 15, .opc1 =3D 4, .crn =3D 8, .crm =3D 4, .opc2 =3D 1, - .type =3D ARM_CP_NO_RAW, .access =3D PL2_W, - .writefn =3D tlbiipas2_write }, + .type =3D ARM_CP_NOP, .access =3D PL2_W }, { .name =3D "TLBIIPAS2IS", .cp =3D 15, .opc1 =3D 4, .crn =3D 8, .crm =3D 0, .opc2 =3D 1, - .type =3D ARM_CP_NO_RAW, .access =3D PL2_W, - .writefn =3D tlbiipas2_is_write }, + .type =3D ARM_CP_NOP, .access =3D PL2_W }, { .name =3D "TLBIIPAS2L", .cp =3D 15, .opc1 =3D 4, .crn =3D 8, .crm =3D 4, .opc2 =3D 5, - .type =3D ARM_CP_NO_RAW, .access =3D PL2_W, - .writefn =3D tlbiipas2_write }, + .type =3D ARM_CP_NOP, .access =3D PL2_W }, { .name =3D "TLBIIPAS2LIS", .cp =3D 15, .opc1 =3D 4, .crn =3D 8, .crm =3D 0, .opc2 =3D 5, - .type =3D ARM_CP_NO_RAW, .access =3D PL2_W, - .writefn =3D tlbiipas2_is_write }, + .type =3D ARM_CP_NOP, .access =3D PL2_W }, /* 32 bit cache operations */ { .name =3D "ICIALLUIS", .cp =3D 15, .opc1 =3D 0, .crn =3D 7, .crm =3D= 1, .opc2 =3D 0, .type =3D ARM_CP_NOP, .access =3D PL1_W, .accessfn =3D aa64_cacheop_= pou_access }, --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=SAclrjD7SOitws2kvsSrHFg+/NkOvMynkRjg1fJ44t4=; b=lSIh2YkES7Tjad8wSCzD08Wh3D7ZSQDHUGEn/0/YgmteKbFhzy5cjBvWlHpSRJtxLG 3c5pKnohdxKIKeDFmyIHL6cvYKazUOAOQ7QqmIrqygxRCBm/O32TpRYP4E0UD+glgg0K 0WMUjle+C/FEHPRu+nUXS22PVOc3qGeb8jh4YgPDPcxk7MZIxa3g5nzRZhmql461ckOc EdOW1r43L38UrtK017CHHgx01orYKdo2GH2riaffdcKmfpMZRq2p5CSqCB6Q8tuIh2C4 Pj9Um+2jxMTdEg75jvS2FueOcSylmfrstgty6lHiWsDaZjt/4SubjOQCLomES42EHdZH Asqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SAclrjD7SOitws2kvsSrHFg+/NkOvMynkRjg1fJ44t4=; b=azSPikVshbK4b4Cdp2lsYrzMO+JhhFG4RuFM2EtXK3nGD1EicY93CnxyNQc5WKpR5y WpOAQ52CPYyE9fN3bjLWo63mRQKMBN02wssSt18enFbi5d9hFilYSXwm/Z+yaDwNLyEb SQz3K1Pai0VB1iAcWUFQgadR5kJLtIpnnv4HbYBLL7QWjD5gBJW1DI9KkP6FsLUM/ix3 VNS9RXp1G5B+o4kEWRidNApHcvZy/kYJmBW8nd6HhkpJorMhfsgBoEZ7KQ0RKPaX89bC KaBIsHbK86nwOLc0Ffs8mmErZwC6ZToFTHc2oi5QQYzJxpHwaWqXVYuS62uae14qCwUs YLlg== X-Gm-Message-State: AGi0PuaBbBw3QoyHUUiHsf8Y3boohxSU6aBFuKCwGD5uesVGMP15Y+C0 zoshhaDuRX4sOIQZkdh9dSV3RM19BADeTw== X-Google-Smtp-Source: APiQypLQSx/m6ioaRhNNweRjciS+tS4cf1Y/PJzmyUqZ8C2FskcRHmJJalAKIVPb8mwYJ2fgkmMxHQ== X-Received: by 2002:a1c:9a16:: with SMTP id c22mr13926654wme.38.1588595596534; Mon, 04 May 2020 05:33:16 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 04/39] target/arm: Use enum constant in get_phys_addr_lpae() call Date: Mon, 4 May 2020 13:32:34 +0100 Message-Id: <20200504123309.3808-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The access_type argument to get_phys_addr_lpae() is an MMUAccessType; use the enum constant MMU_DATA_LOAD rather than a literal 0 when we call it in S1_ptw_translate(). Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Reviewed-by: Richard Henderson Message-id: 20200330210400.11724-3-peter.maydell@linaro.org --- target/arm/helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index f785e012cde..f17841ec24e 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10052,8 +10052,9 @@ static hwaddr S1_ptw_translate(CPUARMState *env, AR= MMMUIdx mmu_idx, pcacheattrs =3D &cacheattrs; } =20 - ret =3D get_phys_addr_lpae(env, addr, 0, ARMMMUIdx_Stage2, &s2pa, - &txattrs, &s2prot, &s2size, fi, pcacheatt= rs); + ret =3D get_phys_addr_lpae(env, addr, MMU_DATA_LOAD, ARMMMUIdx_Sta= ge2, + &s2pa, &txattrs, &s2prot, &s2size, fi, + pcacheattrs); if (ret) { assert(fi->type !=3D ARMFault_None); fi->s2addr =3D addr; --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588595874; cv=none; d=zohomail.com; s=zohoarc; b=TFeGKHu6r3XjdmrZbpGjnZFwOeJ/4ET2wntdHWjNz76L4xmTkM90t+rkuWRFTIaScAFOwUR7YKoodJa0r2xfZoiW0FJIMmpU7AfmkRYxdjQ+VH2BELmGrYzbLtIo3x3Yr+LYvzuISUJJvdyDhP1FpcPQF6CRxWI5DQQxKNfSHkg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588595874; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=TMW8YHXkbMkDDM0tj/I4/jG2iVg72cOVyZkRU2LK7Xk=; b=ejzzRpbKF2g8G3OSwUVKuFEfuo73IqdsUc3+Z1JBuyVWEYhAx9KhpAd/qD6sNHwwLLUGa18ZsGfn95fXE5oJwQtdTCeHZB57bLalmL6jDyUwP7sUM9KQeqJ1N7hVXr7lOdsGlm0S2mad3pe7cUIXPReszFFId2VzG2wTgLTxWQ0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588595874409614.7998023609154; Mon, 4 May 2020 05:37:54 -0700 (PDT) Received: from localhost ([::1]:52944 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaM4-0000DB-S9 for importer@patchew.org; Mon, 04 May 2020 08:37:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56388) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHg-0008GS-8H for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:20 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:56267) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHf-0000k4-9w for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:19 -0400 Received: by mail-wm1-x332.google.com with SMTP id e26so8234134wmk.5 for ; Mon, 04 May 2020 05:33:18 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=TMW8YHXkbMkDDM0tj/I4/jG2iVg72cOVyZkRU2LK7Xk=; b=dZTuk860fKQZ45kXm5FY2b/0nD/Ul8E/DWwdcbFYZsGM/WeloTCVq6C4soehHSUh46 cQODeNR1y/HmXpCmvxF7AeAjBmL/CxG4rLYgacz7ICu+IWzkCYFp2RS5jxj0haTV37gq TvMrIAAsC+g6xUhl5+ULZvxjFtOUjnUiXr8rFds345tUCX32bGWMMwL8M13MGVU5WYxc NEfnjShehxZlPhwexiKn8MqpEFj96jhG24xuj+Ht0WXuhAtOvcc8LRz/+0absVUnn5M8 /Tvc94ImOiUVzV9k0lC85bYsMY3QMSeopcKfmFVK5q2+It3U4c1s/vwB25e7872/9vyK YvwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TMW8YHXkbMkDDM0tj/I4/jG2iVg72cOVyZkRU2LK7Xk=; b=aIN7wbm/6NmiNLlq7CfttFrvMBFUD2olchYPFI7T+x1O3Z9GVfA6e+LANRwt0Z7xly YOVzptpOhYzQm3hZz8lGOU8+4qSZbTLHqLG0oSrUy/tGH7NPhPJwY3qDBq/P3uIUwsIh 4jybFtkAJecm6BilecXT8DsBwA5ccCGxjRSR/YHkIoVZUhdpzBTrxDyCKOah8UZSDXXH TOLYOwldwUhR0UKUtM263dkurHDdc9QouYvu7IK/isBKOpX5uYR5ZN/xfQf1Tjoz0QT+ +MIugMY8aOn/xm9elLFgSfUULlqpkQemgz0CxNFEcTPoLXhqtHTBczkH2+nYRMzfFktz Pu1g== X-Gm-Message-State: AGi0PubyxRNrxcFVtxr3zY7NDVq/4K2wl6rzeJ2932mzGMTRG9JXReet zKLSnf3t9H5c03Z1zDDOdbzYx+zjvxc3rg== X-Google-Smtp-Source: APiQypLh4SvZTjBiNFH0oJLvI+EDMxSufZ3i1IQmGbGV8xn28UsmIhEX2vzSkOyDbRWa33eNODqipw== X-Received: by 2002:a05:600c:1:: with SMTP id g1mr14143378wmc.142.1588595597558; Mon, 04 May 2020 05:33:17 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 05/39] target/arm: Add new 's1_is_el0' argument to get_phys_addr_lpae() Date: Mon, 4 May 2020 13:32:35 +0100 Message-Id: <20200504123309.3808-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" For ARMv8.2-TTS2UXN, the stage 2 page table walk wants to know whether the stage 1 access is for EL0 or not, because whether exec permission is given can depend on whether this is an EL0 or EL1 access. Add a new argument to get_phys_addr_lpae() so the call sites can pass this information in. Since get_phys_addr_lpae() doesn't already have a doc comment, add one so we have a place to put the documentation of the semantics of the new s1_is_el0 argument. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Reviewed-by: Richard Henderson Message-id: 20200330210400.11724-4-peter.maydell@linaro.org --- target/arm/helper.c | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index f17841ec24e..b26f5801943 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -41,6 +41,7 @@ =20 static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, MMUAccessType access_type, ARMMMUIdx mmu_id= x, + bool s1_is_el0, hwaddr *phys_ptr, MemTxAttrs *txattrs, int = *prot, target_ulong *page_size_ptr, ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheat= trs); @@ -10053,6 +10054,7 @@ static hwaddr S1_ptw_translate(CPUARMState *env, AR= MMMUIdx mmu_idx, } =20 ret =3D get_phys_addr_lpae(env, addr, MMU_DATA_LOAD, ARMMMUIdx_Sta= ge2, + false, &s2pa, &txattrs, &s2prot, &s2size, fi, pcacheattrs); if (ret) { @@ -10655,8 +10657,32 @@ static ARMVAParameters aa32_va_parameters(CPUARMSt= ate *env, uint32_t va, }; } =20 +/** + * get_phys_addr_lpae: perform one stage of page table walk, LPAE format + * + * Returns false if the translation was successful. Otherwise, phys_ptr, a= ttrs, + * prot and page_size may not be filled in, and the populated fsr value pr= ovides + * information on why the translation aborted, in the format of a long-for= mat + * DFSR/IFSR fault register, with the following caveats: + * * the WnR bit is never set (the caller must do this). + * + * @env: CPUARMState + * @address: virtual address to get physical address for + * @access_type: MMU_DATA_LOAD, MMU_DATA_STORE or MMU_INST_FETCH + * @mmu_idx: MMU index indicating required translation regime + * @s1_is_el0: if @mmu_idx is ARMMMUIdx_Stage2 (so this is a stage 2 page = table + * walk), must be true if this is stage 2 of a stage 1+2 walk = for an + * EL0 access). If @mmu_idx is anything else, @s1_is_el0 is ig= nored. + * @phys_ptr: set to the physical address corresponding to the virtual add= ress + * @attrs: set to the memory transaction attributes to use + * @prot: set to the permissions for the page containing phys_ptr + * @page_size_ptr: set to the size of the page containing phys_ptr + * @fi: set to fault info if the translation fails + * @cacheattrs: (if non-NULL) set to the cacheability/shareability attribu= tes + */ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, MMUAccessType access_type, ARMMMUIdx mmu_id= x, + bool s1_is_el0, hwaddr *phys_ptr, MemTxAttrs *txattrs, int = *prot, target_ulong *page_size_ptr, ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheat= trs) @@ -11748,6 +11774,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong a= ddress, =20 /* S1 is done. Now do S2 translation. */ ret =3D get_phys_addr_lpae(env, ipa, access_type, ARMMMUIdx_St= age2, + mmu_idx =3D=3D ARMMMUIdx_E10_0, phys_ptr, attrs, &s2_prot, page_size, fi, cacheattrs !=3D NULL ? &cacheattrs2 := NULL); @@ -11872,7 +11899,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong a= ddress, } =20 if (regime_using_lpae_format(env, mmu_idx)) { - return get_phys_addr_lpae(env, address, access_type, mmu_idx, + return get_phys_addr_lpae(env, address, access_type, mmu_idx, fals= e, phys_ptr, attrs, prot, page_size, fi, cacheattrs); } else if (regime_sctlr(env, mmu_idx) & SCTLR_XP) { --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588595785; cv=none; d=zohomail.com; s=zohoarc; b=P7mkMZBcCRVRN88EcXNjTCvhAF9yoyiTlu6ZxA+1X6Tvanz3GW/ck62Oz+bud1xjpTkdSZ/n+bTrnw+ctB3R/uOC92nvzppczOFTIIZJhhcpDDbAM9wCQaK4qDF1CKcWo2evXw1qsDogyhQPvy8u9MUuaVkhIE0bF0YOaa6fGfs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588595785; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=QEJ0w710SIt08fa3FWIfG3Dv/CaK6JOkbM4j68/oS7U=; b=UZKU2eRSDNQOAp8DevzfaWfvhnfuwQ8OFSCoMZTskwUlh1RwrZOUKoKemSdJpvMeoaZlKJikIFUDwNBqWoEPfCMKVZcgpO8WTelon5Zp7lfmorjYeIz0h4Rg7ip1PfY7OXYSp010jHbnSHzG8DP58GvuKmrnP8Jz+fKixF9+x/c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588595785003790.5893626502437; Mon, 4 May 2020 05:36:25 -0700 (PDT) Received: from localhost ([::1]:45036 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaKd-0005Kx-NS for importer@patchew.org; Mon, 04 May 2020 08:36:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56404) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHh-0008HX-Tj for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:21 -0400 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:51041) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHg-0000mB-Eg for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:21 -0400 Received: by mail-wm1-x341.google.com with SMTP id x25so8239338wmc.0 for ; Mon, 04 May 2020 05:33:20 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=QEJ0w710SIt08fa3FWIfG3Dv/CaK6JOkbM4j68/oS7U=; b=StccK8ZSLV0TOx2OSw0UfbVy+meHcbMH9RTrQlJBnd++7BQEKG/83WNow4oViSshmc HIuga8oBekmBo7wsS3WauOXWgQRVJPO8Ftq3/mb14BsblrsO5NBftaXEigQsfXD/omi2 e9ohoUjEe+zrPx93I2Uq4Wh9ZkBFhMV++avOyB7OuygV1C3cUTKx+AN1xhaOg2Qh/3Ns JzpJZKkOuQr1E0LjPiXsACB+J9hW+RXP+/3HSycC67r4ub3kOZmHiqh5kCNB9rCzUiJb eYXl91bsdpYKMcoatsuIA/zouK6YjQe7Sk3mW4ZgHJmjT60Vttqk+6Y4WuDW5EINZ+9w 0zzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QEJ0w710SIt08fa3FWIfG3Dv/CaK6JOkbM4j68/oS7U=; b=ODm1KBoc80YiyIAVk9Gpkpi4fTmfW+0O2vx1ieRwUEgeDpLlMjO9V4mOsmnJgrt/7I tMSDd7G9SI+W8JiVuMHpyxDoIkEvkKTyPIDSNhdsu9huCuDuMedybmkU7aqpWDsWeLxG TnigrDCXuFsSKJtSJb3BbXA0CLW22bXE435eOrX+BQAcPKzN72n0fGBWtc6zDZjXiJbc gJEisEO7lmaJJs9CRiUePc54tWBqsN1kiDbktNy0nV2llpJZO3Dfs+/Md7FLZPFKIvsT Ncfqq8/WPDlxdJotLj8zkUtBtsK1Nu1b74NPNZr+Sot6UvA843B8swRac37LrJnhd08v Aprg== X-Gm-Message-State: AGi0PubGCm14228/RYpuFNOC7bq9rpNXoymKTzkIE9roJCd/u60THndo 6qDJkYqHoErqppdYTr+SZpoK/pZZLGl79A== X-Google-Smtp-Source: APiQypI2ewI8QW8yD0/G6x2UUI4RKW7kmN9CQDdP5XUIbhIAYGAylAKTmhUristag0hQpgouADLCBw== X-Received: by 2002:a1c:2dc7:: with SMTP id t190mr13777234wmt.129.1588595598688; Mon, 04 May 2020 05:33:18 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 06/39] target/arm: Implement ARMv8.2-TTS2UXN Date: Mon, 4 May 2020 13:32:36 +0100 Message-Id: <20200504123309.3808-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::341; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x341.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The ARMv8.2-TTS2UXN feature extends the XN field in stage 2 translation table descriptors from just bit [54] to bits [54:53], allowing stage 2 to control execution permissions separately for EL0 and EL1. Implement the new semantics of the XN field and enable the feature for our 'max' CPU. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Reviewed-by: Richard Henderson Message-id: 20200330210400.11724-5-peter.maydell@linaro.org --- target/arm/cpu.h | 15 +++++++++++++++ target/arm/cpu.c | 1 + target/arm/cpu64.c | 2 ++ target/arm/helper.c | 37 +++++++++++++++++++++++++++++++------ 4 files changed, 49 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index fe03a74bf08..9aae324d0f6 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3610,6 +3610,11 @@ static inline bool isar_feature_aa32_ccidx(const ARM= ISARegisters *id) return FIELD_EX32(id->id_mmfr4, ID_MMFR4, CCIDX) !=3D 0; } =20 +static inline bool isar_feature_aa32_tts2uxn(const ARMISARegisters *id) +{ + return FIELD_EX32(id->id_mmfr4, ID_MMFR4, XNX) !=3D 0; +} + /* * 64-bit feature tests via id registers. */ @@ -3822,6 +3827,11 @@ static inline bool isar_feature_aa64_ccidx(const ARM= ISARegisters *id) return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, CCIDX) !=3D 0; } =20 +static inline bool isar_feature_aa64_tts2uxn(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, XNX) !=3D 0; +} + /* * Feature tests for "does this exist in either 32-bit or 64-bit?" */ @@ -3850,6 +3860,11 @@ static inline bool isar_feature_any_ccidx(const ARMI= SARegisters *id) return isar_feature_aa64_ccidx(id) || isar_feature_aa32_ccidx(id); } =20 +static inline bool isar_feature_any_tts2uxn(const ARMISARegisters *id) +{ + return isar_feature_aa64_tts2uxn(id) || isar_feature_aa32_tts2uxn(id); +} + /* * Forward to the above feature tests given an ARMCPU pointer. */ diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 141d947775a..f588344df83 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2686,6 +2686,7 @@ static void arm_max_initfn(Object *obj) t =3D FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */ t =3D FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */ t =3D FIELD_DP32(t, ID_MMFR4, CNP, 1); /* TTCNP */ + t =3D FIELD_DP32(t, ID_MMFR4, XNX, 1); /* TTS2UXN */ cpu->isar.id_mmfr4 =3D t; } #endif diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 74afc28d537..e232c0ea12c 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -673,6 +673,7 @@ static void aarch64_max_initfn(Object *obj) t =3D FIELD_DP64(t, ID_AA64MMFR1, VH, 1); t =3D FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */ t =3D FIELD_DP64(t, ID_AA64MMFR1, VMIDBITS, 2); /* VMID16 */ + t =3D FIELD_DP64(t, ID_AA64MMFR1, XNX, 1); /* TTS2UXN */ cpu->isar.id_aa64mmfr1 =3D t; =20 t =3D cpu->isar.id_aa64mmfr2; @@ -706,6 +707,7 @@ static void aarch64_max_initfn(Object *obj) u =3D FIELD_DP32(u, ID_MMFR4, HPDS, 1); /* AA32HPD */ u =3D FIELD_DP32(u, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */ u =3D FIELD_DP32(u, ID_MMFR4, CNP, 1); /* TTCNP */ + u =3D FIELD_DP32(u, ID_MMFR4, XNX, 1); /* TTS2UXN */ cpu->isar.id_mmfr4 =3D u; =20 u =3D cpu->isar.id_aa64dfr0; diff --git a/target/arm/helper.c b/target/arm/helper.c index b26f5801943..a94f6507950 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9908,9 +9908,10 @@ simple_ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu= _idx, int ap) * * @env: CPUARMState * @s2ap: The 2-bit stage2 access permissions (S2AP) - * @xn: XN (execute-never) bit + * @xn: XN (execute-never) bits + * @s1_is_el0: true if this is S2 of an S1+2 walk for EL0 */ -static int get_S2prot(CPUARMState *env, int s2ap, int xn) +static int get_S2prot(CPUARMState *env, int s2ap, int xn, bool s1_is_el0) { int prot =3D 0; =20 @@ -9920,9 +9921,32 @@ static int get_S2prot(CPUARMState *env, int s2ap, in= t xn) if (s2ap & 2) { prot |=3D PAGE_WRITE; } - if (!xn) { - if (arm_el_is_aa64(env, 2) || prot & PAGE_READ) { + + if (cpu_isar_feature(any_tts2uxn, env_archcpu(env))) { + switch (xn) { + case 0: prot |=3D PAGE_EXEC; + break; + case 1: + if (s1_is_el0) { + prot |=3D PAGE_EXEC; + } + break; + case 2: + break; + case 3: + if (!s1_is_el0) { + prot |=3D PAGE_EXEC; + } + break; + default: + g_assert_not_reached(); + } + } else { + if (!extract32(xn, 1, 1)) { + if (arm_el_is_aa64(env, 2) || prot & PAGE_READ) { + prot |=3D PAGE_EXEC; + } } } return prot; @@ -10901,13 +10925,14 @@ static bool get_phys_addr_lpae(CPUARMState *env, = target_ulong address, } =20 ap =3D extract32(attrs, 4, 2); - xn =3D extract32(attrs, 12, 1); =20 if (mmu_idx =3D=3D ARMMMUIdx_Stage2) { ns =3D true; - *prot =3D get_S2prot(env, ap, xn); + xn =3D extract32(attrs, 11, 2); + *prot =3D get_S2prot(env, ap, xn, s1_is_el0); } else { ns =3D extract32(attrs, 3, 1); + xn =3D extract32(attrs, 12, 1); pxn =3D extract32(attrs, 11, 1); *prot =3D get_S1prot(env, mmu_idx, aarch64, ap, ns, xn, pxn); } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596014; cv=none; d=zohomail.com; s=zohoarc; b=DiZk4RPAV+mPDbGJd4jivrp0Ue6szsuKDww5lSXllaQ+nFJ28pwzg7TnCy7emj8eWnL9qYJksjnBtzynPMUHGdPpCHLAnXykYTLIiyA+HeVuxvMf4DaGsXgs685dg3qMoC1O4jnMcXd8tcj/pTDM0/zoIuz+zLzIZNCdw6m97/U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596014; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=LQncQVuc9PNxrpkqh3ABgysYVzrhk3KqSd8QlCpLW+s=; b=xry39U1UhQbES9/4j7X8IeN2FFv+CeANO85nnQGpgeYzIQ2TOoWnLQTLzhetXlsGdR qqQqDC/1XlDNJx7kCQRI0NuETIFh+einE4KccUN4o651KM3C7PWyYdbtCT7M9D+rFSR7 9e/80kcTMp8AQ5DjpwjN3lpHPFAbsVvYaiqdgbbFfLKOtu4ksXDhDfWYFn/jnY4MAmNx 8YkAt0kYv1krL9Ik24FwOql7XUFAB3OXiRaLr6JXKMrQl3DrC3LbtqpKCD9/oPqjbqNH gdg4mbvKbVAm8339KUYZUBYibUZx5rlGHE+8gL+u0g1WsseqUP9YtTh7bS32gE7hsQDQ +QQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LQncQVuc9PNxrpkqh3ABgysYVzrhk3KqSd8QlCpLW+s=; b=heBr76aFMFIj8xVvWj+4lexjD2d1DDZnGjpOcM4dPEp1Wbjk3KD9hN/M4OCt0pY2YC 4shoDhoxoYSwz7ctnR1r0iC2lzIpl0+y5INJ+NUc4c37SkGiMwAuCFGl2Tv2kelUyh4w 8Yn/YRpS6yOTz5nQg5ZlVjKtD6vZ6jORJozGLjJcpajlf7BgWvERUAuRQUm/K/tNuPP/ 0191xc8VzwNOrU1PRNCZzTX6F94K+eh6bLx34C+Idd7dF7dTpFKJM12ZWITtAbKLxmJF +mholR3SwmJSG9ys4q0mb1j7F3llijBbSStT3hD1UL/nnS1nk5ENEzIi2LAFxbDozFDy K+vw== X-Gm-Message-State: AGi0PuaADaEJN+OSNctL2qzAV4/YferxwMWdfj6SuHPuozw+3IGV01cR qiuUPnzkESV8CWD9cpI9vBKoBXVTbqzrpg== X-Google-Smtp-Source: APiQypKo71ywZOHFC0zdbI+T8n2MPN3dhD1bu6ZuzsRCIAzUE3btZV8Uk6Vc845w5Z5Go1oyz3PDVw== X-Received: by 2002:a1c:bc09:: with SMTP id m9mr13895725wmf.145.1588595599764; Mon, 04 May 2020 05:33:19 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 07/39] target/arm: Use correct variable for setting 'max' cpu's ID_AA64DFR0 Date: Mon, 4 May 2020 13:32:37 +0100 Message-Id: <20200504123309.3808-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) In aarch64_max_initfn() we update both 32-bit and 64-bit ID registers. The intended pattern is that for 64-bit ID registers we use FIELD_DP64 and the uint64_t 't' register, while 32-bit ID registers use FIELD_DP32 and the uint32_t 'u' register. For ID_AA64DFR0 we accidentally used 'u', meaning that the top 32 bits of this 64-bit ID register would end up always zero. Luckily at the moment that's what they should be anyway, so this bug has no visible effects. Use the right-sized variable. Fixes: 3bec78447a958d481991 Signed-off-by: Peter Maydell Reviewed-by: Laurent Desnogues Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200423110915.10527-1-peter.maydell@linaro.org --- target/arm/cpu64.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index e232c0ea12c..9bdf75b1abb 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -710,9 +710,9 @@ static void aarch64_max_initfn(Object *obj) u =3D FIELD_DP32(u, ID_MMFR4, XNX, 1); /* TTS2UXN */ cpu->isar.id_mmfr4 =3D u; =20 - u =3D cpu->isar.id_aa64dfr0; - u =3D FIELD_DP64(u, ID_AA64DFR0, PMUVER, 5); /* v8.4-PMU */ - cpu->isar.id_aa64dfr0 =3D u; + t =3D cpu->isar.id_aa64dfr0; + t =3D FIELD_DP64(t, ID_AA64DFR0, PMUVER, 5); /* v8.4-PMU */ + cpu->isar.id_aa64dfr0 =3D t; =20 u =3D cpu->isar.id_dfr0; u =3D FIELD_DP32(u, ID_DFR0, PERFMON, 5); /* v8.4-PMU */ --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588595887; cv=none; d=zohomail.com; s=zohoarc; b=luh6vyylKPNoPwNUgQaBidudoXSAKWNWmJd6nM54p8fyP7lKCXpnYarKyK+1sETbgUqDPUpdZY03e/UcNqSfCbaL/xe07u9eqibAv2RURGt0ahYme7oJX5mO/8lhcAi5wsupNmTdcffoqItUQdWliMNRodObM44uG8n0eiFpgTs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588595887; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=M3vgvadFWkC90M8EmTrfIPMjpAv4cjLc8OSWbkOS2EQ=; b=AUavYW/IH3VZ4eO2rlEglyofg9znH/HEwwXKSTXFwLXa8Z33YvBVo8FVpootW7mpB36nqwMS1eKF+O4UP7ZC/pRItw+m9xofcI+xrEOqwlQA+go5iEgdCPU/4NnmnrwVmFR6p96NIPkdbHpLlxrvrsb9ZQEFnAec/T9XzxNCtdA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588595887705296.9259729304357; Mon, 4 May 2020 05:38:07 -0700 (PDT) Received: from localhost ([::1]:53302 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaMI-0000MG-DF for importer@patchew.org; Mon, 04 May 2020 08:38:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56416) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHj-0008LM-Gw for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:23 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:37752) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHi-0000oy-GW for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:23 -0400 Received: by mail-wm1-x332.google.com with SMTP id z6so8835234wml.2 for ; Mon, 04 May 2020 05:33:22 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=M3vgvadFWkC90M8EmTrfIPMjpAv4cjLc8OSWbkOS2EQ=; b=BHaU1xmjxgoHhGCCPnt4qs4vycVBT1mZw3Fi3H2a+LvSATdoJkoETgm9cgL/mm/MfC /wKAa26QxgIEKsg9HNPnMmYfnVOntzVa1pVa/r1XA+/fjo4WK+9vI0tClvTnq1RvjD8u kN6xnOIanMxw959jJ5q0tj2JMLGZV10+WOg/1sfb458Lg4RE0faoMjyHY5rTuMbmkPLc jSDZlOdxwBG7uvNT2OaLegD6PgKWmWay3N+qJq6sp+J0BRpQVbwDouuHYk0JMydoftxY XK2fN45AsBmOUnVa0lC8RsB7PiYJEw8Mdgl3KQ+O9Cm4eS+jmY/TuCeSP7Bw4B/UJ+DV c/dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M3vgvadFWkC90M8EmTrfIPMjpAv4cjLc8OSWbkOS2EQ=; b=n3D+BRbbdnsaL+0JHUy9dBlMDEnI3hvA96ZspGJT5cMWW7x0EgkhaQFLqpIQYIqUlP QyeHRf4dcQCZBHEb7OBW7f2GNiE3Oktt6pKVh75kjPfEDv+BNPPWKGkf67wgXEKFop/M Xz5c6CaHc2vCNtCNSQxlPhKE0hGTBaOMqcT5bp+Q9Do6aCpRtmI9IuqSp0NUno0I2sg1 ZG63W3ME+zArjE26QuyIRUeYIO4dyAW32Wjt4mvez2AnZevPOhEMROh9AoXD7gbNE74t e5OULAy376GJeqnyRoNr7gyI7QFEYrvGlbcHDt3XMD+76HY4Lw/KcVk+H3hbUykEF6Py dPjQ== X-Gm-Message-State: AGi0PuajT3ivW5uBpCueUReB7+X/0dqabv5/WMfSOLjHAgdljYvGypS5 LudlfR1KZQFwRmTo+Is6lo4iXY/u0o2wxw== X-Google-Smtp-Source: APiQypJ6+QxeDUmEmEc+H/HLcujcTmAIyWS+fO3UmiPnh/J7oeqtautJwkHPU+RCmsMjkOVCh4PkfA== X-Received: by 2002:a7b:cf23:: with SMTP id m3mr14050982wmg.36.1588595601027; Mon, 04 May 2020 05:33:21 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 08/39] target/arm: Use uint64_t for midr field in CPU state struct Date: Mon, 4 May 2020 13:32:38 +0100 Message-Id: <20200504123309.3808-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 MIDR_EL1 is a 64-bit system register with the top 32-bit being RES0. Represent it in QEMU's ARMCPU struct with a uint64_t, not a uint32_t. This fixes an error when compiling with -Werror=3Dconversion because we were manipulating the register value using a local uint64_t variable: target/arm/cpu64.c: In function =E2=80=98aarch64_max_initfn=E2=80=99: target/arm/cpu64.c:628:21: error: conversion from =E2=80=98uint64_t=E2=80= =99 {aka =E2=80=98long unsigned int=E2=80=99} to =E2=80=98uint32_t=E2=80=99= {aka =E2=80=98unsigned int=E2=80=99} may change value [-Werror=3Dconversio= n] 628 | cpu->midr =3D t; | ^ and future-proofs us against a possible future architecture change using some of the top 32 bits. Suggested-by: Laurent Desnogues Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Laurent Desnogues Message-id: 20200428172634.29707-1-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/cpu.h | 2 +- target/arm/cpu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 9aae324d0f6..8608da6b6fc 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -894,7 +894,7 @@ struct ARMCPU { uint64_t id_aa64dfr0; uint64_t id_aa64dfr1; } isar; - uint32_t midr; + uint64_t midr; uint32_t revidr; uint32_t reset_fpsid; uint32_t ctr; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index f588344df83..5d64adfe76e 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2755,7 +2755,7 @@ static const ARMCPUInfo arm_cpus[] =3D { static Property arm_cpu_properties[] =3D { DEFINE_PROP_BOOL("start-powered-off", ARMCPU, start_powered_off, false= ), DEFINE_PROP_UINT32("psci-conduit", ARMCPU, psci_conduit, 0), - DEFINE_PROP_UINT32("midr", ARMCPU, midr, 0), + DEFINE_PROP_UINT64("midr", ARMCPU, midr, 0), DEFINE_PROP_UINT64("mp-affinity", ARMCPU, mp_affinity, ARM64_AFFINITY_INVALID), DEFINE_PROP_INT32("node-id", ARMCPU, node_id, CPU_UNSET_NUMA_NODE_ID), --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588595778; cv=none; d=zohomail.com; s=zohoarc; b=jSffP1ey9GYApqq+4to+WKiYvij70TO0rY9WT1Nu1JpcYoM7C1Q7TpjyPg50H12iSz2wxyx14l9Rr3Tt7MpiQ8MTDuCQopkSyHq8zY+xKw9mJzamsD8rCvQmzfq50/shp9vgdha6qOUXMvPsy7pRXIzpIialBzoqtPTLh9LRVpg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588595778; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vtjkPyhN5yeFIjnyBTjjTJF6AHtmNmTLOfT5l6GiTkY=; b=lD2Z9Rbg2wgbLBG5M9LRQ9WGsQacyhZuiFnLqdPlxj01KyeoSHegScOtbmB2kTyjpFiv4XXqo4TkEaPbNugi/g66Y2P56VoODKfFQQ4tTMquXCx8/ZDDiDEWTZ6OiF2OCkqo2R66kVu+e8QRN86WVBSxtp06SITnZ77H4/eKH4U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588595778897338.81492857656247; Mon, 4 May 2020 05:36:18 -0700 (PDT) Received: from localhost ([::1]:44728 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaKX-0005DP-MT for importer@patchew.org; Mon, 04 May 2020 08:36:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56434) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHl-0008Qa-A3 for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:25 -0400 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]:39699) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHj-0000q0-PX for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:24 -0400 Received: by mail-wm1-x333.google.com with SMTP id y24so8844640wma.4 for ; Mon, 04 May 2020 05:33:23 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=vtjkPyhN5yeFIjnyBTjjTJF6AHtmNmTLOfT5l6GiTkY=; b=bBVV5K/em7BHYx02L3js/CXFO1B2Fi/1g1iPyGRqyKhnuaCUVuf7+Glxdx61Pqhl5a ztsf14x4AvH1E8fvr4LkLWy5GGNseZ80Mrhn22yfj+ShNEk3sV5XIJ58EPllooToo+LC E+uijbRwoi5eK/xk3VkabGu4iixQ2xGE3lDS+VJ+YPVGdQ+OgzI3Mk01xVpr1n0Pprio /JHz3Gj3aZBD6fW7lh6Uh9tYbBs0Fx4uBIQPTxWcGMGDZSdJcZsb8RKGlAifn9bbn5/W pKtFyPvCueeQoAgK0RNpBn6S9Iorxznkil4kBOOjmGgOsYAaIf+JlnoeOEhbjIc83aSN 6FdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vtjkPyhN5yeFIjnyBTjjTJF6AHtmNmTLOfT5l6GiTkY=; b=NmkD1mL+4kKV3rKJQlS8bzVxAsZpewaxkBa0HzS7DBXB46mrY+WJ0CU7y87DT486cI ufIe5mU5tlT3Xd08mLcK2Qa8fElPhHDKttlL4zHHvywpvdCHGmmPEbzcEqnPCfdnvI5H GIcNqhyOJWnZm3dhlhdARNA5eXAhCgWxnyekyRUYR4J6YMHdcCTClhCX6Teo9yRd+kOf yI5Hw0f8bQ0Ht7asy5pHN3Z4nspUotdm4GmWn/jfNT0ryf1UKkV5Ltnlv3kJ2JGx0NnN OqXZYB4GLeDNtNGssxYlOGmWMwCB9Ghuzxwjjuv60Nivz7bK7Wm2evuleWFg/sf9iwMk S5YA== X-Gm-Message-State: AGi0PuZAMrhpIsCidBSCI0XG8PB3kXE3u4IqW5aKyQrhpo80EJ/cy3L9 oTxFKMJQfECUuU7brEe06th1kydFfRLLJQ== X-Google-Smtp-Source: APiQypLxXaERK8ZstkZz2OcNGy1QtbAwcYaBpQGEqqlB3cSYTJkDrbMnRonAYRKZXX0e9cv1XgPzTw== X-Received: by 2002:a1c:a58b:: with SMTP id o133mr14107234wme.5.1588595602137; Mon, 04 May 2020 05:33:22 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 09/39] hw/arm: versal: Remove inclusion of arm_gicv3_common.h Date: Mon, 4 May 2020 13:32:39 +0100 Message-Id: <20200504123309.3808-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: "Edgar E. Iglesias" Remove inclusion of arm_gicv3_common.h, this already gets included via xlnx-versal.h. Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Luc Michel Message-id: 20200427181649.26851-2-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- hw/arm/xlnx-versal.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 94460f2343b..c73b2fe7555 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -20,7 +20,6 @@ #include "hw/arm/boot.h" #include "kvm_arm.h" #include "hw/misc/unimp.h" -#include "hw/intc/arm_gicv3_common.h" #include "hw/arm/xlnx-versal.h" #include "hw/char/pl011.h" =20 --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588595784; cv=none; d=zohomail.com; s=zohoarc; b=TO/U16wAlT1OlvEX5f7pnviVVcsGVI7BxIlF4RpdH7ZmatoQ5uGb2PV8n7AcXJ1hqwR2mImxpYAasCqnZ5an8kHAGy6c/xFCTMDn1WK4iWGu3oqKnwaqY3P8GRBC2ObGHtxxHDrru3uAiNPx2kfHq2rnj6ExWdOTjKv8r+Cmzlc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588595784; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=zKel1GTMbLzQCp40bxcgD3q9PRQfcYG3Q8Qjvpr0CO8=; b=Z+b1ngJI42wBq89oMLwqS57LTYvBMRBLt1Tf/WfMHeUfUtZ2f7HA5sckpgq9QA6EMrl8HcsGhSB1Vn5NykppAvx82H3GGx/nxtvXr1ufUoLi1FqwcLkg4+VZu8k5vxynGiUhmYlqdQAhJzJ90XHxuONayk4Lw10/nO6fyAYL7vQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588595784702573.4327416727009; Mon, 4 May 2020 05:36:24 -0700 (PDT) Received: from localhost ([::1]:45000 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaKd-0005KD-C2 for importer@patchew.org; Mon, 04 May 2020 08:36:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56436) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHl-0008RF-HD for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:25 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:56267) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHk-0000qr-IK for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:25 -0400 Received: by mail-wm1-x330.google.com with SMTP id e26so8234643wmk.5 for ; Mon, 04 May 2020 05:33:24 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=zKel1GTMbLzQCp40bxcgD3q9PRQfcYG3Q8Qjvpr0CO8=; b=yZPhjKpRTnfQSnc+6sJtsANiuagLCEsyzCkM4jcTbKGa7ApWDWySyLOZg6UOs4PAN3 QOSBtHkYB9q6nvKytbHlKMiOrTRlvt0oQUKkzWrytVN/57KUrkGXs3BfXFJhHEXw4CFa whCvT4KbQ6FNMfa74KGbZeYauSwTxK7W36L8eAIN97nOaNUjkm2D0qKmLKWQTof7ZDVQ bj0QxYv85ObndkNsA1uljDm8NI4AAOFu4xhjLrn9Z38JcIEKiEFH32AMq6lmby9DSC/k l03YJqzs+H8Tybu+2rzDVjQnrB1DchKJhZLA5QUhlDuNjeCjfrljxi4GN1mseQKU7qj8 9zIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zKel1GTMbLzQCp40bxcgD3q9PRQfcYG3Q8Qjvpr0CO8=; b=ppApqpeMc36/sYfPGNnmbkP9Gd8FzXlOUTV6CpzN02FPDnurG+96Crpnn1h6l6Yigf YM18KSl6GhObaUJwWuUPbwM9r9jcl23UXNqhHMNMZmCFlaObMJZXccLRq71BKtnRn/vR Vuaj1zXFa+4kcVK0ajF76d3GecLeDW+9QSQy0PUZumpSZljDmZ3DVZTIvxaZqtqnXLl6 JA1QRvfnbaMgRv/E2MqAl4fF7vOxVwGqRDJ8iO6F9dC8OByidx0FpaV5Is5Jooamb8UN y/Cp6tiHV1ve58mtkbpmZjVvjl+uoJ7rT/2otgYWHV1t1ygLBYY25YtA7gZDFhLeibm2 4gLg== X-Gm-Message-State: AGi0Pubnyr8iixptO0A2bBOAisoqyhpXusBTtEm9bn+N3cCORiySk9tx cIgBsu8+b8J4B3ey6RrxEvX9mM9FrXILaA== X-Google-Smtp-Source: APiQypKJOWuawp+OoFKfUGZ1o9gmMGw6dmPsY/epldrwp4Yc/YRxrbsKKpFSXiy7+UU3YNUoux18HQ== X-Received: by 2002:a1c:dfc2:: with SMTP id w185mr13829006wmg.1.1588595602986; Mon, 04 May 2020 05:33:22 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 10/39] hw/arm: versal: Move misplaced comment Date: Mon, 4 May 2020 13:32:40 +0100 Message-Id: <20200504123309.3808-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: "Edgar E. Iglesias" Move misplaced comment. Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20200427181649.26851-3-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- hw/arm/xlnx-versal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index c73b2fe7555..cc696e44c06 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -36,7 +36,6 @@ static void versal_create_apu_cpus(Versal *s) =20 obj =3D object_new(XLNX_VERSAL_ACPU_TYPE); if (!obj) { - /* Secondary CPUs start in PSCI powered-down state */ error_report("Unable to create apu.cpu[%d] of type %s", i, XLNX_VERSAL_ACPU_TYPE); exit(EXIT_FAILURE); @@ -49,6 +48,7 @@ static void versal_create_apu_cpus(Versal *s) object_property_set_int(obj, s->cfg.psci_conduit, "psci-conduit", &error_abort); if (i) { + /* Secondary CPUs start in PSCI powered-down state */ object_property_set_bool(obj, true, "start-powered-off", &error_abort); } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596018; cv=none; d=zohomail.com; s=zohoarc; b=bSNji3Npaeg+p/qJyiihPsadX6eSQ/Qya+KWtffBfRUg+EQEikwSQIShkXVPlxQFINrC5nHpsjSJpThhQume0RV2ctJ3FLucns9BQSaEoEZXYgAoiJmriOC8w/blfOGzcUUwJdDy3GzI0zYBHVxdPgPLlEwQp9M5ARADOMFYjrk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596018; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=zmzHGE57MukSIkxK2mquJ8on6NKtjOsBN0YXeedCzVs=; b=GNObGivqn8u51PR8Rbg9n8ryz2WpH1n8jv3OrdFUSZoFKHVix1clzbFThRsHNB0HmgwSkIppfktMwTL6fz/sxGn0yUhMO8289zQS1aYfCnaRypp036v12sCGXhJHnQMMNnvB6tbkKjcivbYEj/mrxJtzD7yabLk6SKfJMRIeelg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596018812682.1750812578986; Mon, 4 May 2020 05:40:18 -0700 (PDT) Received: from localhost ([::1]:33390 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaOP-0003xA-Ej for importer@patchew.org; Mon, 04 May 2020 08:40:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56444) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHm-0008U9-ES for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:26 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:40556) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHl-0000qx-JL for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:26 -0400 Received: by mail-wm1-x332.google.com with SMTP id u16so8806042wmc.5 for ; Mon, 04 May 2020 05:33:25 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.23 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=zmzHGE57MukSIkxK2mquJ8on6NKtjOsBN0YXeedCzVs=; b=RlUw0mvBNdW2pse5ZDT4I8BFCa/MUCC9crqP82770Toa3mu4csgSsfGPkB23Jn+ncF Hu742pV4hIVmWaSemYcuOP9zsNgKF6IQHDWG50wOWLTSvvJBg5g0LmfQyxxJ1e+Vtftc W4Rd1bfSOc/b81tRxWhEzWNckqjFvckg7MuBYe1Lw4BUmDCYbdPxg6btbyVfWgx/0yYN su0WMPHLbma/jTjvQDkFm4U6J0ktlKIYb2FWx2XgXjIHr6XtX/O3D8/5QLGyMOMYcZq6 MJ78/VUZRHRursGKEfY167//b+MjlsWL12BRCUNo1nxeA8njUrgpXc/HqFc6JJh/2pHw NpaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zmzHGE57MukSIkxK2mquJ8on6NKtjOsBN0YXeedCzVs=; b=XX/AjiehDvRZ1tFXbwS1VOW2Lm+zYepgBn701+iFHWbTLjtFGXh7dIn+rsc7KK3f1E cJgHM0DUSkJUA7Crqe2Q7yuQnvM5bL123EmerN0bAedtpB5Fu0EdR+3L9jxaK3XX1Ddg ne2JqOYNCxcdBB7lSFzwPdNiWYxYgEH9Um6sc7O7qSPqsC7nVLlIXi+M84NsO0gHRTcm 8/RiLQtmsfT1S5W75cq2nlwwIDgKxrNmdqLMFMfz1icomsoLcELw4OfmFsux4adD6ikj fpZxrW7VnOGq4bQGSg3p3QTtN6TmumkmftHFURp1LXg6UlDhVLq/SN2NyVhoiJADCjTR FSFg== X-Gm-Message-State: AGi0Puai2jGvr2f8CzQkaT3mkBr1Wrc4203pbMK0X05aqUj1YtV8gtsK CeLXeSPLd47uA/j1fDgKlAC9ehGYwe7ExA== X-Google-Smtp-Source: APiQypJpwDU1J5eCS1QDdhpT50YhqE/Idc5mFD1ZJRDPPzrNp1Qr7NGpMjdTZZPoiJr6wWf/SaTt+w== X-Received: by 2002:a05:600c:2218:: with SMTP id z24mr14206276wml.82.1588595603974; Mon, 04 May 2020 05:33:23 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 11/39] hw/arm: versal-virt: Fix typo xlnx-ve -> xlnx-versal Date: Mon, 4 May 2020 13:32:41 +0100 Message-Id: <20200504123309.3808-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: "Edgar E. Iglesias" Fix typo xlnx-ve -> xlnx-versal. Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20200427181649.26851-4-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- hw/arm/xlnx-versal-virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 878a2751400..8a608074d15 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -440,7 +440,7 @@ static void versal_virt_init(MachineState *machine) psci_conduit =3D QEMU_PSCI_CONDUIT_SMC; } =20 - sysbus_init_child_obj(OBJECT(machine), "xlnx-ve", &s->soc, + sysbus_init_child_obj(OBJECT(machine), "xlnx-versal", &s->soc, sizeof(s->soc), TYPE_XLNX_VERSAL); object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram), "ddr", &error_abort); --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596119; cv=none; d=zohomail.com; s=zohoarc; b=hhrn8DblwH/QiH8fLIBCM6tAeIILuMGtAzUl+lbS2uswWCsUdr+VT0LLdYJOW/uHAlgqu70hyCF4te6nExY+MgoQeYse+LdjlHZDuHJ0iwRlK8t1cDQ+mMbI56vePtTiwB/40K6s9ByrcbJWBNWVvwYSQsdEfKKMd4O+nbVixSw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596119; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=yAm+X6LwZsg/LS8zarCIG4F8biyOYqPggWmduB/wNPw=; b=f+B792hxWyF7kBsc/UdVVQnE57MeFoBqEzk+VGfWuW4Ectk7I2z2g69miFz9+0we94Au/6URitbrR9sDtJUsR4v1oAMYAin0iiDHleY7I71naKRxP5KYC2ZJqSrbAe7MVwDkdVUIc8sQNv+GDtBwVPBN08jkGx0DNtrbaVSe2h8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596119483643.4613761082701; Mon, 4 May 2020 05:41:59 -0700 (PDT) Received: from localhost ([::1]:41902 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaQ2-0008Fs-3g for importer@patchew.org; Mon, 04 May 2020 08:41:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56456) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHo-00007i-B5 for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:28 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:52652) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHn-0000r8-2m for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:28 -0400 Received: by mail-wm1-x343.google.com with SMTP id 188so8222483wmc.2 for ; Mon, 04 May 2020 05:33:26 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=yAm+X6LwZsg/LS8zarCIG4F8biyOYqPggWmduB/wNPw=; b=HuXnaY6vFoD1S/P7Z+cQr0xpjr55nHpijyROnz7XOwHmQIn42VF9szlh2cdCW4/jkv hHzO0W4gDYJamOF2J+bKjGuK4tDuaLEk5CduD+M0/WVNLPJJn6wa7Qhpi5M68p4AXwKc E1pFY6z46lI1fF0fT/zObNisVU2LeITVL4juHIaS3OcUAJqKh19pvN8eB9qNinhpNEG+ IzrAF/ssU6Bo2T+xNold6H3DZ4B6oq/t/J/Ay2P7hgCb/vzFJPzNVFRZvWoVjhyUSfAk PhsaqoyWG9d2m1Oi1A+raGUNFkO09CiJVHlKvUvZCXOc+roUKR69SYcpTys8GLNfFUPW UEyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yAm+X6LwZsg/LS8zarCIG4F8biyOYqPggWmduB/wNPw=; b=umAwb5SFb50mbfHhFs/t7aO2RCGQtRrTJO+P+cY2YEu7r9V1DrrnXjzdTdrrooqxOI gBIqvLhOUzOqvNFUz7eQya87N8WvoIcOwYQDv/mT2qcFqqTO4YO+7GyihNNuyV4XYcbl hhAem8WJMPaZg16hVlCjv4ubCrcEa6mMDW1y612lYA+6nyxCAJei71MSXFzQQD2RjrV6 7wpKJL+XnSvlq6QyrTx33rGf+IjwbBKSM5ict7BuN4gRGs0NDTpyc5Maz7u76mS8GXB8 WaRigIpdA5rgGHkMKnVb+4CYaL96dzcI17944+8DDxeTUJ1qXgD8oYffWIE7G7S8+i0Y 2yKA== X-Gm-Message-State: AGi0PuaR5PTFwRm/hcF2MLfVU+4XDRiVO7dvSHGRj0XNthM756hTDziu Y/aNzsqBSUstBdIV25zhPtbjCFrogbDHcw== X-Google-Smtp-Source: APiQypKIeOe2qsVsMH4l2HmxfMlyiQs5P4CCIFcpKRBovyjDUAxUxpSUjh+1m3ilQ/zvhCA2HFiliw== X-Received: by 2002:a1c:44b:: with SMTP id 72mr14130561wme.58.1588595605434; Mon, 04 May 2020 05:33:25 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 12/39] hw/arm: versal: Embed the UARTs into the SoC type Date: Mon, 4 May 2020 13:32:42 +0100 Message-Id: <20200504123309.3808-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: "Edgar E. Iglesias" Embed the UARTs into the SoC type. Suggested-by: Peter Maydell Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20200427181649.26851-5-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 3 ++- hw/arm/xlnx-versal.c | 12 ++++++------ 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 6c0a692b2fd..a3dfd064b3c 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -15,6 +15,7 @@ #include "hw/sysbus.h" #include "hw/arm/boot.h" #include "hw/intc/arm_gicv3.h" +#include "hw/char/pl011.h" =20 #define TYPE_XLNX_VERSAL "xlnx-versal" #define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL) @@ -49,7 +50,7 @@ typedef struct Versal { MemoryRegion mr_ocm; =20 struct { - SysBusDevice *uart[XLNX_VERSAL_NR_UARTS]; + PL011State uart[XLNX_VERSAL_NR_UARTS]; SysBusDevice *gem[XLNX_VERSAL_NR_GEMS]; SysBusDevice *adma[XLNX_VERSAL_NR_ADMAS]; } iou; diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index cc696e44c06..dbde03b7e69 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -21,7 +21,6 @@ #include "kvm_arm.h" #include "hw/misc/unimp.h" #include "hw/arm/xlnx-versal.h" -#include "hw/char/pl011.h" =20 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define GEM_REVISION 0x40070106 @@ -144,16 +143,17 @@ static void versal_create_uarts(Versal *s, qemu_irq *= pic) DeviceState *dev; MemoryRegion *mr; =20 - dev =3D qdev_create(NULL, TYPE_PL011); - s->lpd.iou.uart[i] =3D SYS_BUS_DEVICE(dev); + sysbus_init_child_obj(OBJECT(s), name, + &s->lpd.iou.uart[i], sizeof(s->lpd.iou.uart[= i]), + TYPE_PL011); + dev =3D DEVICE(&s->lpd.iou.uart[i]); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); - object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fat= al); qdev_init_nofail(dev); =20 - mr =3D sysbus_mmio_get_region(s->lpd.iou.uart[i], 0); + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->mr_ps, addrs[i], mr); =20 - sysbus_connect_irq(s->lpd.iou.uart[i], 0, pic[irqs[i]]); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[irqs[i]]); g_free(name); } } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596236; cv=none; d=zohomail.com; s=zohoarc; b=e/NmkYsK7dVdhmgQpwGXYRk5/UUnYAJPkZdT9Uh1bJ7hdfx7swMskiCK3t5Bk2RNvwJA2Td9yPWMGtLOeO9uuOTjz4yzPKJJxbIabqZQ3aWn4vQ4EjQmS1PHqh4S1KUqXnimkhUT9uG2QE4azK9MZBgNSzxCmDtnQeIMpr/YGnk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596236; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=H7Q0HbKnJYd5x/Hsj0Qn9RB+/KpzA8r2pgsAqpzc5CI=; b=i25Y69++Wz2yBb3l9kL/AG7h0LzmkK3GlfV3J16S+xTddXO6PhnAIKyWFkuwqwW1JNA5a7h+rOfcqWScLMJ52izX01/7aZY3L0vJ7CPMFncN0KE3W/36gDYa8IB6XvOf6UgR3G8D3+FYqxPbEZzIKxmtQbLEv8EmKXp+WipZFjM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596236532214.73130086538004; Mon, 4 May 2020 05:43:56 -0700 (PDT) Received: from localhost ([::1]:50384 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaRv-0003HC-6W for importer@patchew.org; Mon, 04 May 2020 08:43:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56466) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHq-0000BF-Dn for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:30 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]:38462) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHo-0000sZ-9x for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:29 -0400 Received: by mail-wr1-x42d.google.com with SMTP id x17so20700019wrt.5 for ; Mon, 04 May 2020 05:33:27 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=H7Q0HbKnJYd5x/Hsj0Qn9RB+/KpzA8r2pgsAqpzc5CI=; b=TD+kVmoykMuKu7s5CmBhR7uys6eZiGpc8yIvrNLI0JkPTLblrvHFq7zLiesaD0Eulb PVOCDtkgvhOpWWyKdM8YuJmcMP9D8lGwVVlY7Ah8QzkgpmOChQkfXDzfFrhYaObbXoqA Z+duk3yXoOrLKTXKE5I5xNKj9LmqiFbhm0tkTYVQmT/9uKQ+ilI/njCZYAs99u7UCZE1 0d0sECAIOjsxfvLV9qVD/DN+KcwvlNLPcxV+5+CctEW9awrGxUkMhTsiXRbJLS5HaP9h myQSV4l94KzgNOIjsN7pRcILFduNrV4nPM9b2PBBKk5PirIqyZAfpkHAdivHa8X4CckF 3fXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=H7Q0HbKnJYd5x/Hsj0Qn9RB+/KpzA8r2pgsAqpzc5CI=; b=Zw93QxTTkZ517Tet0H4l1vBRneBN/+RSOup/Kh26e771JeFikwtK+Nnq+f0cWrTpkg NuPcPHRmbX7pyRG3LCFKZoyrqv1JTtnbGTK8gyBqm4Iip7jeQFkVWAixOPbU+dMDdFlc x5P7gG0e27qsuNjYLkMoMUlHEeye/qFEpRlCSpIb5e5zGqlPBX/re4MgEj9yOLsYRLQI UAI7+Op3971VfMj+OG4bUbBs4LqJVZzcQcQlOphUYaCAt4kvJ9KIIvsNaEYPGs2IWcqp 1hErBspspxXjNRjauboD0IpI+no9Rdn5YOWLaI0Ck8+fvVTzbuPyHYOL+Q7ll9DG6emj yw6w== X-Gm-Message-State: AGi0Pub3B2h4hQYZYnYxEZqRbg+8GYhtVjzgm4W0vKhkoeUCfp9oFsWV OtJ3IfXJcH7j+KP5AF49a4uz6PZvdNbJOQ== X-Google-Smtp-Source: APiQypL0bG04ZPnoikIQ+XkIAhmXoPidTD/IffLkGG/un670MI2dkCd4UayryWz8rKvh/7UK5P6XwA== X-Received: by 2002:a5d:6cce:: with SMTP id c14mr18180895wrc.424.1588595606598; Mon, 04 May 2020 05:33:26 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 13/39] hw/arm: versal: Embed the GEMs into the SoC type Date: Mon, 4 May 2020 13:32:43 +0100 Message-Id: <20200504123309.3808-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: "Edgar E. Iglesias" Embed the GEMs into the SoC type. Suggested-by: Peter Maydell Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20200427181649.26851-6-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 3 ++- hw/arm/xlnx-versal.c | 15 ++++++++------- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index a3dfd064b3c..01da736a5b2 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -16,6 +16,7 @@ #include "hw/arm/boot.h" #include "hw/intc/arm_gicv3.h" #include "hw/char/pl011.h" +#include "hw/net/cadence_gem.h" =20 #define TYPE_XLNX_VERSAL "xlnx-versal" #define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL) @@ -51,7 +52,7 @@ typedef struct Versal { =20 struct { PL011State uart[XLNX_VERSAL_NR_UARTS]; - SysBusDevice *gem[XLNX_VERSAL_NR_GEMS]; + CadenceGEMState gem[XLNX_VERSAL_NR_GEMS]; SysBusDevice *adma[XLNX_VERSAL_NR_ADMAS]; } iou; } lpd; diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index dbde03b7e69..e424aa789e3 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -170,25 +170,26 @@ static void versal_create_gems(Versal *s, qemu_irq *p= ic) DeviceState *dev; MemoryRegion *mr; =20 - dev =3D qdev_create(NULL, "cadence_gem"); - s->lpd.iou.gem[i] =3D SYS_BUS_DEVICE(dev); - object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fat= al); + sysbus_init_child_obj(OBJECT(s), name, + &s->lpd.iou.gem[i], sizeof(s->lpd.iou.gem[i]= ), + TYPE_CADENCE_GEM); + dev =3D DEVICE(&s->lpd.iou.gem[i]); if (nd->used) { qemu_check_nic_model(nd, "cadence_gem"); qdev_set_nic_properties(dev, nd); } - object_property_set_int(OBJECT(s->lpd.iou.gem[i]), + object_property_set_int(OBJECT(dev), 2, "num-priority-queues", &error_abort); - object_property_set_link(OBJECT(s->lpd.iou.gem[i]), + object_property_set_link(OBJECT(dev), OBJECT(&s->mr_ps), "dma", &error_abort); qdev_init_nofail(dev); =20 - mr =3D sysbus_mmio_get_region(s->lpd.iou.gem[i], 0); + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->mr_ps, addrs[i], mr); =20 - sysbus_connect_irq(s->lpd.iou.gem[i], 0, pic[irqs[i]]); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[irqs[i]]); g_free(name); } } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588595879; cv=none; d=zohomail.com; s=zohoarc; b=ERHV1cBkj0UYjdkibSOsclUHiUhuF4VzTZODihaAtnXxRgS4KZr0LMoKVMFVVghuJYieDEdiXPs0nGPXE/YTq6WizYMMEvwX3iypzSLVs/0vHtzATF6CnsBCMfXU3U0NdDv6LOYAxe4tAsNsu9GGr+Ln/suVyoYrM6tDb2XfGaM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588595879; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=lnazISB2ygbNrgd87WVV5yJxpAw+zHWve8ESC0KSKAo=; b=G+S8A//6eC/mlgZcAVdK9rlRD96PoNl36g2XAhxRsRO6UkiSYopXU4/2mgRvDNxLZIuBVgEQmfF2opa/uiDKRLLW9ia1kpbCkeG4f2/iSOEal4f1asXO5l2mflgrQmnP2jexebG6P1f4mEgMsv+Og18SgrI/YC+MyPC2eaeICc0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588595879875938.279539537819; Mon, 4 May 2020 05:37:59 -0700 (PDT) Received: from localhost ([::1]:53084 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaM8-0000GZ-Q7 for importer@patchew.org; Mon, 04 May 2020 08:37:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56476) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHr-0000Dm-C3 for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:31 -0400 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]:37748) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHq-0000uc-AJ for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:31 -0400 Received: by mail-wm1-x32c.google.com with SMTP id z6so8835694wml.2 for ; Mon, 04 May 2020 05:33:28 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=lnazISB2ygbNrgd87WVV5yJxpAw+zHWve8ESC0KSKAo=; b=fpH4/8wrT2HxZ8OE1UECJttT28a8aPIoBb+PUUTZLCvhQxM0DFEa4DdEiX12aX8AHu sEQv0VqLAvQnwxVKjygNJpJeYAu+gqcSGhtNkC4OxY257FMTieLpowDdC8t/YKfBJ0kU 6kvK7l2k2M+LrLT9t2q4+69xAucbZLeWKAKolk4zKs6Qv0MKqv8QIwd7D9kfmh2KZxAo JUDDihNK8wul5TQK/EPr53gu1TUgTS+j3K4bajERaw/OHIrXJ8QYkIFZY9/3tKYphEKF fWnq9gyPZeAIE7GZxrNA6U+H4/yGlXdxeJ4pZTRyXsgIMhMWyQLCdgCdNScPQz58BDgn svpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lnazISB2ygbNrgd87WVV5yJxpAw+zHWve8ESC0KSKAo=; b=kP3XBUECOVFZuvWDEudGj0d7VhiyAdrGg9QCBmUr4ZBFofE/keHbcN066rNQMZvrB+ v0H0mfQvrZxHFjw7Za4ZzOrkofKmX39Z+thN/fXa090y+f4JmTBfII5UdhS8yeBGs1oO g1d2J7BE5wuqpnrBSkbdMEpqVJqbzQ98Ccu8v7fHSHcaTMOKN1eDrSeK9tOfqK8eGlnT pmOw9vo3HlYGTC2bwMqgMAb69xE6zS9D4UYJ24LUG6KS4QgzXH4o5Ck+aS+qxdJ/7Co6 6OmaLOidigituugIu8IflYvLLDjVyuWf2F5w2z8n7YIxdy2xts9cjfOnuApmIGVWVTjc SmCA== X-Gm-Message-State: AGi0PuYYYIMR22GrWlb+a7DDs9mMWtAZK/foPaJGPOq75D6COqcMiqMl uysmwfMljaV5R1wFX+327NumuKbAp1m8LQ== X-Google-Smtp-Source: APiQypJlUj0hYCrDgyBaOJFJvYch1Gqd8Whu6HVhsB0hY3WNz5OGbW3Y8yr/faiYrpN7nkacprSZBw== X-Received: by 2002:a05:600c:2316:: with SMTP id 22mr14033755wmo.164.1588595607587; Mon, 04 May 2020 05:33:27 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 14/39] hw/arm: versal: Embed the ADMAs into the SoC type Date: Mon, 4 May 2020 13:32:44 +0100 Message-Id: <20200504123309.3808-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: "Edgar E. Iglesias" Embed the ADMAs into the SoC type. Suggested-by: Peter Maydell Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20200427181649.26851-7-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 3 ++- hw/arm/xlnx-versal.c | 14 +++++++------- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 01da736a5b2..94b7826fd49 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -16,6 +16,7 @@ #include "hw/arm/boot.h" #include "hw/intc/arm_gicv3.h" #include "hw/char/pl011.h" +#include "hw/dma/xlnx-zdma.h" #include "hw/net/cadence_gem.h" =20 #define TYPE_XLNX_VERSAL "xlnx-versal" @@ -53,7 +54,7 @@ typedef struct Versal { struct { PL011State uart[XLNX_VERSAL_NR_UARTS]; CadenceGEMState gem[XLNX_VERSAL_NR_GEMS]; - SysBusDevice *adma[XLNX_VERSAL_NR_ADMAS]; + XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS]; } iou; } lpd; =20 diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index e424aa789e3..ebd2dc51beb 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -203,18 +203,18 @@ static void versal_create_admas(Versal *s, qemu_irq *= pic) DeviceState *dev; MemoryRegion *mr; =20 - dev =3D qdev_create(NULL, "xlnx.zdma"); - s->lpd.iou.adma[i] =3D SYS_BUS_DEVICE(dev); - object_property_set_int(OBJECT(s->lpd.iou.adma[i]), 128, "bus-widt= h", - &error_abort); - object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fat= al); + sysbus_init_child_obj(OBJECT(s), name, + &s->lpd.iou.adma[i], sizeof(s->lpd.iou.adma[= i]), + TYPE_XLNX_ZDMA); + dev =3D DEVICE(&s->lpd.iou.adma[i]); + object_property_set_int(OBJECT(dev), 128, "bus-width", &error_abor= t); qdev_init_nofail(dev); =20 - mr =3D sysbus_mmio_get_region(s->lpd.iou.adma[i], 0); + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->mr_ps, MM_ADMA_CH0 + i * MM_ADMA_CH0_SIZE, mr= ); =20 - sysbus_connect_irq(s->lpd.iou.adma[i], 0, pic[VERSAL_ADMA_IRQ_0 + = i]); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[VERSAL_ADMA_IRQ_0 += i]); g_free(name); } } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596351; cv=none; d=zohomail.com; s=zohoarc; b=CJXZ+JW96JrW5EeXl7MyCsaOFS2JSrfDE0gklwbmfV2+TacyjmylIv3i8aD1SlltiDo/+UYlWk3bwC9yVp24Vog5woOXoQF1gNCDdXOBypwlGyWjml5nu3SEau+HJjeNsUk190MJOBMuTT1XE0QMRVH7ZU1pn/pw300/giWMNa8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596351; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=jVf6r09P5aGx03on/1HNxy/oqWSgeNz/oU/1pXVCDMQ=; b=nMK8IC1GjEojpN8mu0avG4PlewpxMvLoCccG/ULCsecHubdGyPQga0hp9/qINH1Eb31N4eXijA4xYUnK8Lcnqb9rS83eiUiBfwWyRWtZpLYnltsg3eBngiZwJ3VqHpPD+GJbTsm/F/YDg9tw2+WOd1MZA9eNcgFojqBeKfcF7Ek= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596351332475.6159358747973; Mon, 4 May 2020 05:45:51 -0700 (PDT) Received: from localhost ([::1]:59308 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaTm-00070C-3k for importer@patchew.org; Mon, 04 May 2020 08:45:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56482) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHs-0000Fe-53 for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:32 -0400 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:45131) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHq-0000vI-9z for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:31 -0400 Received: by mail-wr1-x442.google.com with SMTP id k1so1831371wro.12 for ; Mon, 04 May 2020 05:33:29 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=jVf6r09P5aGx03on/1HNxy/oqWSgeNz/oU/1pXVCDMQ=; b=xN5Y7hO4ycQUqeuhQhPgegV1xgJ5dw+M9kxV6r6bI+JoPa2CJGT1mVLODhWXI1v4I+ jmmHUJFr64u9jE/lxdkUCuDDvuSZp7JbY/FDpT236iiyAM8qsP1AdBmW/RwCvnI3iweB p0+OasvUaKQmH3jDrCdMlpgeFN9mlJaTdmf9xSC+G11cRRuTNTsFGaIEI0w1Aw6GXOT4 msbwo2nkfXlti+m1aM7xgGk7XRKdsIbTsE4jkdMjzj1U6Jjv/ZfivWwpp7xKKiSC4sGC jl0XrRhCtwtvvQu2mwx5SRxreBzERhlGZ4+teQRqVtEx3w3hUgO6rF4p/puBbcWZ7BQF WGXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jVf6r09P5aGx03on/1HNxy/oqWSgeNz/oU/1pXVCDMQ=; b=qMdI2ZhTlHAhMxBKtS19+Lic/6dPlNHRJDK0wepFZiLETtVvI2WxcNBaK3kq4UatR7 LAp1fCIrv+8QptXYFDHpFHrkxfnVXh0t2qsK883dwkbQBrX0qu+2FSr10w4OJN+TCTez c16xe8pYbhlr9JFA6FMv3pZlyqBYMgIKdhGQm/VbHBYHQMbJMT9hWWOgBpB3LZReQrFp DWPbgZN+84M7hmc1MBRYmzXu/1dhFunXL79mgeRa1E4O8zBUNX19psfYJY7hoNT3Ki1J 8F7/NcnrkriSxVYvMDeN6pB4WuYS6ah4F+bEczUijFyyIDVZ5qQ/oh/gxa+nqHtfVJRX AlEw== X-Gm-Message-State: AGi0PuYjMM2YQMFUoLXqdu5tNxpcuYFlBmNaHpLPvK67QxYDdXWWSwaJ PtPb/BE7/4PG5eM0CsPJD+RwXGARQNArMg== X-Google-Smtp-Source: APiQypJ2++utpOb9O+LdT8bVwme4ETa19TiTRUFoiPKRI6SBlaJbhV3BrUriywUQG8/3FfF9DSiVOg== X-Received: by 2002:adf:ea05:: with SMTP id q5mr4942004wrm.87.1588595608606; Mon, 04 May 2020 05:33:28 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 15/39] hw/arm: versal: Embed the APUs into the SoC type Date: Mon, 4 May 2020 13:32:45 +0100 Message-Id: <20200504123309.3808-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::442; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x442.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: "Edgar E. Iglesias" Embed the APUs into the SoC type. Suggested-by: Peter Maydell Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20200427181649.26851-8-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 2 +- hw/arm/xlnx-versal-virt.c | 4 ++-- hw/arm/xlnx-versal.c | 19 +++++-------------- 3 files changed, 8 insertions(+), 17 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 94b7826fd49..426b66449de 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -36,7 +36,7 @@ typedef struct Versal { struct { struct { MemoryRegion mr; - ARMCPU *cpu[XLNX_VERSAL_NR_ACPUS]; + ARMCPU cpu[XLNX_VERSAL_NR_ACPUS]; GICv3State gic; } apu; } fpd; diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 8a608074d15..d7be1ad4942 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -469,9 +469,9 @@ static void versal_virt_init(MachineState *machine) s->binfo.get_dtb =3D versal_virt_get_dtb; s->binfo.modify_dtb =3D versal_virt_modify_dtb; if (machine->kernel_filename) { - arm_load_kernel(s->soc.fpd.apu.cpu[0], machine, &s->binfo); + arm_load_kernel(&s->soc.fpd.apu.cpu[0], machine, &s->binfo); } else { - AddressSpace *as =3D arm_boot_address_space(s->soc.fpd.apu.cpu[0], + AddressSpace *as =3D arm_boot_address_space(&s->soc.fpd.apu.cpu[0], &s->binfo); /* Some boot-loaders (e.g u-boot) don't like blobs at address 0 (N= ULL). * Offset things by 4K. */ diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index ebd2dc51beb..c8a296e2e05 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -31,19 +31,11 @@ static void versal_create_apu_cpus(Versal *s) =20 for (i =3D 0; i < ARRAY_SIZE(s->fpd.apu.cpu); i++) { Object *obj; - char *name; - - obj =3D object_new(XLNX_VERSAL_ACPU_TYPE); - if (!obj) { - error_report("Unable to create apu.cpu[%d] of type %s", - i, XLNX_VERSAL_ACPU_TYPE); - exit(EXIT_FAILURE); - } - - name =3D g_strdup_printf("apu-cpu[%d]", i); - object_property_add_child(OBJECT(s), name, obj, &error_fatal); - g_free(name); =20 + object_initialize_child(OBJECT(s), "apu-cpu[*]", + &s->fpd.apu.cpu[i], sizeof(s->fpd.apu.cpu[= i]), + XLNX_VERSAL_ACPU_TYPE, &error_abort, NULL); + obj =3D OBJECT(&s->fpd.apu.cpu[i]); object_property_set_int(obj, s->cfg.psci_conduit, "psci-conduit", &error_abort); if (i) { @@ -57,7 +49,6 @@ static void versal_create_apu_cpus(Versal *s) object_property_set_link(obj, OBJECT(&s->fpd.apu.mr), "memory", &error_abort); object_property_set_bool(obj, true, "realized", &error_fatal); - s->fpd.apu.cpu[i] =3D ARM_CPU(obj); } } =20 @@ -95,7 +86,7 @@ static void versal_create_apu_gic(Versal *s, qemu_irq *pi= c) } =20 for (i =3D 0; i < nr_apu_cpus; i++) { - DeviceState *cpudev =3D DEVICE(s->fpd.apu.cpu[i]); + DeviceState *cpudev =3D DEVICE(&s->fpd.apu.cpu[i]); int ppibase =3D XLNX_VERSAL_NR_IRQS + i * GIC_INTERNAL + GIC_NR_SG= IS; qemu_irq maint_irq; int ti; --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=CGmRWhipF2RqadKcryx2/fZJUAv/8mJO7ibJMjfeHzI=; b=YMzU5nyVt8LUwmb9y9u84vPNjLLR9lxe0fmi7YW+NfdUMXkjPPSrXRNYHQc+eKBlnA 5jflxMMmsQadH7G4d4i1SckC4lIecZXh0shYcRypVnuulnLBzukDwyNof+sSEW1zmmaD 3QCYXZqxre7lKgLUzxbyOCaepyTV20jY15iesZsJl4MSyk6+eS/BVazMx/c5pRR6kJnF PfS/w3ISDE4HK2OZME9cT5WJCc8mAPBM+i+BRsmKOgBFxlZe8hEblo4/d+QWiDZ+Rnn0 ywmPA2qdrzQgddKN2OWinc+HruwKehWUiTDqU9tNKGaRXxfT+6TBrGyZxs8/pVlOr/kp vsoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CGmRWhipF2RqadKcryx2/fZJUAv/8mJO7ibJMjfeHzI=; b=QCyXnNMMymm4hxS2MMgahm0WLmsBFx9U0sP+rsw9p5WhTTjBAt/O46C+GPuOagmwal qWeobfNYJlsjZfj6JEvTgjqY7wdvafJ+9Kfe8COFuxqIwDFJ1veFeyB0MBHgTn7qzQpx PZhc2HOKZT0TTx9RXk5hztsJAsh218wXMTIj6hYZHIQo0cnJCNsbhGGCCLbc0Fd/4BdL g2pJXuSHsn4xGKC5Dn4q/WnDPbeTr+EsQ1ueJ6Vnt7pAPw1d+UJEVyuK6++FJJLxIfta BtrDFXFlxgpP/cC4pRGLDHHh4L5qnM9jf7mPTrYTJmcvoZseHlL4YNdlbwFSJNZwxMdB WsCQ== X-Gm-Message-State: AGi0PubWDPUQhaavs8yv6Xca5/TTcbfHmaLAaYoriUFEAMqwkVyThxKV ra0mQ+NbOFoG5nBT99ltxb5W+Fal75y1lw== X-Google-Smtp-Source: APiQypI4eeqft5vB5M8x7+Y43uTZ2NeQTWTrjW+ElKOssa4dylKMHl9mVPhgQn49ew6cr4Y1V3SKpQ== X-Received: by 2002:a5d:4e06:: with SMTP id p6mr18577775wrt.35.1588595609652; Mon, 04 May 2020 05:33:29 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/39] hw/arm: versal: Add support for SD Date: Mon, 4 May 2020 13:32:46 +0100 Message-Id: <20200504123309.3808-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: "Edgar E. Iglesias" Add support for SD. Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20200427181649.26851-9-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 12 ++++++++++++ hw/arm/xlnx-versal.c | 31 +++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 426b66449de..e11693e29d3 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -14,6 +14,7 @@ =20 #include "hw/sysbus.h" #include "hw/arm/boot.h" +#include "hw/sd/sdhci.h" #include "hw/intc/arm_gicv3.h" #include "hw/char/pl011.h" #include "hw/dma/xlnx-zdma.h" @@ -26,6 +27,7 @@ #define XLNX_VERSAL_NR_UARTS 2 #define XLNX_VERSAL_NR_GEMS 2 #define XLNX_VERSAL_NR_ADMAS 8 +#define XLNX_VERSAL_NR_SDS 2 #define XLNX_VERSAL_NR_IRQS 192 =20 typedef struct Versal { @@ -58,6 +60,13 @@ typedef struct Versal { } iou; } lpd; =20 + /* The Platform Management Controller subsystem. */ + struct { + struct { + SDHCIState sd[XLNX_VERSAL_NR_SDS]; + } iou; + } pmc; + struct { MemoryRegion *mr_ddr; uint32_t psci_conduit; @@ -80,6 +89,7 @@ typedef struct Versal { #define VERSAL_GEM1_IRQ_0 58 #define VERSAL_GEM1_WAKE_IRQ_0 59 #define VERSAL_ADMA_IRQ_0 60 +#define VERSAL_SD0_IRQ_0 126 =20 /* Architecturally reserved IRQs suitable for virtualization. */ #define VERSAL_RSVD_IRQ_FIRST 111 @@ -129,6 +139,8 @@ typedef struct Versal { #define MM_FPD_CRF 0xfd1a0000U #define MM_FPD_CRF_SIZE 0x140000 =20 +#define MM_PMC_SD0 0xf1040000U +#define MM_PMC_SD0_SIZE 0x10000 #define MM_PMC_CRP 0xf1260000U #define MM_PMC_CRP_SIZE 0x10000 #endif diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index c8a296e2e05..e263bdf77a9 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -210,6 +210,36 @@ static void versal_create_admas(Versal *s, qemu_irq *p= ic) } } =20 +#define SDHCI_CAPABILITIES 0x280737ec6481 /* Same as on ZynqMP. */ +static void versal_create_sds(Versal *s, qemu_irq *pic) +{ + int i; + + for (i =3D 0; i < ARRAY_SIZE(s->pmc.iou.sd); i++) { + DeviceState *dev; + MemoryRegion *mr; + + sysbus_init_child_obj(OBJECT(s), "sd[*]", + &s->pmc.iou.sd[i], sizeof(s->pmc.iou.sd[i]), + TYPE_SYSBUS_SDHCI); + dev =3D DEVICE(&s->pmc.iou.sd[i]); + + object_property_set_uint(OBJECT(dev), + 3, "sd-spec-version", &error_fatal); + object_property_set_uint(OBJECT(dev), SDHCI_CAPABILITIES, "capareg= ", + &error_fatal); + object_property_set_uint(OBJECT(dev), UHS_I, "uhs", &error_fatal); + qdev_init_nofail(dev); + + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); + memory_region_add_subregion(&s->mr_ps, + MM_PMC_SD0 + i * MM_PMC_SD0_SIZE, mr); + + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, + pic[VERSAL_SD0_IRQ_0 + i * 2]); + } +} + /* This takes the board allocated linear DDR memory and creates aliases * for each split DDR range/aperture on the Versal address map. */ @@ -292,6 +322,7 @@ static void versal_realize(DeviceState *dev, Error **er= rp) versal_create_uarts(s, pic); versal_create_gems(s, pic); versal_create_admas(s, pic); + versal_create_sds(s, pic); versal_map_ddr(s); versal_unimp(s); =20 --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596117; cv=none; d=zohomail.com; s=zohoarc; b=aRkhcQpWIHUApuwIjV7pKuvM121g1/PqFYsUo/isu1z7jMEsLv6x22xd711FlJ8X/MnaS9pbvFtmdTmmm8iGUZnwRF1kfZ5ARvrY4Dt4nUD1kLMCofNoBdyW4eR1BYgHnTI7l5v9MXIRU1bpBiwWbnYRzEmpHNeHhUWls9cjkHs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596117; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=46YDQfnJdBsNGu2+jdrQ8Ybw/urHvbn8NoapNHu01ns=; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=46YDQfnJdBsNGu2+jdrQ8Ybw/urHvbn8NoapNHu01ns=; b=mU4lOWHDAb7KAy6UvkZ+Aebymk26NmLzvxcf20VRvUajEAi2lKajpqH/MNxGx8iikl Apmip8DoKuhzrW3+UBNzRUO2Vx7R2I7CEZcfLFvvRrdFrFBn9O3nM/c74oqJbMprByrP whmat3VjGBUIEYH4mm7ReAKLJVZ7Lyimq/XoYRzFi57nRMYcntgXQ6bzA4nKtO5e8icd iLgiS2SjWz5ilUpPTpU9sLlR2dojXAdC14jfH6SwlfajWDqu5b9qyRursh/9aP68OSV8 CUynoFwjpO3qCWn1ZRdD3HXRWbs2trGUKUjjJhSpaE/D2Ser6MekP1qtWstRR6CUsPhW y3iA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=46YDQfnJdBsNGu2+jdrQ8Ybw/urHvbn8NoapNHu01ns=; b=AsDYr+hbI0rfOvMMWKkIOSRDwrfmvppV3NocpXB6MUuM/gPGY5fD9kk4zXhsqUcA4t e1MC3otE4nQESAvfWPaUewZXHyMrazW7iwYxyYmajZQKZ81btxZNcHr3zd7Ynr3xlnJy EYrMq0PC6yu7qy4WbttN2h7mZ3LduAVyePyVdHs5eDYSCF+t1xR6UsxJoTQVlM4KsYdd Wcuj4PXQ7vdMoCO+O+QPXNpPUQNUMJYvFMUgyXtXH40Her5JLz0LveP7prInJmrVlnNA llfvms5qUuYi0tYSjB1SIHFuNQGH8hEib2vMpVSDarQjahVg57zNWnhmJhLc+mzso+JU sn0Q== X-Gm-Message-State: AGi0PubKH7wrm9HfoADnHxIRdnplHQpq05UXjDypPtr8B9G8MSLAqhVp w3JJkLOsg+zBTMGtUcr/IDviEx5/lXNIvA== X-Google-Smtp-Source: APiQypLmlSq+jqwt0Pali9Nte0PL0tHBoZXwFacNvWpwFpSycULdyDnD621HfDlfSw421WN9Bijsig== X-Received: by 2002:adf:b301:: with SMTP id j1mr18774014wrd.221.1588595610543; Mon, 04 May 2020 05:33:30 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 17/39] hw/arm: versal: Add support for the RTC Date: Mon, 4 May 2020 13:32:47 +0100 Message-Id: <20200504123309.3808-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: "Edgar E. Iglesias" hw/arm: versal: Add support for the RTC. Signed-off-by: Edgar E. Iglesias Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Luc Michel Message-id: 20200427181649.26851-10-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 8 ++++++++ hw/arm/xlnx-versal.c | 21 +++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index e11693e29d3..9c9f47ba9da 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -19,6 +19,7 @@ #include "hw/char/pl011.h" #include "hw/dma/xlnx-zdma.h" #include "hw/net/cadence_gem.h" +#include "hw/rtc/xlnx-zynqmp-rtc.h" =20 #define TYPE_XLNX_VERSAL "xlnx-versal" #define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL) @@ -65,6 +66,8 @@ typedef struct Versal { struct { SDHCIState sd[XLNX_VERSAL_NR_SDS]; } iou; + + XlnxZynqMPRTC rtc; } pmc; =20 struct { @@ -89,7 +92,10 @@ typedef struct Versal { #define VERSAL_GEM1_IRQ_0 58 #define VERSAL_GEM1_WAKE_IRQ_0 59 #define VERSAL_ADMA_IRQ_0 60 +#define VERSAL_RTC_APB_ERR_IRQ 121 #define VERSAL_SD0_IRQ_0 126 +#define VERSAL_RTC_ALARM_IRQ 142 +#define VERSAL_RTC_SECONDS_IRQ 143 =20 /* Architecturally reserved IRQs suitable for virtualization. */ #define VERSAL_RSVD_IRQ_FIRST 111 @@ -143,4 +149,6 @@ typedef struct Versal { #define MM_PMC_SD0_SIZE 0x10000 #define MM_PMC_CRP 0xf1260000U #define MM_PMC_CRP_SIZE 0x10000 +#define MM_PMC_RTC 0xf12a0000 +#define MM_PMC_RTC_SIZE 0x10000 #endif diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index e263bdf77a9..321171bccef 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -240,6 +240,26 @@ static void versal_create_sds(Versal *s, qemu_irq *pic) } } =20 +static void versal_create_rtc(Versal *s, qemu_irq *pic) +{ + SysBusDevice *sbd; + MemoryRegion *mr; + + sysbus_init_child_obj(OBJECT(s), "rtc", &s->pmc.rtc, sizeof(s->pmc.rtc= ), + TYPE_XLNX_ZYNQMP_RTC); + sbd =3D SYS_BUS_DEVICE(&s->pmc.rtc); + qdev_init_nofail(DEVICE(sbd)); + + mr =3D sysbus_mmio_get_region(sbd, 0); + memory_region_add_subregion(&s->mr_ps, MM_PMC_RTC, mr); + + /* + * TODO: Connect the ALARM and SECONDS interrupts once our RTC model + * supports them. + */ + sysbus_connect_irq(sbd, 1, pic[VERSAL_RTC_APB_ERR_IRQ]); +} + /* This takes the board allocated linear DDR memory and creates aliases * for each split DDR range/aperture on the Versal address map. */ @@ -323,6 +343,7 @@ static void versal_realize(DeviceState *dev, Error **er= rp) versal_create_gems(s, pic); versal_create_admas(s, pic); versal_create_sds(s, pic); + versal_create_rtc(s, pic); versal_map_ddr(s); versal_unimp(s); =20 --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=jN6cddhLjlwwOrx5T4wiIKd+7OUeXipaks3CQjwOIzw=; b=aJ+cwOH3hDBrjHSJd3FPfy9j3VrR94oDpeTdpTYkHaZGtctFWuD0eK6ueDnhn5fLMA ALRjMz8jcIV4zOYZ5YjtzQz0lZ2MNnVpGhgLgAYzk8aYUf4okAgvTPVJDcMBCI3d7e6m NtFDbI+dzLcSCb5jVZ+zSfezeB9jnZTOYZ5sv6kcPzQBbI7pcKfKrcCD/UFTnZqyvqBW r/r/W8+rhUCKwRpGsBnUivHo6KTN56qAQMN3UIpXAkM0wcDJh64VkHYeoBed0yGC4Msj s+8PVRKwRkhWwt+iP/WA/vkRhTjHL2sUmt9s0fV6yKmvzK5s6r++jHG4TQdsQvQ7dDyW X3jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jN6cddhLjlwwOrx5T4wiIKd+7OUeXipaks3CQjwOIzw=; b=eWk4KhabBsN7Ba28eOhiGeAXC3Z7ZK3M/dUOVNDBeZOvh5bxgx39nxVsMqFvFjBr3A EszXMOUuMHQPHDkpf7E9BDlwvITGwPQNjdRGT70rNqh0ZxziYO+5tfQKbGZtAxgATY5C AyiupgLhAH23Pa/hputW5g7tYb4abZMvezRaX+Ek9U5JW6t615CN+dDOZ6jhxlUes3Qn qRI8p5Dgyjm0afTDWRW/pPCPchM94iR6qhPVsw/LHWbn85yFwjO4i1oKPrri5kbOmIfJ sIj1SlDD2GEiYnykaqPR+YAqYPZAwrIvNSR2PSATZNt2UUwV/uRPWzv+993wz38Cp3xu K2eg== X-Gm-Message-State: AGi0PuaNmiNs77zDH0mB4D1YyqbxYjdCJcLcpGO1LMetuwhZbRgSoOs5 Lz/7l30TLspkbWt2nLlZ8TvBYepV7icu3w== X-Google-Smtp-Source: APiQypKi7p+qkkeXNOsiV5oJ+NL/Vvp4TlBvsBD1QtXABCUSIyfeDWUspVThN4r1n5tvFBFDGm4Xkw== X-Received: by 2002:adf:e449:: with SMTP id t9mr7904245wrm.108.1588595611478; Mon, 04 May 2020 05:33:31 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/39] hw/arm: versal-virt: Add support for SD Date: Mon, 4 May 2020 13:32:48 +0100 Message-Id: <20200504123309.3808-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: "Edgar E. Iglesias" Add support for SD. Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Luc Michel Message-id: 20200427181649.26851-11-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- hw/arm/xlnx-versal-virt.c | 46 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index d7be1ad4942..0afee48672a 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -20,6 +20,7 @@ #include "hw/arm/sysbus-fdt.h" #include "hw/arm/fdt.h" #include "cpu.h" +#include "hw/qdev-properties.h" #include "hw/arm/xlnx-versal.h" =20 #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt") @@ -256,6 +257,32 @@ static void fdt_add_zdma_nodes(VersalVirt *s) } } =20 +static void fdt_add_sd_nodes(VersalVirt *s) +{ + const char clocknames[] =3D "clk_xin\0clk_ahb"; + const char compat[] =3D "arasan,sdhci-8.9a"; + int i; + + for (i =3D ARRAY_SIZE(s->soc.pmc.iou.sd) - 1; i >=3D 0; i--) { + uint64_t addr =3D MM_PMC_SD0 + MM_PMC_SD0_SIZE * i; + char *name =3D g_strdup_printf("/sdhci@%" PRIx64, addr); + + qemu_fdt_add_subnode(s->fdt, name); + + qemu_fdt_setprop_cells(s->fdt, name, "clocks", + s->phandle.clk_25Mhz, s->phandle.clk_25Mhz); + qemu_fdt_setprop(s->fdt, name, "clock-names", + clocknames, sizeof(clocknames)); + qemu_fdt_setprop_cells(s->fdt, name, "interrupts", + GIC_FDT_IRQ_TYPE_SPI, VERSAL_SD0_IRQ_0 + i = * 2, + GIC_FDT_IRQ_FLAGS_LEVEL_HI); + qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", + 2, addr, 2, MM_PMC_SD0_SIZE); + qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat= )); + g_free(name); + } +} + static void fdt_nop_memory_nodes(void *fdt, Error **errp) { Error *err =3D NULL; @@ -411,10 +438,23 @@ static void create_virtio_regions(VersalVirt *s) } } =20 +static void sd_plugin_card(SDHCIState *sd, DriveInfo *di) +{ + BlockBackend *blk =3D di ? blk_by_legacy_dinfo(di) : NULL; + DeviceState *card; + + card =3D qdev_create(qdev_get_child_bus(DEVICE(sd), "sd-bus"), TYPE_SD= _CARD); + object_property_add_child(OBJECT(sd), "card[*]", OBJECT(card), + &error_fatal); + qdev_prop_set_drive(card, "drive", blk, &error_fatal); + object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); +} + static void versal_virt_init(MachineState *machine) { VersalVirt *s =3D XLNX_VERSAL_VIRT_MACHINE(machine); int psci_conduit =3D QEMU_PSCI_CONDUIT_DISABLED; + int i; =20 /* * If the user provides an Operating System to be loaded, we expect th= em @@ -455,6 +495,7 @@ static void versal_virt_init(MachineState *machine) fdt_add_gic_nodes(s); fdt_add_timer_nodes(s); fdt_add_zdma_nodes(s); + fdt_add_sd_nodes(s); fdt_add_cpu_nodes(s, psci_conduit); fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz); fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz); @@ -464,6 +505,11 @@ static void versal_virt_init(MachineState *machine) memory_region_add_subregion_overlap(get_system_memory(), 0, &s->soc.fpd.apu.mr, 0); =20 + /* Plugin SD cards. */ + for (i =3D 0; i < ARRAY_SIZE(s->soc.pmc.iou.sd); i++) { + sd_plugin_card(&s->soc.pmc.iou.sd[i], drive_get_next(IF_SD)); + } + s->binfo.ram_size =3D machine->ram_size; s->binfo.loader_start =3D 0x0; s->binfo.get_dtb =3D versal_virt_get_dtb; --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596504; cv=none; d=zohomail.com; s=zohoarc; b=R6l9JKj2O/h0qabm1dim83z9pyb7GepSN+HhrTx3gmdttiUM5zNyZEuDK16eiZkewuvOgI+JbDaZoCwuXCwDSDNwQOo5dm4bNL8ZJhN2agRRvvxDEPcFiQrYbdcg4iRxa2tchPLZTYuMbBA0xwv0XJGsl4rFyl5KS+yBQLSyIZQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596504; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=w72aHgPZMgOA36un6Lhv4DDQAzkYim3so5bL3PT2h+I=; b=f7sriQq6ErNVI3g7NB2Z9F6SG5e+LSvEdp0KKEjisUm6JG6oq+NzMJV7205tKTaC1wU6c3V2x0Cp750cToQs+wpB7F9BQXLoSvbNzcTrQQEjX4JXGX2VhaQJgShSOrtAJVcJvDm6cjFVdoY412/CUqJbs0pEI3ZuSCE8pl9E7vw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596504711639.0506383560881; Mon, 4 May 2020 05:48:24 -0700 (PDT) Received: from localhost ([::1]:39706 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaWF-00024v-Bn for importer@patchew.org; Mon, 04 May 2020 08:48:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56508) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHv-0000Pq-I0 for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:35 -0400 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]:45997) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHu-00013x-Jp for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:35 -0400 Received: by mail-wr1-x42b.google.com with SMTP id k1so1831667wro.12 for ; Mon, 04 May 2020 05:33:34 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.31 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=w72aHgPZMgOA36un6Lhv4DDQAzkYim3so5bL3PT2h+I=; b=KAGJjtEbhGnOGh4/ouaIIP+RwQ2P5YDzKQGjyD8J2bQ/UE+su28WTSOt45D6w16e82 8CU7rI1IOPhTDlesP6GJ4pFwBgWRIJC+TpfFxQ0FRCUPb+Wp612VYbk/85p279sOjXOy M0oG2ooOX02leiFDiuoZPZZG2MzpYOStonR1XSuE7FXU4uUoRSwY9KbWaja905+BkCau 9yJG+BykhQrz9CC/sQ/IF8aQRL7xFgZi6NQMw+G00B5NlzAmtPV8jRfoJKckS3lehhAI b9V2ZIBvxXS3Na7GHfjWMOcp/2gUErBCw9XCuaUeYETuZMxK/rgxkrwPUGdgX1x8UbPn /eFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=w72aHgPZMgOA36un6Lhv4DDQAzkYim3so5bL3PT2h+I=; b=oVdi7aMpzmqHPdsagfwfnEqzCIAFQH/Eiaf1+yqmxq+nlplOVfCPLwb8KmGXyE1Xik kYjexOHXGjWIX0LGuqejltJrNLoGdKaAqF9fXxlVpbEEIAYeGPC3N4JDInD0+Sng0J4h DmKWAEy8kNUyDKAFwqx/uLJQaniv2EDw4R0RxA5wUZhDToN1Sej8um9PhLf9CV6WcOXS EJwBQO8wA+2yTlwkZMcFOXVqJyiytT5iEIj1Fb2KDLdxgk0iSoF8ONyzSmSYRytcY2nl y49rzpLh4zlLnlLEYiBNdAjgDv1O6eh54b2UbWisKv683ellha8XCwa+akSFvh6TBxQH 1uEA== X-Gm-Message-State: AGi0PuaMbqHzT7XjE4mu24LWb9UZmB8nhM/HALu+xjg5NbwoChEhsmjx UwIm6SSL+dw8qfqGizeoQ4G1Zw5OwLKGwA== X-Google-Smtp-Source: APiQypI15IHgOCbknECrxLT6GrMsn4/KGCCN00nV0ovak5Mn5DrfqwaMdqln5e1rqRmFUw3pQwz/dg== X-Received: by 2002:adf:ce02:: with SMTP id p2mr18844288wrn.173.1588595613001; Mon, 04 May 2020 05:33:33 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 19/39] hw/arm: versal-virt: Add support for the RTC Date: Mon, 4 May 2020 13:32:49 +0100 Message-Id: <20200504123309.3808-20-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: "Edgar E. Iglesias" Add support for the RTC. Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Luc Michel Message-id: 20200427181649.26851-12-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- hw/arm/xlnx-versal-virt.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 0afee48672a..7e749e19267 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -283,6 +283,27 @@ static void fdt_add_sd_nodes(VersalVirt *s) } } =20 +static void fdt_add_rtc_node(VersalVirt *s) +{ + const char compat[] =3D "xlnx,zynqmp-rtc"; + const char interrupt_names[] =3D "alarm\0sec"; + char *name =3D g_strdup_printf("/rtc@%x", MM_PMC_RTC); + + qemu_fdt_add_subnode(s->fdt, name); + + qemu_fdt_setprop_cells(s->fdt, name, "interrupts", + GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_ALARM_IRQ, + GIC_FDT_IRQ_FLAGS_LEVEL_HI, + GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_SECONDS_IRQ, + GIC_FDT_IRQ_FLAGS_LEVEL_HI); + qemu_fdt_setprop(s->fdt, name, "interrupt-names", + interrupt_names, sizeof(interrupt_names)); + qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", + 2, MM_PMC_RTC, 2, MM_PMC_RTC_SIZE); + qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat)); + g_free(name); +} + static void fdt_nop_memory_nodes(void *fdt, Error **errp) { Error *err =3D NULL; @@ -496,6 +517,7 @@ static void versal_virt_init(MachineState *machine) fdt_add_timer_nodes(s); fdt_add_zdma_nodes(s); fdt_add_sd_nodes(s); + fdt_add_rtc_node(s); fdt_add_cpu_nodes(s, psci_conduit); fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz); fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz); --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596626; cv=none; d=zohomail.com; s=zohoarc; b=gugU76pTozas4BUEQ37yKVc3XxH4pg4IayPnvvnQovUBb7M0L/YsGz2stSGj8TFqfkI/vE1SYG7S8gsZaQ4kvi9CQdWXcg1PgT3sDP9XkCBG6DNda0Nx7vrqnDNDyDwaobbpXmAzN/VrihxO0S4aPR6Kyu1btjCbMqp44mmJy7Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596626; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=OQuyuhA5Gt5NXmOvC0CG9mRkAQzrDpARfPtObF83Cnw=; b=GG3bBbe54Xi5w5o7sTkDE24fL06tqhoittzsXPARRlixOiMp3uxeqcz65tcGo2MoONHWII1x4tvklY/25u0xx5v/Dpz4VGCGMKq/e2CRGTbh8q7kCeWjK5fi4iD5YB8i70pAZ0esH8mlOM/uMnbY4e7cu7fzGKe/35BwTEyDAVc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596626139218.31732157672718; Mon, 4 May 2020 05:50:26 -0700 (PDT) Received: from localhost ([::1]:48200 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaYC-0005Xz-Fz for importer@patchew.org; Mon, 04 May 2020 08:50:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56516) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHw-0000SJ-BX for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:36 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]:41089) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHv-00016o-IR for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:36 -0400 Received: by mail-wr1-x42e.google.com with SMTP id g13so20678907wrb.8 for ; Mon, 04 May 2020 05:33:35 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=OQuyuhA5Gt5NXmOvC0CG9mRkAQzrDpARfPtObF83Cnw=; b=Z3kJ4k9bqgH9YtrIidRomrEhNiaf+Kw4S/jYqIxxcZdnFKqE7WBl/WatMcdTbP8fbd LhFjHka25R6y6Ivei1+TiUZLWOzRv3roPgKRHIoc08uDMLpSqdrVZld8fS+jKSpamMMu Rb3huL7l0jvHFKLW7Dt1CMITeisz++f3bbyuDrHkvYVYsu+jbTEw9+OGEFOarkx9QdxJ dN8fKGuKsvUmOQqwcl4pmN9NN0VWnqk0LXQ1NV71xifwIM9LaQwub3oVHp+TFn2lBE45 oARMI6QSPuvdKj7mSs3bbpowPiHXK4wh0EEo2w8pTF4vgB//JoQP8MxDEZWi/yIFrVhU b0tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OQuyuhA5Gt5NXmOvC0CG9mRkAQzrDpARfPtObF83Cnw=; b=dq2gLyVLJvhVJmriBsJQIYWWNerYoomEVxQQntApxir30vCReHWaa9X2mszhGjpK43 0W0MDPftXPP+3rexJBBp3P3d/2VupdLAswCPG+6pyRQjbp3on78Y5t6TnqYfcsTmp/tg 6ntddVqkx9b9Y86Xx7v2HbAv8CQPXTnV8YQ/uzidDBn56ME+yWuLOLE+2f8zXjiN3ECj dez7++C3Ixnt8FdQXMEtoziamg/K1tVfP5BjGGUigk3Z/MnJLoCBaVARdnSL6sVD7PlQ gncl2H7AuVVu3E5FtxEPJ6J0g0XkXWdldEUmb7Mmz0glbV5hZUloATVSkWIWE4xzQYzy Pr7Q== X-Gm-Message-State: AGi0PuYsQ447Uh3SKabeqbQaoV52XOYUfBile4ru0BIlQNl23fU55V96 jJrLbj2SqBhOxdq9GLaDr1G9aoy1O3D8vg== X-Google-Smtp-Source: APiQypLhuMKYmUv9IGwaEAXidgi+rQyEk719z7ISVar9MNQ6566oATfc6+cTi02gG0KtI0Xt/JQUrw== X-Received: by 2002:a5d:6a8b:: with SMTP id s11mr18628611wru.258.1588595613924; Mon, 04 May 2020 05:33:33 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 20/39] target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check Date: Mon, 4 May 2020 13:32:50 +0100 Message-Id: <20200504123309.3808-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Somewhere along theline we accidentally added a duplicate "using D16-D31 when they don't exist" check to do_vfm_dp() (probably an artifact of a patchseries rebase). Remove it. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200430181003.21682-2-peter.maydell@linaro.org --- target/arm/translate-vfp.inc.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index b087bbd812e..e1a90175983 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -1872,12 +1872,6 @@ static bool do_vfm_dp(DisasContext *s, arg_VFMA_dp *= a, bool neg_n, bool neg_d) return false; } =20 - /* UNDEF accesses to D16-D31 if they don't exist. */ - if (!dc_isar_feature(aa32_simd_r32, s) && - ((a->vd | a->vn | a->vm) & 0x10)) { - return false; - } - if (!vfp_access_check(s)) { return true; } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596157; cv=none; d=zohomail.com; s=zohoarc; b=RWWbbs+hPdNCeZtrJuOrR4EIFOS4Xu3zN7U51RfJ56SRmCNC+tKM91gdoawaYyipLUIBh8ZPQRz1JUyyGnCR5Z3QIOBQRYprMwrRMkwZBFLDBGFG6VnrkRXUWBH8y7JDMQ/8ehGKCJW53WHaxsoPxjIpTPSk61aVmgWdxRcIJio= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596157; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=8dAcnSfr5sUHRwiXoBAzSe47pKA2tc++F2fTPLGKuZc=; b=TevIYZpNYmnG/KZNl92HB0/EaDihe6kJao8yNxDh/4hnoQS3qh3dnlsjQxaYJIP/6Vr5NrlHDHZtr2eqARRn4DksDqYptOzqWiTF6rMKsXaQzy6mQqIdjVFFjM3xBVwcTlhMmmRFIVfPzJVVxC8kC6+XQ9pQRTzhzPUS2Y/DEAk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596157698213.27559017295528; Mon, 4 May 2020 05:42:37 -0700 (PDT) Received: from localhost ([::1]:44638 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaQe-0000x2-3e for importer@patchew.org; Mon, 04 May 2020 08:42:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56544) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaI0-0000cm-ED for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:40 -0400 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:51205) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHz-00017o-IY for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:40 -0400 Received: by mail-wm1-x344.google.com with SMTP id x4so8238188wmj.1 for ; Mon, 04 May 2020 05:33:39 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=8dAcnSfr5sUHRwiXoBAzSe47pKA2tc++F2fTPLGKuZc=; b=KUAJ6LrQIc/3hRb7Q5ezT5UdYRXNEI6+mGwtE/D62DShNRH4cj2moHETCcNW/fiDcv XG3LzMfOu+dhsWXCkoMQQRU7Se5tPK8M5q4XOM3mPnNOMYr798Vj50vnYc8nFtyUYQeQ DEm+S9BkGIRvxuk6tHZluR7prfWewVqBe98UiHlIS2VbbdPpiCCeIoP8biN+m1xVd1wH S1mYliiVDf49YUPw8I8jpUCyfzpC+2knouN18Z+Ejfdiq4He50R3bSXrlrHJG6BI0AM8 +Sy9mnwNFHabI1H2GtE/M/2BZaD4gyJMfQcQBIiQ9PQ2eshQ2ArPQjGX6Snh1+NMUfbO LqpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8dAcnSfr5sUHRwiXoBAzSe47pKA2tc++F2fTPLGKuZc=; b=iQRBkcOa77UNp1ZRwYQ9/tdaUUZ0AeuMv48XNuqetAdd7F4gZCvGyIbySoLUb7E3DF g9HW26DkiVEAhS+46n2R4g+w6ddbajZoMakt6R4CfTZAJR4KzCkiAhz053V+lC/kQbal XouacnXtOBZQPqYHga6I69m/VfEfqU6TSO3hoglwOgrKVvwGBma8+NRVvMF3bpHbnLkS uobg3bEYJL2RcLEFU9tgl3f6u+WpZ9gIb1kI3slCC9bOGF8rggUQJPaLtWGn2/VdSCiY oeqLiG8HD7Odu5uO9vfple6IIOddruK5SD9XSze19uCkd5dDRGIGbnEQxhugz8s3aYKa zJSQ== X-Gm-Message-State: AGi0PuYzCDnoDelmaOya6igkGJwyZGKGsY46lYtOzna6U2VTEKO+mjBc 28ZgsqE5PydTEsBZBmu7XCw2dUMTTeZ0Fg== X-Google-Smtp-Source: APiQypKG7wUF3wsbfOBigr5F2AFbZZiNTNUHPIjKLlaaWkvw7JQsrBzNrEYmnHrV/M9Gx4Y9WJU3BQ== X-Received: by 2002:a1c:a794:: with SMTP id q142mr14327206wme.4.1588595615024; Mon, 04 May 2020 05:33:35 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 21/39] target/arm: Don't allow Thumb Neon insns without FEATURE_NEON Date: Mon, 4 May 2020 13:32:51 +0100 Message-Id: <20200504123309.3808-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) We were accidentally permitting decode of Thumb Neon insns even if the CPU didn't have the FEATURE_NEON bit set, because the feature check was being done before the call to disas_neon_data_insn() and disas_neon_ls_insn() in the Arm decoder but was omitted from the Thumb decoder. Push the feature bit check down into the called functions so it is done for both Arm and Thumb encodings. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200430181003.21682-3-peter.maydell@linaro.org --- target/arm/translate.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index e3fc7924428..4cf5267be00 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3258,6 +3258,10 @@ static int disas_neon_ls_insn(DisasContext *s, uint3= 2_t insn) TCGv_i32 tmp2; TCGv_i64 tmp64; =20 + if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { + return 1; + } + /* FIXME: this access check should not take precedence over UNDEF * for invalid encodings; we will generate incorrect syndrome informat= ion * for attempts to execute invalid vfp/neon encodings with FP disabled. @@ -5002,6 +5006,10 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) TCGv_ptr ptr1, ptr2, ptr3; TCGv_i64 tmp64; =20 + if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { + return 1; + } + /* FIXME: this access check should not take precedence over UNDEF * for invalid encodings; we will generate incorrect syndrome informat= ion * for attempts to execute invalid vfp/neon encodings with FP disabled. @@ -10948,10 +10956,6 @@ static void disas_arm_insn(DisasContext *s, unsign= ed int insn) =20 if (((insn >> 25) & 7) =3D=3D 1) { /* NEON Data processing. */ - if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { - goto illegal_op; - } - if (disas_neon_data_insn(s, insn)) { goto illegal_op; } @@ -10959,10 +10963,6 @@ static void disas_arm_insn(DisasContext *s, unsign= ed int insn) } if ((insn & 0x0f100000) =3D=3D 0x04000000) { /* NEON load/store. */ - if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { - goto illegal_op; - } - if (disas_neon_ls_insn(s, insn)) { goto illegal_op; } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596236; cv=none; d=zohomail.com; s=zohoarc; b=iLPuMLmO8WDn2pW7MUMbTcFv5eKOxIG0nZfzIsgeLOhnD/2AxWdJofCyf/hoSW0za35kIQaK5PmFNrJ/zDZeUDHX/avoK3gTYq8kBZTxgFpRmwql7s0OVg0pCdFpoaLgddkwLdF3wsCnhx3cYBImW/sDIigaZbHgCNiadqN3S34= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596236; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=4YQ/rTjV1fP71MbbXsuZqGDm+GOeiBgK+8+e4T5Y2mw=; b=k8A4OUzEXfpjrEhgK5tREFuhjTRiXiKmxNYoRE8LDBYLw22aIPZgbivlPCMyzsdLgJf2m8FJ3b2HaBL/Qw9ymS/YpRnTaDARBx9nYTXPoFFNSypG0qrg5bQNtw+AjuLUa1Arg8YO2zdvD0JtxrOgoZO6rczyYtCGd6UoyA2GXcA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596236452955.2596502153414; Mon, 4 May 2020 05:43:56 -0700 (PDT) Received: from localhost ([::1]:50182 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaRt-0003C3-Hs for importer@patchew.org; Mon, 04 May 2020 08:43:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56536) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaHz-0000bF-ND for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:39 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:50440) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHy-00017a-8G for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:39 -0400 Received: by mail-wm1-x335.google.com with SMTP id x25so8240574wmc.0 for ; Mon, 04 May 2020 05:33:37 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=4YQ/rTjV1fP71MbbXsuZqGDm+GOeiBgK+8+e4T5Y2mw=; b=ItlmCKE6HuyxbLOBDQy63EFSNb6tPGbOWDfW1Ul28nRbl6iD0Dp8D6RT4IazuITu6j QY/8sEfbcCbwqmOPg6+WPYYDoBGUytZqhzanmNxQUZzzcxbxTZnmOhkQs8f9LU59LUdl 7XlJMo+ckHY/sq2TIt4YsdK/AMeZGiA9jkL6d7hNPlyxbc9wu2bpi+CJztXenOBjT3xb e8Us5JpOQKSbIqgVi3IqauOWhrSJxhj62M/rH2eqNizcrCvFWlmH7saX/OJ8JpppZy6Y krMw8DF9JFIHHnq95L+g6+u7GUHfgUQmYhasb+yUW2dSQ6vD1FTjbYar0FNaoORFMmPS 9hZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4YQ/rTjV1fP71MbbXsuZqGDm+GOeiBgK+8+e4T5Y2mw=; b=GokBD9XMfmuELmVpaOGXKnk8HDUmNKx699xHPF0oVRLWfAKVlJxdE0gkCxkmJiv8Dz wZNhkDU6ImjjwdnLWIu2hXW+PedViQOm6//Pcyc0PuCw3kXC5cuEvrUpcy2tBmkfh40d YiNrr6VhuyniocMjv1suURB0jj6k3N4IUcsbR7Dgm2YgNDUA2RniypUOnPolccyyuZ/x BVi4oT2QUDL5YMG8GvwjATQl+mGqc1iUbbOWfUHyYVkejf97YfrKOzWtIkDAZzd/BnoX vKIt2+bMt6SSJCflQgFlOV7Y0UR40rRk4EiAfFPQ3BtX6lEmhSe7yWwR7Y9Hi7AZLcdk Trfg== X-Gm-Message-State: AGi0PuYEJOq3hcQLK4gQp/3vo8FdXBLYTMdluHuH6mvIq5Zv2+U0Vp43 6Zmj13BGT2vNvOadG3SY8oS2weDWseIxfw== X-Google-Smtp-Source: APiQypKkG5FtAEWFJD1ga6WJsC/w/MHrK47oEBPX1JXfcubtu9Ry22CxcnbFRa0IdR1gAWyWIuobEg== X-Received: by 2002:a1c:3986:: with SMTP id g128mr14146102wma.8.1588595616178; Mon, 04 May 2020 05:33:36 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 22/39] target/arm: Add stubs for AArch32 Neon decodetree Date: Mon, 4 May 2020 13:32:52 +0100 Message-Id: <20200504123309.3808-23-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Add the infrastructure for building and invoking a decodetree decoder for the AArch32 Neon encodings. At the moment the new decoder covers nothing, so we always fall back to the existing hand-written decode. We follow the same pattern we did for the VFP decodetree conversion (commit 78e138bc1f672c145ef6ace74617d and following): code that deals with Neon will be moving gradually out to translate-neon.vfp.inc, which we #include into translate.c. In order to share the decode files between A32 and T32, we split Neon into 3 parts: * data-processing * load-store * 'shared' encodings The first two groups of instructions have similar but not identical A32 and T32 encodings, so we need to manually transform the T32 encoding into the A32 one before calling the decoder; the third group covers the Neon instructions which are identical in A32 and T32. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-4-peter.maydell@linaro.org --- target/arm/neon-dp.decode | 29 ++++++++++++++++++++++++++ target/arm/neon-ls.decode | 29 ++++++++++++++++++++++++++ target/arm/neon-shared.decode | 27 +++++++++++++++++++++++++ target/arm/translate-neon.inc.c | 32 +++++++++++++++++++++++++++++ target/arm/translate.c | 36 +++++++++++++++++++++++++++++++-- target/arm/Makefile.objs | 18 +++++++++++++++++ 6 files changed, 169 insertions(+), 2 deletions(-) create mode 100644 target/arm/neon-dp.decode create mode 100644 target/arm/neon-ls.decode create mode 100644 target/arm/neon-shared.decode create mode 100644 target/arm/translate-neon.inc.c diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode new file mode 100644 index 00000000000..c89a1a58591 --- /dev/null +++ b/target/arm/neon-dp.decode @@ -0,0 +1,29 @@ +# AArch32 Neon data-processing instruction descriptions +# +# Copyright (c) 2020 Linaro, Ltd +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . + +# +# This file is processed by scripts/decodetree.py +# + +# Encodings for Neon data processing instructions where the T32 encoding +# is a simple transformation of the A32 encoding. +# More specifically, this file covers instructions where the A32 encoding = is +# 0b1111_001p_qqqq_qqqq_qqqq_qqqq_qqqq_qqqq +# and the T32 encoding is +# 0b111p_1111_qqqq_qqqq_qqqq_qqqq_qqqq_qqqq +# This file works on the A32 encoding only; calling code for T32 has to +# transform the insn into the A32 version first. diff --git a/target/arm/neon-ls.decode b/target/arm/neon-ls.decode new file mode 100644 index 00000000000..2b16c9256df --- /dev/null +++ b/target/arm/neon-ls.decode @@ -0,0 +1,29 @@ +# AArch32 Neon load/store instruction descriptions +# +# Copyright (c) 2020 Linaro, Ltd +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . + +# +# This file is processed by scripts/decodetree.py +# + +# Encodings for Neon load/store instructions where the T32 encoding +# is a simple transformation of the A32 encoding. +# More specifically, this file covers instructions where the A32 encoding = is +# 0b1111_0100_xxx0_xxxx_xxxx_xxxx_xxxx_xxxx +# and the T32 encoding is +# 0b1111_1001_xxx0_xxxx_xxxx_xxxx_xxxx_xxxx +# This file works on the A32 encoding only; calling code for T32 has to +# transform the insn into the A32 version first. diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode new file mode 100644 index 00000000000..3aea7c5e188 --- /dev/null +++ b/target/arm/neon-shared.decode @@ -0,0 +1,27 @@ +# AArch32 Neon instruction descriptions +# +# Copyright (c) 2020 Linaro, Ltd +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . + +# +# This file is processed by scripts/decodetree.py +# + +# Encodings for Neon instructions whose encoding is the same for +# both A32 and T32. + +# More specifically, this covers: +# 2reg scalar ext: 0b1111_1110_xxxx_xxxx_xxxx_1x0x_xxxx_xxxx +# 3same ext: 0b1111_110x_xxxx_xxxx_xxxx_1x0x_xxxx_xxxx diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c new file mode 100644 index 00000000000..a33e81ba3ab --- /dev/null +++ b/target/arm/translate-neon.inc.c @@ -0,0 +1,32 @@ +/* + * ARM translation: AArch32 Neon instructions + * + * Copyright (c) 2003 Fabrice Bellard + * Copyright (c) 2005-2007 CodeSourcery + * Copyright (c) 2007 OpenedHand, Ltd. + * Copyright (c) 2020 Linaro, Ltd. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +/* + * This file is intended to be included from translate.c; it uses + * some macros and definitions provided by that file. + * It might be possible to convert it to a standalone .c file eventually. + */ + +/* Include the generated Neon decoder */ +#include "decode-neon-dp.inc.c" +#include "decode-neon-ls.inc.c" +#include "decode-neon-shared.inc.c" diff --git a/target/arm/translate.c b/target/arm/translate.c index 4cf5267be00..5a82a56e8ed 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1313,8 +1313,9 @@ static TCGv_ptr vfp_reg_ptr(bool dp, int reg) =20 #define ARM_CP_RW_BIT (1 << 20) =20 -/* Include the VFP decoder */ +/* Include the VFP and Neon decoders */ #include "translate-vfp.inc.c" +#include "translate-neon.inc.c" =20 static inline void iwmmxt_load_reg(TCGv_i64 var, int reg) { @@ -10949,7 +10950,10 @@ static void disas_arm_insn(DisasContext *s, unsign= ed int insn) /* Unconditional instructions. */ /* TODO: Perhaps merge these into one decodetree output file. */ if (disas_a32_uncond(s, insn) || - disas_vfp_uncond(s, insn)) { + disas_vfp_uncond(s, insn) || + disas_neon_dp(s, insn) || + disas_neon_ls(s, insn) || + disas_neon_shared(s, insn)) { return; } /* fall back to legacy decoder */ @@ -11102,6 +11106,33 @@ static void disas_thumb2_insn(DisasContext *s, uin= t32_t insn) ARCH(6T2); } =20 + if ((insn & 0xef000000) =3D=3D 0xef000000) { + /* + * T32 encodings 0b111p_1111_qqqq_qqqq_qqqq_qqqq_qqqq_qqqq + * transform into + * A32 encodings 0b1111_001p_qqqq_qqqq_qqqq_qqqq_qqqq_qqqq + */ + uint32_t a32_insn =3D (insn & 0xe2ffffff) | + ((insn & (1 << 28)) >> 4) | (1 << 28); + + if (disas_neon_dp(s, a32_insn)) { + return; + } + } + + if ((insn & 0xff100000) =3D=3D 0xf9000000) { + /* + * T32 encodings 0b1111_1001_ppp0_qqqq_qqqq_qqqq_qqqq_qqqq + * transform into + * A32 encodings 0b1111_0100_ppp0_qqqq_qqqq_qqqq_qqqq_qqqq + */ + uint32_t a32_insn =3D (insn & 0x00ffffff) | 0xf4000000; + + if (disas_neon_ls(s, a32_insn)) { + return; + } + } + /* * TODO: Perhaps merge these into one decodetree output file. * Note disas_vfp is written for a32 with cond field in the @@ -11109,6 +11140,7 @@ static void disas_thumb2_insn(DisasContext *s, uint= 32_t insn) */ if (disas_t32(s, insn) || disas_vfp_uncond(s, insn) || + disas_neon_shared(s, insn) || ((insn >> 28) =3D=3D 0xe && disas_vfp(s, insn))) { return; } diff --git a/target/arm/Makefile.objs b/target/arm/Makefile.objs index cf26c16f5f6..775b3e24f22 100644 --- a/target/arm/Makefile.objs +++ b/target/arm/Makefile.objs @@ -18,6 +18,21 @@ target/arm/decode-sve.inc.c: $(SRC_PATH)/target/arm/sve.= decode $(DECODETREE) $(PYTHON) $(DECODETREE) --decode disas_sve -o $@ $<,\ "GEN", $(TARGET_DIR)$@) =20 +target/arm/decode-neon-shared.inc.c: $(SRC_PATH)/target/arm/neon-shared.de= code $(DECODETREE) + $(call quiet-command,\ + $(PYTHON) $(DECODETREE) --static-decode disas_neon_shared -o $@ $<,\ + "GEN", $(TARGET_DIR)$@) + +target/arm/decode-neon-dp.inc.c: $(SRC_PATH)/target/arm/neon-dp.decode $(D= ECODETREE) + $(call quiet-command,\ + $(PYTHON) $(DECODETREE) --static-decode disas_neon_dp -o $@ $<,\ + "GEN", $(TARGET_DIR)$@) + +target/arm/decode-neon-ls.inc.c: $(SRC_PATH)/target/arm/neon-ls.decode $(D= ECODETREE) + $(call quiet-command,\ + $(PYTHON) $(DECODETREE) --static-decode disas_neon_ls -o $@ $<,\ + "GEN", $(TARGET_DIR)$@) + target/arm/decode-vfp.inc.c: $(SRC_PATH)/target/arm/vfp.decode $(DECODETRE= E) $(call quiet-command,\ $(PYTHON) $(DECODETREE) --static-decode disas_vfp -o $@ $<,\ @@ -49,6 +64,9 @@ target/arm/decode-t16.inc.c: $(SRC_PATH)/target/arm/t16.d= ecode $(DECODETREE) "GEN", $(TARGET_DIR)$@) =20 target/arm/translate-sve.o: target/arm/decode-sve.inc.c +target/arm/translate.o: target/arm/decode-neon-shared.inc.c +target/arm/translate.o: target/arm/decode-neon-dp.inc.c +target/arm/translate.o: target/arm/decode-neon-ls.inc.c target/arm/translate.o: target/arm/decode-vfp.inc.c target/arm/translate.o: target/arm/decode-vfp-uncond.inc.c target/arm/translate.o: target/arm/decode-a32.inc.c --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.36 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=U1VGbGb5OGUA76fGkqiO2EtBFxkWpDuv98F+IatFsmo=; b=gL9bvqa5WgjKvzTXlIhaNvdgigpzz9fdXOM8TLp5pnwACgiax+N7X9h1D9ih3AByKC ulSZRSs2PUAc1bdjMci2nnG6NFOpSri24ZLH8/aFpLHP4CSP7lBDXGeQzJmGZZLu32o8 JP7/2gsxcEGGBUw17Fs2oQke65S7eLm7RsWRZteUDfQrnZ3ocosFybZlXGZeFIKI6TOn BD2njpwlezomoTzKW9gNWIpT/siYwnbVyooJw+V7OANZ21zB5Q6fI4+XbbqvjBouO3kh Rc+RMzs3MhTBPf0HzyUYuWJIG13pc5DvF0dsP3Qv/iSBh5fiqr2Q3nlRIKdILkYmCjlJ 0Dpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=U1VGbGb5OGUA76fGkqiO2EtBFxkWpDuv98F+IatFsmo=; b=itc6navL+pMdWYZcjL3ZdpAcKBHQAMIbR4+hHaoFgt1IwEOm9XvAZ8fqncmDSS3UdF 3Nt3i37C5fNT8B8R7RCiA4Gg+jJUETOBZKpMxvylXHJQJcskfOgpldIGGRTuiOcHhTyR L9Ax4bJQfRcjtoIl6VbmS+kfgxWxO/oVG23vygWe43Mz7uekeQQSSkiJ/uqH0zc3iXP9 QSEX+40lGI2fpn9jkKcnCbA42282Uz6g35s3BpEPtxwKQmFFPrYktHrdnaUdzvO6mBhy cyC/Gg7NvRvcE10dqRa4Y1h+tmq9x/e3GOvuf0GDAyFY/rToHAGV+NY4DvpjpIpc1ve9 sbUA== X-Gm-Message-State: AGi0PuZ+AlaFtY+BSprj2Lb49VMCDfYjZab6vOf+MYynxLRKKaRcCMjg 6/yEZuYziiwxNdzeOkA06oBWQQzadaZB3w== X-Google-Smtp-Source: APiQypIXYcEB1za13LupqBvfwfxNgyo0lQHZ4fa9LRKpRpsyQ/U6vGdhgpNOgufUN3CTQ52TFgZ7VQ== X-Received: by 2002:adf:9482:: with SMTP id 2mr18029013wrr.328.1588595617079; Mon, 04 May 2020 05:33:37 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 23/39] target/arm: Convert VCMLA (vector) to decodetree Date: Mon, 4 May 2020 13:32:53 +0100 Message-Id: <20200504123309.3808-24-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the VCMLA (vector) insns in the 3same extension group to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-5-peter.maydell@linaro.org --- target/arm/neon-shared.decode | 11 ++++++++++ target/arm/translate-neon.inc.c | 37 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 11 +--------- 3 files changed, 49 insertions(+), 10 deletions(-) diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode index 3aea7c5e188..d1d707a56d5 100644 --- a/target/arm/neon-shared.decode +++ b/target/arm/neon-shared.decode @@ -25,3 +25,14 @@ # More specifically, this covers: # 2reg scalar ext: 0b1111_1110_xxxx_xxxx_xxxx_1x0x_xxxx_xxxx # 3same ext: 0b1111_110x_xxxx_xxxx_xxxx_1x0x_xxxx_xxxx + +# VFP/Neon register fields; same as vfp.decode +%vm_dp 5:1 0:4 +%vm_sp 0:4 5:1 +%vn_dp 7:1 16:4 +%vn_sp 16:4 7:1 +%vd_dp 22:1 12:4 +%vd_sp 12:4 22:1 + +VCMLA 1111 110 rot:2 . 1 size:1 .... .... 1000 . q:1 . 0 .... \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index a33e81ba3ab..0baae1338a3 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -30,3 +30,40 @@ #include "decode-neon-dp.inc.c" #include "decode-neon-ls.inc.c" #include "decode-neon-shared.inc.c" + +static bool trans_VCMLA(DisasContext *s, arg_VCMLA *a) +{ + int opr_sz; + TCGv_ptr fpst; + gen_helper_gvec_3_ptr *fn_gvec_ptr; + + if (!dc_isar_feature(aa32_vcma, s) + || (!a->size && !dc_isar_feature(aa32_fp16_arith, s))) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vn | a->vm | a->vd) & a->q) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + opr_sz =3D (1 + a->q) * 8; + fpst =3D get_fpstatus_ptr(1); + fn_gvec_ptr =3D a->size ? gen_helper_gvec_fcmlas : gen_helper_gvec_fcm= lah; + tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd), + vfp_reg_offset(1, a->vn), + vfp_reg_offset(1, a->vm), + fpst, opr_sz, opr_sz, a->rot, + fn_gvec_ptr); + tcg_temp_free_ptr(fpst); + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 5a82a56e8ed..ae6799c6ae0 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7048,16 +7048,7 @@ static int disas_neon_insn_3same_ext(DisasContext *s= , uint32_t insn) bool is_long =3D false, q =3D extract32(insn, 6, 1); bool ptr_is_env =3D false; =20 - if ((insn & 0xfe200f10) =3D=3D 0xfc200800) { - /* VCMLA -- 1111 110R R.1S .... .... 1000 ...0 .... */ - int size =3D extract32(insn, 20, 1); - data =3D extract32(insn, 23, 2); /* rot */ - if (!dc_isar_feature(aa32_vcma, s) - || (!size && !dc_isar_feature(aa32_fp16_arith, s))) { - return 1; - } - fn_gvec_ptr =3D size ? gen_helper_gvec_fcmlas : gen_helper_gvec_fc= mlah; - } else if ((insn & 0xfea00f10) =3D=3D 0xfc800800) { + if ((insn & 0xfea00f10) =3D=3D 0xfc800800) { /* VCADD -- 1111 110R 1.0S .... .... 1000 ...0 .... */ int size =3D extract32(insn, 20, 1); data =3D extract32(insn, 24, 1); /* rot */ --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596019; cv=none; d=zohomail.com; s=zohoarc; b=XhXytFUIzzplTmJl0JH0AIixQyUO5caFvcGiXrRi9ZJtiiT8RSZsnR9mvn7iOf0tGHppACMfjMiXdkLYDNPr1VAqpIotOp6le+vek19QkkwqoWnHxG29enu2/LgTMf2jzBCVfqc2257bP5F6QOE+jcYNNTGPQdLBiSROEEZYET8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596019; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=r8WeYE67ChhiW5m6qJC3n2A7tJXvKOPChfTDBZgi+DQ=; b=lQtP35bXIhE8Ouivwse/sB+TI29NyqhoowlgVc9scjou0SYZzXRKRAPzGvXnRskMR9Fx4ac3L16ARyWw/X6lJ4OjLlUFxWi35aCcZ693DB1R7nftmr250M1NFx7F/xpo2q6/i4MCeVAc9QXdNLapfyPEWATPOxf/vVl7wsgAwZw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596019037914.437786397369; Mon, 4 May 2020 05:40:19 -0700 (PDT) Received: from localhost ([::1]:33472 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaOP-0003zI-O4 for importer@patchew.org; Mon, 04 May 2020 08:40:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56550) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaI1-0000eM-1p for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:41 -0400 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]:41095) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaHz-00017q-Nz for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:40 -0400 Received: by mail-wr1-x433.google.com with SMTP id g13so20679228wrb.8 for ; Mon, 04 May 2020 05:33:39 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the VCADD (vector) insns to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-6-peter.maydell@linaro.org --- target/arm/neon-shared.decode | 3 +++ target/arm/translate-neon.inc.c | 37 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 11 +--------- 3 files changed, 41 insertions(+), 10 deletions(-) diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode index d1d707a56d5..ed65dae1809 100644 --- a/target/arm/neon-shared.decode +++ b/target/arm/neon-shared.decode @@ -36,3 +36,6 @@ =20 VCMLA 1111 110 rot:2 . 1 size:1 .... .... 1000 . q:1 . 0 .... \ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp + +VCADD 1111 110 rot:1 1 . 0 size:1 .... .... 1000 . q:1 . 0 .... \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 0baae1338a3..28011e88d9e 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -67,3 +67,40 @@ static bool trans_VCMLA(DisasContext *s, arg_VCMLA *a) tcg_temp_free_ptr(fpst); return true; } + +static bool trans_VCADD(DisasContext *s, arg_VCADD *a) +{ + int opr_sz; + TCGv_ptr fpst; + gen_helper_gvec_3_ptr *fn_gvec_ptr; + + if (!dc_isar_feature(aa32_vcma, s) + || (!a->size && !dc_isar_feature(aa32_fp16_arith, s))) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vn | a->vm | a->vd) & a->q) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + opr_sz =3D (1 + a->q) * 8; + fpst =3D get_fpstatus_ptr(1); + fn_gvec_ptr =3D a->size ? gen_helper_gvec_fcadds : gen_helper_gvec_fca= ddh; + tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd), + vfp_reg_offset(1, a->vn), + vfp_reg_offset(1, a->vm), + fpst, opr_sz, opr_sz, a->rot, + fn_gvec_ptr); + tcg_temp_free_ptr(fpst); + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index ae6799c6ae0..993bead82ff 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7048,16 +7048,7 @@ static int disas_neon_insn_3same_ext(DisasContext *s= , uint32_t insn) bool is_long =3D false, q =3D extract32(insn, 6, 1); bool ptr_is_env =3D false; =20 - if ((insn & 0xfea00f10) =3D=3D 0xfc800800) { - /* VCADD -- 1111 110R 1.0S .... .... 1000 ...0 .... */ - int size =3D extract32(insn, 20, 1); - data =3D extract32(insn, 24, 1); /* rot */ - if (!dc_isar_feature(aa32_vcma, s) - || (!size && !dc_isar_feature(aa32_fp16_arith, s))) { - return 1; - } - fn_gvec_ptr =3D size ? gen_helper_gvec_fcadds : gen_helper_gvec_fc= addh; - } else if ((insn & 0xfeb00f00) =3D=3D 0xfc200d00) { + if ((insn & 0xfeb00f00) =3D=3D 0xfc200d00) { /* V[US]DOT -- 1111 1100 0.10 .... .... 1101 .Q.U .... */ bool u =3D extract32(insn, 4, 1); if (!dc_isar_feature(aa32_dp, s)) { --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596119; cv=none; d=zohomail.com; s=zohoarc; b=Hh371BP/FMB9tY/MKom5w9Y0UxqZK8qMNHyf/+qNqa6fQHs2Q9cP+PqQ2p62Dhhe22bbScSsXcFqDschuYGCt8yM201+A+zzDfR/6DCstdNR328y0J5JP+i7J3RzygsPnrnO87sf5H5vbs8ON6phxOrYM3f3IzRcE5Y5DV7ZSUE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596119; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=SQF8sbnZa9j7ur7kcOkwe5x6BFFSO3tvg6vbMZe5jYc=; b=XN570dK1FZiHFhIQ/2umegUxmbneWcffh8MH6u+NvnX1vUxK3mYni4E2FZW53UroCPR2PqJRktTuwbmXXK08Ex1DhmNASld/bArO65oroLFvJnYWWSFCPT06LDfyxCAEMMVXpwM0DNLVIvqMV+we9SoC9vtpxHRQ58hQCm/mTrg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596119599427.7103514098558; Mon, 4 May 2020 05:41:59 -0700 (PDT) Received: from localhost ([::1]:41856 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaQ2-0008Er-B9 for importer@patchew.org; Mon, 04 May 2020 08:41:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56554) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaI1-0000gW-QS for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:41 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:38466) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaI0-000189-Ra for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:41 -0400 Received: by mail-wr1-x42f.google.com with SMTP id x17so20700895wrt.5 for ; Mon, 04 May 2020 05:33:40 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=SQF8sbnZa9j7ur7kcOkwe5x6BFFSO3tvg6vbMZe5jYc=; b=YTuJsAHVB2RhZWLpaheHetu4cai4cbgfiRxllfihAmDU0znorkgkVjOVOCLQKegVhl TMZVFU/Bp9EdGc2hwLsG+0UUixeCwSXIeBA+fuPXnD4zC3+IPMAgd9uc/Ie9FV4p7G5+ XhEr1tQEaGMlBJKVjfX9KkGMzt2Pou9zO8PNwchyGkt/j4T0Mwf/tWzqCYNA+P78BhoL a5rFjR13xHGXC27Sefwdjwq9iAbKWAtPVGTEJEBvj6uJXe2k8a3K7fNP+tTgPSM+v9XB iJjbwyhVIbb9AE36MfEOEtB/nt9w+CgzMo1sH16sRvzz3991i/EqMGr7xNqEPKL8WZFH azxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SQF8sbnZa9j7ur7kcOkwe5x6BFFSO3tvg6vbMZe5jYc=; b=JR6bs5dFQ3yWfxgzTVa6+NYHjh4OylIiviHS2Pw4xwSZc3DYtw52TXCkS/lirWU86+ mEDlOqzushhh3EGUFUSl/L1msar0RBIZqoTttNGJIdwwIB406FLp4T1vMp1kkmAxk+Br kNb5QWYh0rYAjeuE39y1VmHASBBWAgHIF1TUd97wtCJOvcezU3veu3XWgYEUw/RoKo5/ +yVHQ2WrOfonPu/axjsDGubuRqtgONfO7tSZnteKtWoc3mhe3i1lzBmrlMD2+Tm9dAz6 DhH5NiQ4ZjGyodHym/BDWsuvlvhB3rp47LekNAFV1Z6ikAI3H4ZNgvyKyec7Wzux4G+p sC5A== X-Gm-Message-State: AGi0PuYbLy4M1ih9zzhNMgmQL3hlHBftjtjw3hD2jqrsAjU//XjPvlzU MmLoW7G5GViR33uFMhLx1P+6NKdvDPZzwA== X-Google-Smtp-Source: APiQypIQRDeJWwY5mDySASO8vNkX6plmdEhruklKsY16CTGcEV3RdkT9yllj9HzFry1ULrFd2qGzBA== X-Received: by 2002:a05:6000:110a:: with SMTP id z10mr18812580wrw.389.1588595619082; Mon, 04 May 2020 05:33:39 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 25/39] target/arm: Convert V[US]DOT (vector) to decodetree Date: Mon, 4 May 2020 13:32:55 +0100 Message-Id: <20200504123309.3808-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the V[US]DOT (vector) insns to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-7-peter.maydell@linaro.org --- target/arm/neon-shared.decode | 4 ++++ target/arm/translate-neon.inc.c | 32 ++++++++++++++++++++++++++++++++ target/arm/translate.c | 9 +-------- 3 files changed, 37 insertions(+), 8 deletions(-) diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode index ed65dae1809..c9c641905d3 100644 --- a/target/arm/neon-shared.decode +++ b/target/arm/neon-shared.decode @@ -39,3 +39,7 @@ VCMLA 1111 110 rot:2 . 1 size:1 .... .... 1000 .= q:1 . 0 .... \ =20 VCADD 1111 110 rot:1 1 . 0 size:1 .... .... 1000 . q:1 . 0 .... \ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp + +# VUDOT and VSDOT +VDOT 1111 110 00 . 10 .... .... 1101 . q:1 . u:1 .... \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 28011e88d9e..6537506c5b6 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -104,3 +104,35 @@ static bool trans_VCADD(DisasContext *s, arg_VCADD *a) tcg_temp_free_ptr(fpst); return true; } + +static bool trans_VDOT(DisasContext *s, arg_VDOT *a) +{ + int opr_sz; + gen_helper_gvec_3 *fn_gvec; + + if (!dc_isar_feature(aa32_dp, s)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vn | a->vm | a->vd) & a->q) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + opr_sz =3D (1 + a->q) * 8; + fn_gvec =3D a->u ? gen_helper_gvec_udot_b : gen_helper_gvec_sdot_b; + tcg_gen_gvec_3_ool(vfp_reg_offset(1, a->vd), + vfp_reg_offset(1, a->vn), + vfp_reg_offset(1, a->vm), + opr_sz, opr_sz, 0, fn_gvec); + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 993bead82ff..7d3aea8c98a 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7048,14 +7048,7 @@ static int disas_neon_insn_3same_ext(DisasContext *s= , uint32_t insn) bool is_long =3D false, q =3D extract32(insn, 6, 1); bool ptr_is_env =3D false; =20 - if ((insn & 0xfeb00f00) =3D=3D 0xfc200d00) { - /* V[US]DOT -- 1111 1100 0.10 .... .... 1101 .Q.U .... */ - bool u =3D extract32(insn, 4, 1); - if (!dc_isar_feature(aa32_dp, s)) { - return 1; - } - fn_gvec =3D u ? gen_helper_gvec_udot_b : gen_helper_gvec_sdot_b; - } else if ((insn & 0xff300f10) =3D=3D 0xfc200810) { + if ((insn & 0xff300f10) =3D=3D 0xfc200810) { /* VFM[AS]L -- 1111 1100 S.10 .... .... 1000 .Q.1 .... */ int is_s =3D extract32(insn, 23, 1); if (!dc_isar_feature(aa32_fhm, s)) { --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596736; cv=none; d=zohomail.com; s=zohoarc; b=O0meCTKEnrnLIV3oTYfMqLyNjX8uqqyTUuDD8/aXfW/G2dvQCZOIJHxMoEevMWGXmXdAsuZup4XzaV6x8FoAUYW/HkJJL9ge+6IIPo2OdWyu/9zJIgh8MxEUDXsTD8Zz0+DxHBB1Gc9eA0njfcePYhzl4v8vYSX8kbFIz0D3uEU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596736; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=SaReUKo4kU55P0PRPMCZjcwtch028hCF4xzjR7V7Obs=; b=Ag5u0pwk1hJEKbli8H3g0ngBURVV+cZRkhOzJCS0qO1xstkZvDD6jxt1as685y1Q5Ka95jlDfqCxjdVoHsC8+eYB0sDAngyoIQBp4k4X9Kt5IQaQachWngcrg60cnBGKKnBtuodefWS+N41Hxlg/cXtIKLdatnrmlNUJQmbeuH8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596736993729.1392488260477; Mon, 4 May 2020 05:52:16 -0700 (PDT) Received: from localhost ([::1]:56734 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaZz-0000gg-Jn for importer@patchew.org; Mon, 04 May 2020 08:52:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56574) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaI3-0000k9-9d for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:43 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]:42155) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaI1-00018P-W0 for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:42 -0400 Received: by mail-wr1-x42e.google.com with SMTP id s8so10394122wrt.9 for ; Mon, 04 May 2020 05:33:41 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=SaReUKo4kU55P0PRPMCZjcwtch028hCF4xzjR7V7Obs=; b=euiHPRdBGB9CcbwQuxchLDNRlTfJAdSwqoIRW57zp8z6jsl/Ldijxb3VwPZugUs/2k p727BWoPjEFMlk0O4+zm9u6vp6tTtLB62M05I9SSDLIKkwmRa0ZpJUKdONJpdNCeRutO ty5I4K/8J4hBzvrQ/XqPzLpotPolImxvyWTrAPGZeEU+++UzB7pxD1cPnRo5wXVB+HFa vQeTBRb50Btx1GPT9fSPlNOrgmCwfibf0SSm5q4HMHhXFaz2U3JIXa1na/rT8LFoA3aA 7Vm3yPOwXMTcwWNDU+7VR0WlkUbCeBWnvmtE32H2I1RHJ7m//1x7A95tEUk53ytOdcCZ jIrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SaReUKo4kU55P0PRPMCZjcwtch028hCF4xzjR7V7Obs=; b=oN491tcgaaJHriJWF/IijfyQ2iYJiIQhh7CxmByA4R8Idi5UL8m+PRvnNWcam5VhjG Mv3hN1xRxJz0lIz46DpYmq6By1HcKsp40dn0gHyA+LP5Yj6HHCm/vAjyYi4zQH29dkYN PLl5qcE148jxQH5WzZhTH6rHSry8TB0mfqdAh1IxbvaHrXAUfTva2C7OcNETWY12CyvW yZtweTMw30QXq2bmMvODx1Zprk7sOhZUVCNDHLemdt44Aevm9zQQlAiySXD1pIhcQg/D fzlJdPQ1CmL4ukul9xWbGsN4B4UGf7IlZT3uz9h5oIWoiTD2fuX66ohaNudO4kn2tmbD R1ug== X-Gm-Message-State: AGi0PuZU4zKeOHQNulRBn4+a8WufUiwv/ZX94McCLxbDImV+1ztBOPcW qqzlfXq+ciZhY6Jd9T4VX8b1k8xVUqIqsQ== X-Google-Smtp-Source: APiQypLePD/2WMiN6s490G7TzrFfhOFmWeLCw7fZ/8DV13YH6ljBBXuVZ0suGvjIuAe22EgIlu7YtA== X-Received: by 2002:adf:9264:: with SMTP id 91mr6151552wrj.362.1588595620158; Mon, 04 May 2020 05:33:40 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/39] target/arm: Convert VFM[AS]L (vector) to decodetree Date: Mon, 4 May 2020 13:32:56 +0100 Message-Id: <20200504123309.3808-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the VFM[AS]L (vector) insns to decodetree. This is the last insn in the legacy decoder for the 3same_ext group, so we can delete the legacy decoder function for the group entirely. Note that in disas_thumb2_insn() the parts of this encoding space where the decodetree decoder returns false will correctly be directed to illegal_op by the "(insn & (1 << 28))" check so they won't fall into disas_coproc_insn() by mistake. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-8-peter.maydell@linaro.org --- target/arm/neon-shared.decode | 6 +++ target/arm/translate-neon.inc.c | 31 +++++++++++ target/arm/translate.c | 92 +-------------------------------- 3 files changed, 38 insertions(+), 91 deletions(-) diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode index c9c641905d3..90cd5c871e2 100644 --- a/target/arm/neon-shared.decode +++ b/target/arm/neon-shared.decode @@ -43,3 +43,9 @@ VCADD 1111 110 rot:1 1 . 0 size:1 .... .... 1000= . q:1 . 0 .... \ # VUDOT and VSDOT VDOT 1111 110 00 . 10 .... .... 1101 . q:1 . u:1 .... \ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp + +# VFM[AS]L +VFML 1111 110 0 s:1 . 10 .... .... 1000 . 0 . 1 .... \ + vm=3D%vm_sp vn=3D%vn_sp vd=3D%vd_dp q=3D0 +VFML 1111 110 0 s:1 . 10 .... .... 1000 . 1 . 1 .... \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp q=3D1 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 6537506c5b6..6c58abc54b5 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -136,3 +136,34 @@ static bool trans_VDOT(DisasContext *s, arg_VDOT *a) opr_sz, opr_sz, 0, fn_gvec); return true; } + +static bool trans_VFML(DisasContext *s, arg_VFML *a) +{ + int opr_sz; + + if (!dc_isar_feature(aa32_fhm, s)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + (a->vd & 0x10)) { + return false; + } + + if (a->vd & a->q) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + opr_sz =3D (1 + a->q) * 8; + tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd), + vfp_reg_offset(a->q, a->vn), + vfp_reg_offset(a->q, a->vm), + cpu_env, opr_sz, opr_sz, a->s, /* is_2 =3D=3D 0 */ + gen_helper_gvec_fmlal_a32); + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 7d3aea8c98a..79cd9138fe7 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7032,84 +7032,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) return 0; } =20 -/* Advanced SIMD three registers of the same length extension. - * 31 25 23 22 20 16 12 11 10 9 8 3 = 0 - * +---------------+-----+---+-----+----+----+---+----+---+----+---------+= ----+ - * | 1 1 1 1 1 1 0 | op1 | D | op2 | Vn | Vd | 1 | o3 | 0 | o4 | N Q M U |= Vm | - * +---------------+-----+---+-----+----+----+---+----+---+----+---------+= ----+ - */ -static int disas_neon_insn_3same_ext(DisasContext *s, uint32_t insn) -{ - gen_helper_gvec_3 *fn_gvec =3D NULL; - gen_helper_gvec_3_ptr *fn_gvec_ptr =3D NULL; - int rd, rn, rm, opr_sz; - int data =3D 0; - int off_rn, off_rm; - bool is_long =3D false, q =3D extract32(insn, 6, 1); - bool ptr_is_env =3D false; - - if ((insn & 0xff300f10) =3D=3D 0xfc200810) { - /* VFM[AS]L -- 1111 1100 S.10 .... .... 1000 .Q.1 .... */ - int is_s =3D extract32(insn, 23, 1); - if (!dc_isar_feature(aa32_fhm, s)) { - return 1; - } - is_long =3D true; - data =3D is_s; /* is_2 =3D=3D 0 */ - fn_gvec_ptr =3D gen_helper_gvec_fmlal_a32; - ptr_is_env =3D true; - } else { - return 1; - } - - VFP_DREG_D(rd, insn); - if (rd & q) { - return 1; - } - if (q || !is_long) { - VFP_DREG_N(rn, insn); - VFP_DREG_M(rm, insn); - if ((rn | rm) & q & !is_long) { - return 1; - } - off_rn =3D vfp_reg_offset(1, rn); - off_rm =3D vfp_reg_offset(1, rm); - } else { - rn =3D VFP_SREG_N(insn); - rm =3D VFP_SREG_M(insn); - off_rn =3D vfp_reg_offset(0, rn); - off_rm =3D vfp_reg_offset(0, rm); - } - - if (s->fp_excp_el) { - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, - syn_simd_access_trap(1, 0xe, false), s->fp_excp= _el); - return 0; - } - if (!s->vfp_enabled) { - return 1; - } - - opr_sz =3D (1 + q) * 8; - if (fn_gvec_ptr) { - TCGv_ptr ptr; - if (ptr_is_env) { - ptr =3D cpu_env; - } else { - ptr =3D get_fpstatus_ptr(1); - } - tcg_gen_gvec_3_ptr(vfp_reg_offset(1, rd), off_rn, off_rm, ptr, - opr_sz, opr_sz, data, fn_gvec_ptr); - if (!ptr_is_env) { - tcg_temp_free_ptr(ptr); - } - } else { - tcg_gen_gvec_3_ool(vfp_reg_offset(1, rd), off_rn, off_rm, - opr_sz, opr_sz, data, fn_gvec); - } - return 0; -} - /* Advanced SIMD two registers and a scalar extension. * 31 24 23 22 20 16 12 11 10 9 8 3 = 0 * +-----------------+----+---+----+----+----+---+----+---+----+---------+= ----+ @@ -10956,12 +10878,6 @@ static void disas_arm_insn(DisasContext *s, unsign= ed int insn) } } } - } else if ((insn & 0x0e000a00) =3D=3D 0x0c000800 - && arm_dc_feature(s, ARM_FEATURE_V8)) { - if (disas_neon_insn_3same_ext(s, insn)) { - goto illegal_op; - } - return; } else if ((insn & 0x0f000a00) =3D=3D 0x0e000800 && arm_dc_feature(s, ARM_FEATURE_V8)) { if (disas_neon_insn_2reg_scalar_ext(s, insn)) { @@ -11145,15 +11061,9 @@ static void disas_thumb2_insn(DisasContext *s, uin= t32_t insn) } break; } - if ((insn & 0xfe000a00) =3D=3D 0xfc000800 + if ((insn & 0xff000a00) =3D=3D 0xfe000800 && arm_dc_feature(s, ARM_FEATURE_V8)) { /* The Thumb2 and ARM encodings are identical. */ - if (disas_neon_insn_3same_ext(s, insn)) { - goto illegal_op; - } - } else if ((insn & 0xff000a00) =3D=3D 0xfe000800 - && arm_dc_feature(s, ARM_FEATURE_V8)) { - /* The Thumb2 and ARM encodings are identical. */ if (disas_neon_insn_2reg_scalar_ext(s, insn)) { goto illegal_op; } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596499; cv=none; d=zohomail.com; s=zohoarc; b=UW+S3cdOXTYyTXdzup8P4SItTFn8/cxJoFtNhb9NpXIyP7wTLpCpxaoH9pVMol2H2Ps5sSeqaHXZcOsM94lu6UoQXu6iXpZiutAA3UY85SIGiK4DGmpV68Nff5YEwD0IQtwpmGWwFGCZ8leHi+MBRILw1OCwZDNvHuSBZcVQFKo= ARC-Message-Signature: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert VCMLA (scalar) in the 2reg-scalar-ext group to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-9-peter.maydell@linaro.org --- target/arm/neon-shared.decode | 5 +++++ target/arm/translate-neon.inc.c | 40 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 26 +-------------------- 3 files changed, 46 insertions(+), 25 deletions(-) diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode index 90cd5c871e2..c11d755ed14 100644 --- a/target/arm/neon-shared.decode +++ b/target/arm/neon-shared.decode @@ -49,3 +49,8 @@ VFML 1111 110 0 s:1 . 10 .... .... 1000 . 0 . 1= .... \ vm=3D%vm_sp vn=3D%vn_sp vd=3D%vd_dp q=3D0 VFML 1111 110 0 s:1 . 10 .... .... 1000 . 1 . 1 .... \ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp q=3D1 + +VCMLA_scalar 1111 1110 0 . rot:2 .... .... 1000 . q:1 index:1 0 vm:4 \ + vn=3D%vn_dp vd=3D%vd_dp size=3D0 +VCMLA_scalar 1111 1110 1 . rot:2 .... .... 1000 . q:1 . 0 .... \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp size=3D1 index=3D0 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 6c58abc54b5..92eccbf8236 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -167,3 +167,43 @@ static bool trans_VFML(DisasContext *s, arg_VFML *a) gen_helper_gvec_fmlal_a32); return true; } + +static bool trans_VCMLA_scalar(DisasContext *s, arg_VCMLA_scalar *a) +{ + gen_helper_gvec_3_ptr *fn_gvec_ptr; + int opr_sz; + TCGv_ptr fpst; + + if (!dc_isar_feature(aa32_vcma, s)) { + return false; + } + if (a->size =3D=3D 0 && !dc_isar_feature(aa32_fp16_arith, s)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vd | a->vn) & a->q) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + fn_gvec_ptr =3D (a->size ? gen_helper_gvec_fcmlas_idx + : gen_helper_gvec_fcmlah_idx); + opr_sz =3D (1 + a->q) * 8; + fpst =3D get_fpstatus_ptr(1); + tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd), + vfp_reg_offset(1, a->vn), + vfp_reg_offset(1, a->vm), + fpst, opr_sz, opr_sz, + (a->index << 2) | a->rot, fn_gvec_ptr); + tcg_temp_free_ptr(fpst); + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 79cd9138fe7..4cb8c6d55b1 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7049,31 +7049,7 @@ static int disas_neon_insn_2reg_scalar_ext(DisasCont= ext *s, uint32_t insn) bool is_long =3D false, q =3D extract32(insn, 6, 1); bool ptr_is_env =3D false; =20 - if ((insn & 0xff000f10) =3D=3D 0xfe000800) { - /* VCMLA (indexed) -- 1111 1110 S.RR .... .... 1000 ...0 .... */ - int rot =3D extract32(insn, 20, 2); - int size =3D extract32(insn, 23, 1); - int index; - - if (!dc_isar_feature(aa32_vcma, s)) { - return 1; - } - if (size =3D=3D 0) { - if (!dc_isar_feature(aa32_fp16_arith, s)) { - return 1; - } - /* For fp16, rm is just Vm, and index is M. */ - rm =3D extract32(insn, 0, 4); - index =3D extract32(insn, 5, 1); - } else { - /* For fp32, rm is the usual M:Vm, and index is 0. */ - VFP_DREG_M(rm, insn); - index =3D 0; - } - data =3D (index << 2) | rot; - fn_gvec_ptr =3D (size ? gen_helper_gvec_fcmlas_idx - : gen_helper_gvec_fcmlah_idx); - } else if ((insn & 0xffb00f00) =3D=3D 0xfe200d00) { + if ((insn & 0xffb00f00) =3D=3D 0xfe200d00) { /* V[US]DOT -- 1111 1110 0.10 .... .... 1101 .Q.U .... */ int u =3D extract32(insn, 4, 1); =20 --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596818; cv=none; d=zohomail.com; s=zohoarc; b=fSAhCCkiiNd1pgh7raSShEcyKql8bin6cYHVdrHNK5PvMA04j5Can0FAkofKRSGuTghRQqf9BIU7JOEsgLJLc+PFIcvbE2xNi1hg5dIAJXg8VN5sa+iEZxMnQR7BzoNxSBpDyAPYi//1Q5s20zy9jgx2Qb/tRckCslMPorTeWqU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596818; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=goNw3Ssg8wfTd+slGYHgDUUUDcHds7bx8PNTd/noDQ8=; b=oJ6Wunp9Urafdkct12aV0mErqSAFRgxUsulp77ruUjCTl/grgGVQF4NOprVEDxcsPTElk8adrayoqcz299sLlGDdBtPYOjvFniyANrw5MykzOJ28UsiG43qLrG7n0/OXKxb0L90GzoW6Woz6Tsy5DWKZCo1gO/Z8aeKTQ6+YZOQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596818651947.1239625408173; Mon, 4 May 2020 05:53:38 -0700 (PDT) Received: from localhost ([::1]:35724 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVabJ-0003fQ-BV for importer@patchew.org; Mon, 04 May 2020 08:53:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56586) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaI5-0000pQ-6W for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:45 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:34051) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaI4-0001B6-An for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:44 -0400 Received: by mail-wr1-x430.google.com with SMTP id y3so1667494wrt.1 for ; Mon, 04 May 2020 05:33:43 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=goNw3Ssg8wfTd+slGYHgDUUUDcHds7bx8PNTd/noDQ8=; b=ih4wqJWxkkfmMIVK+E1FntHWr8AfDtz/CPBpaqgmCHYcgOViVth8Yq8Nb4g88EsMkB 2yIGxSNOI0ciQM5tu6HP/lvs0K0+tvMsNzCWWRjI4bb6R7VZVpg/vVDTEZxqQVBSZJZF X7mAwbPu9Yz1FlKosbv3oDUI/qzvnVgr3gu18yxVcg8bMj0DwA1ltEikzKFPLD2d9WqX nPJXfjPLjTUvjsp7OfYTBOxuWaqUW4IyiW8QU5RMjTcyTWraR0fnwZp1pZqxWSoqo9pB P1j/uuHGwM/jDKYPOapWNLgR/VHtSIYDLJSw4ZJVrJNXzo8xkoCWf8HD1h+4RzEMV+I+ QAGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=goNw3Ssg8wfTd+slGYHgDUUUDcHds7bx8PNTd/noDQ8=; b=PORQI2FU+xcmwtAfPOssGdO7hfNKxJSkZEJfRlwCV/JuIwday18dM43OOBzgiVbaN9 kQc5rrHbxBSzagCRtatP3O5Un8XnavDYiBbcOnX5afaBhk4o6kfnthdrZVKqGP25P9aT 08st096M1FhIoxE48GWLiy/Ytijj3SMqt10szSA1k+u03i3EleMB+5feuMSf9stOOGin REBUvMT7MriEfI1uoGmoYnoOKcz+k2vbLeqBmkRHDNDU7LSSI7kujYWftXnldAFZOhq+ HSFhD7Omb4LvHrw5PvRelHE7v+FHNezdJQDfYNDj7F3LVKym5bpIaAL1zcJaQapLO/v3 KTdg== X-Gm-Message-State: AGi0PuYhsOqQnPlO54YPSWBOzgt8BOPRCgAe+aAufZkfhpRNkBmI0Eph aU+oR9CDxBXjtt/u46v449YgFTW8x3NkBw== X-Google-Smtp-Source: APiQypImwJvOvv2eUyG1v8BEfYUV9UB4lsKqxAnQcKoQZqgpFBcQVCOdzQc+alrGCP5sy0oV2UT46A== X-Received: by 2002:adf:ce02:: with SMTP id p2mr18845057wrn.173.1588595622260; Mon, 04 May 2020 05:33:42 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 28/39] target/arm: Convert V[US]DOT (scalar) to decodetree Date: Mon, 4 May 2020 13:32:58 +0100 Message-Id: <20200504123309.3808-29-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the V[US]DOT (scalar) insns in the 2reg-scalar-ext group to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-10-peter.maydell@linaro.org --- target/arm/neon-shared.decode | 3 +++ target/arm/translate-neon.inc.c | 35 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 13 +----------- 3 files changed, 39 insertions(+), 12 deletions(-) diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode index c11d755ed14..63a46c63c07 100644 --- a/target/arm/neon-shared.decode +++ b/target/arm/neon-shared.decode @@ -54,3 +54,6 @@ VCMLA_scalar 1111 1110 0 . rot:2 .... .... 1000 . q:1 i= ndex:1 0 vm:4 \ vn=3D%vn_dp vd=3D%vd_dp size=3D0 VCMLA_scalar 1111 1110 1 . rot:2 .... .... 1000 . q:1 . 0 .... \ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp size=3D1 index=3D0 + +VDOT_scalar 1111 1110 0 . 10 .... .... 1101 . q:1 index:1 u:1 rm:4 \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 92eccbf8236..7cc6ccb0697 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -207,3 +207,38 @@ static bool trans_VCMLA_scalar(DisasContext *s, arg_VC= MLA_scalar *a) tcg_temp_free_ptr(fpst); return true; } + +static bool trans_VDOT_scalar(DisasContext *s, arg_VDOT_scalar *a) +{ + gen_helper_gvec_3 *fn_gvec; + int opr_sz; + TCGv_ptr fpst; + + if (!dc_isar_feature(aa32_dp, s)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn) & 0x10)) { + return false; + } + + if ((a->vd | a->vn) & a->q) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + fn_gvec =3D a->u ? gen_helper_gvec_udot_idx_b : gen_helper_gvec_sdot_i= dx_b; + opr_sz =3D (1 + a->q) * 8; + fpst =3D get_fpstatus_ptr(1); + tcg_gen_gvec_3_ool(vfp_reg_offset(1, a->vd), + vfp_reg_offset(1, a->vn), + vfp_reg_offset(1, a->rm), + opr_sz, opr_sz, a->index, fn_gvec); + tcg_temp_free_ptr(fpst); + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 4cb8c6d55b1..8574d0964f7 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7049,18 +7049,7 @@ static int disas_neon_insn_2reg_scalar_ext(DisasCont= ext *s, uint32_t insn) bool is_long =3D false, q =3D extract32(insn, 6, 1); bool ptr_is_env =3D false; =20 - if ((insn & 0xffb00f00) =3D=3D 0xfe200d00) { - /* V[US]DOT -- 1111 1110 0.10 .... .... 1101 .Q.U .... */ - int u =3D extract32(insn, 4, 1); - - if (!dc_isar_feature(aa32_dp, s)) { - return 1; - } - fn_gvec =3D u ? gen_helper_gvec_udot_idx_b : gen_helper_gvec_sdot_= idx_b; - /* rm is just Vm, and index is M. */ - data =3D extract32(insn, 5, 1); /* index */ - rm =3D extract32(insn, 0, 4); - } else if ((insn & 0xffa00f10) =3D=3D 0xfe000810) { + if ((insn & 0xffa00f10) =3D=3D 0xfe000810) { /* VFM[AS]L -- 1111 1110 0.0S .... .... 1000 .Q.1 .... */ int is_s =3D extract32(insn, 20, 1); int vm20 =3D extract32(insn, 0, 3); --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596240; cv=none; d=zohomail.com; s=zohoarc; b=J2YtCzvruKVm2DvOvSWoSDvzdUmvoUWEpsNNn7QqqRtRKzgGpawLav2SPs0lAiWevUqI4Zu0IY0Uhh88zw2yMkxGuQU6LH2HZiW8PkI6UBqe4fQxtKUnrl4+hFnjlBWiwmpsf/XDrZNb1go6julpkt8eptsTLIhlAfftyjiWAuI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596240; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=neqdvUxpmLjYSwX6T+ANCkxHJDmHVzkKcKiliL8Wzk8=; b=kDq4VcyNj9bvzxqquNXdHYXX4mOiFBQWl+uvnd/1qEQlvGd2CE+SLd+C5zPFw2RNTT/RaLrhH2LmPylrVJRSCPU7kVXk5iTIVvbF2LD3nF7Ih6TCwuTKPLgZw/UQosbOMMF1GqBd2bVqVHrIaKssSe1CvipPY6PVQ8NOlQk67dE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596240090785.6753250029733; Mon, 4 May 2020 05:44:00 -0700 (PDT) Received: from localhost ([::1]:50730 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaRy-0003PY-Gf for importer@patchew.org; Mon, 04 May 2020 08:43:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56602) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaI6-0000sT-Cc for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:46 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]:41099) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaI5-0001Cl-6Z for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:46 -0400 Received: by mail-wr1-x436.google.com with SMTP id g13so20679599wrb.8 for ; Mon, 04 May 2020 05:33:44 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=neqdvUxpmLjYSwX6T+ANCkxHJDmHVzkKcKiliL8Wzk8=; b=PCPYuWoyLG9uC0SdabfvoIEZ05NGDVInhW+yUS/7cFfp2TfBgBvrcGJJ++dC/F3xSw Nctj89IV9Qjhh6ZcKQjwzG5WVDmIgf1Ne8ivMhXf/qPgi6dUMJHORNUE8seYfDdYoWBw VZvKvdnCCUbUjFiOQXYnuNGVu8tX0wLtue4jB02oPbs6oDWhvRZUF/Wo/7n/QPAn/T+W 8T0/Jvs5PJCviDS6khXv8sr2y4J7FKkfSkoUeZckTk13h5KlKi6mKMaiuXRfMoL11MEd YK6+SSM9Vw7d8UmUbxWDpzZ31k7bx89W8EjFJ9f2bwkq9gvO8IYrl5q7RMRMnw8/m5vD rp4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=neqdvUxpmLjYSwX6T+ANCkxHJDmHVzkKcKiliL8Wzk8=; b=aZCEQ8ecHlfDuak3zOx8yW0DjmIV+GS3lB1C3DnNfnN4CmsnxQhdxPt18XsbmIZVsj sI+HDwW3PWgkJpo5y3kRRzVaFl9qc2Rf2pimUfqIKif5RmC7u9yWDG9penX5s7aRb8u3 bteoMbltesPoqgCxPvia3iB9tNDasePXNbni8ouQWP7mD3tI/2bh6xlELnVt8W19pfl1 cs6gFXEBlazC8ojN08xDMzJ3V3JDGRMwEenpl4EbjljPy79H4o0PlzC266FEwcc774oY T3hFvJK4kBq/B8Hy2jAt5i99mMrM7tAfRW2qoVoBBbKdbPtDgRL+nsVxbtBrIdURATLI uyZw== X-Gm-Message-State: AGi0PuaBaT4x4Mg+KsFbmQKD4El7k4ZuNYM93PcElOAUP4UvtWiuyBRg rIcojUDW0uvhfl9hrs6fZvmiT4SA07n4fg== X-Google-Smtp-Source: APiQypIfXqMeX5DDm9WNC6HRgOtLfGH9liQ8a5dWiHF5yX1SU9Wg6mjpNA3rY/q+43fStDWsObJLMw== X-Received: by 2002:a5d:420a:: with SMTP id n10mr18137264wrq.235.1588595623322; Mon, 04 May 2020 05:33:43 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 29/39] target/arm: Convert VFM[AS]L (scalar) to decodetree Date: Mon, 4 May 2020 13:32:59 +0100 Message-Id: <20200504123309.3808-30-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the VFM[AS]L (scalar) insns in the 2reg-scalar-ext group to decodetree. These are the last ones in the group so we can remove all the legacy decode for the group. Note that in disas_thumb2_insn() the parts of this encoding space where the decodetree decoder returns false will correctly be directed to illegal_op by the "(insn & (1 << 28))" check so they won't fall into disas_coproc_insn() by mistake. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-11-peter.maydell@linaro.org --- target/arm/neon-shared.decode | 7 +++ target/arm/translate-neon.inc.c | 32 ++++++++++ target/arm/translate.c | 107 +------------------------------- 3 files changed, 40 insertions(+), 106 deletions(-) diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode index 63a46c63c07..f297ba8cdfc 100644 --- a/target/arm/neon-shared.decode +++ b/target/arm/neon-shared.decode @@ -57,3 +57,10 @@ VCMLA_scalar 1111 1110 1 . rot:2 .... .... 1000 . q:1 = . 0 .... \ =20 VDOT_scalar 1111 1110 0 . 10 .... .... 1101 . q:1 index:1 u:1 rm:4 \ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp + +%vfml_scalar_q0_rm 0:3 5:1 +%vfml_scalar_q1_index 5:1 3:1 +VFML_scalar 1111 1110 0 . 0 s:1 .... .... 1000 . 0 . 1 index:1 ... \ + rm=3D%vfml_scalar_q0_rm vn=3D%vn_sp vd=3D%vd_dp q=3D0 +VFML_scalar 1111 1110 0 . 0 s:1 .... .... 1000 . 1 . 1 . rm:3 \ + index=3D%vfml_scalar_q1_index vn=3D%vn_dp vd=3D%vd_dp q=3D1 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 7cc6ccb0697..b06542b8b83 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -242,3 +242,35 @@ static bool trans_VDOT_scalar(DisasContext *s, arg_VDO= T_scalar *a) tcg_temp_free_ptr(fpst); return true; } + +static bool trans_VFML_scalar(DisasContext *s, arg_VFML_scalar *a) +{ + int opr_sz; + + if (!dc_isar_feature(aa32_fhm, s)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd & 0x10) || (a->q && (a->vn & 0x10)))) { + return false; + } + + if (a->vd & a->q) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + opr_sz =3D (1 + a->q) * 8; + tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd), + vfp_reg_offset(a->q, a->vn), + vfp_reg_offset(a->q, a->rm), + cpu_env, opr_sz, opr_sz, + (a->index << 2) | a->s, /* is_2 =3D=3D 0 */ + gen_helper_gvec_fmlal_idx_a32); + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 8574d0964f7..e269642a480 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -2610,8 +2610,6 @@ static int disas_dsp_insn(DisasContext *s, uint32_t i= nsn) } =20 #define VFP_REG_SHR(x, n) (((n) > 0) ? (x) >> (n) : (x) << -(n)) -#define VFP_SREG(insn, bigbit, smallbit) \ - ((VFP_REG_SHR(insn, bigbit - 1) & 0x1e) | (((insn) >> (smallbit)) & 1)) #define VFP_DREG(reg, insn, bigbit, smallbit) do { \ if (dc_isar_feature(aa32_simd_r32, s)) { \ reg =3D (((insn) >> (bigbit)) & 0x0f) \ @@ -2622,11 +2620,8 @@ static int disas_dsp_insn(DisasContext *s, uint32_t = insn) reg =3D ((insn) >> (bigbit)) & 0x0f; \ }} while (0) =20 -#define VFP_SREG_D(insn) VFP_SREG(insn, 12, 22) #define VFP_DREG_D(reg, insn) VFP_DREG(reg, insn, 12, 22) -#define VFP_SREG_N(insn) VFP_SREG(insn, 16, 7) #define VFP_DREG_N(reg, insn) VFP_DREG(reg, insn, 16, 7) -#define VFP_SREG_M(insn) VFP_SREG(insn, 0, 5) #define VFP_DREG_M(reg, insn) VFP_DREG(reg, insn, 0, 5) =20 static void gen_neon_dup_low16(TCGv_i32 var) @@ -7032,94 +7027,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) return 0; } =20 -/* Advanced SIMD two registers and a scalar extension. - * 31 24 23 22 20 16 12 11 10 9 8 3 = 0 - * +-----------------+----+---+----+----+----+---+----+---+----+---------+= ----+ - * | 1 1 1 1 1 1 1 0 | o1 | D | o2 | Vn | Vd | 1 | o3 | 0 | o4 | N Q M U |= Vm | - * +-----------------+----+---+----+----+----+---+----+---+----+---------+= ----+ - * - */ - -static int disas_neon_insn_2reg_scalar_ext(DisasContext *s, uint32_t insn) -{ - gen_helper_gvec_3 *fn_gvec =3D NULL; - gen_helper_gvec_3_ptr *fn_gvec_ptr =3D NULL; - int rd, rn, rm, opr_sz, data; - int off_rn, off_rm; - bool is_long =3D false, q =3D extract32(insn, 6, 1); - bool ptr_is_env =3D false; - - if ((insn & 0xffa00f10) =3D=3D 0xfe000810) { - /* VFM[AS]L -- 1111 1110 0.0S .... .... 1000 .Q.1 .... */ - int is_s =3D extract32(insn, 20, 1); - int vm20 =3D extract32(insn, 0, 3); - int vm3 =3D extract32(insn, 3, 1); - int m =3D extract32(insn, 5, 1); - int index; - - if (!dc_isar_feature(aa32_fhm, s)) { - return 1; - } - if (q) { - rm =3D vm20; - index =3D m * 2 + vm3; - } else { - rm =3D vm20 * 2 + m; - index =3D vm3; - } - is_long =3D true; - data =3D (index << 2) | is_s; /* is_2 =3D=3D 0 */ - fn_gvec_ptr =3D gen_helper_gvec_fmlal_idx_a32; - ptr_is_env =3D true; - } else { - return 1; - } - - VFP_DREG_D(rd, insn); - if (rd & q) { - return 1; - } - if (q || !is_long) { - VFP_DREG_N(rn, insn); - if (rn & q & !is_long) { - return 1; - } - off_rn =3D vfp_reg_offset(1, rn); - off_rm =3D vfp_reg_offset(1, rm); - } else { - rn =3D VFP_SREG_N(insn); - off_rn =3D vfp_reg_offset(0, rn); - off_rm =3D vfp_reg_offset(0, rm); - } - if (s->fp_excp_el) { - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, - syn_simd_access_trap(1, 0xe, false), s->fp_excp= _el); - return 0; - } - if (!s->vfp_enabled) { - return 1; - } - - opr_sz =3D (1 + q) * 8; - if (fn_gvec_ptr) { - TCGv_ptr ptr; - if (ptr_is_env) { - ptr =3D cpu_env; - } else { - ptr =3D get_fpstatus_ptr(1); - } - tcg_gen_gvec_3_ptr(vfp_reg_offset(1, rd), off_rn, off_rm, ptr, - opr_sz, opr_sz, data, fn_gvec_ptr); - if (!ptr_is_env) { - tcg_temp_free_ptr(ptr); - } - } else { - tcg_gen_gvec_3_ool(vfp_reg_offset(1, rd), off_rn, off_rm, - opr_sz, opr_sz, data, fn_gvec); - } - return 0; -} - static int disas_coproc_insn(DisasContext *s, uint32_t insn) { int cpnum, is64, crn, crm, opc1, opc2, isread, rt, rt2; @@ -10843,12 +10750,6 @@ static void disas_arm_insn(DisasContext *s, unsign= ed int insn) } } } - } else if ((insn & 0x0f000a00) =3D=3D 0x0e000800 - && arm_dc_feature(s, ARM_FEATURE_V8)) { - if (disas_neon_insn_2reg_scalar_ext(s, insn)) { - goto illegal_op; - } - return; } goto illegal_op; } @@ -11026,13 +10927,7 @@ static void disas_thumb2_insn(DisasContext *s, uin= t32_t insn) } break; } - if ((insn & 0xff000a00) =3D=3D 0xfe000800 - && arm_dc_feature(s, ARM_FEATURE_V8)) { - /* The Thumb2 and ARM encodings are identical. */ - if (disas_neon_insn_2reg_scalar_ext(s, insn)) { - goto illegal_op; - } - } else if (((insn >> 24) & 3) =3D=3D 3) { + if (((insn >> 24) & 3) =3D=3D 3) { /* Translate into the equivalent ARM encoding. */ insn =3D (insn & 0xe2ffffff) | ((insn & (1 << 28)) >> 4) | (1 = << 28); if (disas_neon_data_insn(s, insn)) { --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596624; cv=none; d=zohomail.com; s=zohoarc; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon "load/store multiple structures" insns to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-12-peter.maydell@linaro.org --- target/arm/neon-ls.decode | 7 ++ target/arm/translate-neon.inc.c | 124 ++++++++++++++++++++++++++++++++ target/arm/translate.c | 91 +---------------------- 3 files changed, 133 insertions(+), 89 deletions(-) diff --git a/target/arm/neon-ls.decode b/target/arm/neon-ls.decode index 2b16c9256df..dd03d5a37bd 100644 --- a/target/arm/neon-ls.decode +++ b/target/arm/neon-ls.decode @@ -27,3 +27,10 @@ # 0b1111_1001_xxx0_xxxx_xxxx_xxxx_xxxx_xxxx # This file works on the A32 encoding only; calling code for T32 has to # transform the insn into the A32 version first. + +%vd_dp 22:1 12:4 + +# Neon load/store multiple structures + +VLDST_multiple 1111 0100 0 . l:1 0 rn:4 .... itype:4 size:2 align:2 rm:4 \ + vd=3D%vd_dp diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index b06542b8b83..966c0d92012 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -274,3 +274,127 @@ static bool trans_VFML_scalar(DisasContext *s, arg_VF= ML_scalar *a) gen_helper_gvec_fmlal_idx_a32); return true; } + +static struct { + int nregs; + int interleave; + int spacing; +} const neon_ls_element_type[11] =3D { + {1, 4, 1}, + {1, 4, 2}, + {4, 1, 1}, + {2, 2, 2}, + {1, 3, 1}, + {1, 3, 2}, + {3, 1, 1}, + {1, 1, 1}, + {1, 2, 1}, + {1, 2, 2}, + {2, 1, 1} +}; + +static void gen_neon_ldst_base_update(DisasContext *s, int rm, int rn, + int stride) +{ + if (rm !=3D 15) { + TCGv_i32 base; + + base =3D load_reg(s, rn); + if (rm =3D=3D 13) { + tcg_gen_addi_i32(base, base, stride); + } else { + TCGv_i32 index; + index =3D load_reg(s, rm); + tcg_gen_add_i32(base, base, index); + tcg_temp_free_i32(index); + } + store_reg(s, rn, base); + } +} + +static bool trans_VLDST_multiple(DisasContext *s, arg_VLDST_multiple *a) +{ + /* Neon load/store multiple structures */ + int nregs, interleave, spacing, reg, n; + MemOp endian =3D s->be_data; + int mmu_idx =3D get_mem_index(s); + int size =3D a->size; + TCGv_i64 tmp64; + TCGv_i32 addr, tmp; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist */ + if (!dc_isar_feature(aa32_simd_r32, s) && (a->vd & 0x10)) { + return false; + } + if (a->itype > 10) { + return false; + } + /* Catch UNDEF cases for bad values of align field */ + switch (a->itype & 0xc) { + case 4: + if (a->align >=3D 2) { + return false; + } + break; + case 8: + if (a->align =3D=3D 3) { + return false; + } + break; + default: + break; + } + nregs =3D neon_ls_element_type[a->itype].nregs; + interleave =3D neon_ls_element_type[a->itype].interleave; + spacing =3D neon_ls_element_type[a->itype].spacing; + if (size =3D=3D 3 && (interleave | spacing) !=3D 1) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + /* For our purposes, bytes are always little-endian. */ + if (size =3D=3D 0) { + endian =3D MO_LE; + } + /* + * Consecutive little-endian elements from a single register + * can be promoted to a larger little-endian operation. + */ + if (interleave =3D=3D 1 && endian =3D=3D MO_LE) { + size =3D 3; + } + tmp64 =3D tcg_temp_new_i64(); + addr =3D tcg_temp_new_i32(); + tmp =3D tcg_const_i32(1 << size); + load_reg_var(s, addr, a->rn); + for (reg =3D 0; reg < nregs; reg++) { + for (n =3D 0; n < 8 >> size; n++) { + int xs; + for (xs =3D 0; xs < interleave; xs++) { + int tt =3D a->vd + reg + spacing * xs; + + if (a->l) { + gen_aa32_ld_i64(s, tmp64, addr, mmu_idx, endian | size= ); + neon_store_element64(tt, n, size, tmp64); + } else { + neon_load_element64(tmp64, tt, n, size); + gen_aa32_st_i64(s, tmp64, addr, mmu_idx, endian | size= ); + } + tcg_gen_add_i32(addr, addr, tmp); + } + } + } + tcg_temp_free_i32(addr); + tcg_temp_free_i32(tmp); + tcg_temp_free_i64(tmp64); + + gen_neon_ldst_base_update(s, a->rm, a->rn, nregs * interleave * 8); + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index e269642a480..be56cbb0614 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3214,45 +3214,19 @@ static void gen_neon_trn_u16(TCGv_i32 t0, TCGv_i32 = t1) } =20 =20 -static struct { - int nregs; - int interleave; - int spacing; -} const neon_ls_element_type[11] =3D { - {1, 4, 1}, - {1, 4, 2}, - {4, 1, 1}, - {2, 2, 2}, - {1, 3, 1}, - {1, 3, 2}, - {3, 1, 1}, - {1, 1, 1}, - {1, 2, 1}, - {1, 2, 2}, - {2, 1, 1} -}; - /* Translate a NEON load/store element instruction. Return nonzero if the instruction is invalid. */ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn) { int rd, rn, rm; - int op; int nregs; - int interleave; - int spacing; int stride; int size; int reg; int load; - int n; int vec_size; - int mmu_idx; - MemOp endian; TCGv_i32 addr; TCGv_i32 tmp; - TCGv_i32 tmp2; - TCGv_i64 tmp64; =20 if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { return 1; @@ -3274,70 +3248,9 @@ static int disas_neon_ls_insn(DisasContext *s, uint3= 2_t insn) rn =3D (insn >> 16) & 0xf; rm =3D insn & 0xf; load =3D (insn & (1 << 21)) !=3D 0; - endian =3D s->be_data; - mmu_idx =3D get_mem_index(s); if ((insn & (1 << 23)) =3D=3D 0) { - /* Load store all elements. */ - op =3D (insn >> 8) & 0xf; - size =3D (insn >> 6) & 3; - if (op > 10) - return 1; - /* Catch UNDEF cases for bad values of align field */ - switch (op & 0xc) { - case 4: - if (((insn >> 5) & 1) =3D=3D 1) { - return 1; - } - break; - case 8: - if (((insn >> 4) & 3) =3D=3D 3) { - return 1; - } - break; - default: - break; - } - nregs =3D neon_ls_element_type[op].nregs; - interleave =3D neon_ls_element_type[op].interleave; - spacing =3D neon_ls_element_type[op].spacing; - if (size =3D=3D 3 && (interleave | spacing) !=3D 1) { - return 1; - } - /* For our purposes, bytes are always little-endian. */ - if (size =3D=3D 0) { - endian =3D MO_LE; - } - /* Consecutive little-endian elements from a single register - * can be promoted to a larger little-endian operation. - */ - if (interleave =3D=3D 1 && endian =3D=3D MO_LE) { - size =3D 3; - } - tmp64 =3D tcg_temp_new_i64(); - addr =3D tcg_temp_new_i32(); - tmp2 =3D tcg_const_i32(1 << size); - load_reg_var(s, addr, rn); - for (reg =3D 0; reg < nregs; reg++) { - for (n =3D 0; n < 8 >> size; n++) { - int xs; - for (xs =3D 0; xs < interleave; xs++) { - int tt =3D rd + reg + spacing * xs; - - if (load) { - gen_aa32_ld_i64(s, tmp64, addr, mmu_idx, endian | = size); - neon_store_element64(tt, n, size, tmp64); - } else { - neon_load_element64(tmp64, tt, n, size); - gen_aa32_st_i64(s, tmp64, addr, mmu_idx, endian | = size); - } - tcg_gen_add_i32(addr, addr, tmp2); - } - } - } - tcg_temp_free_i32(addr); - tcg_temp_free_i32(tmp2); - tcg_temp_free_i64(tmp64); - stride =3D nregs * interleave * 8; + /* Load store all elements -- handled already by decodetree */ + return 1; } else { size =3D (insn >> 10) & 3; if (size =3D=3D 3) { --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596736; cv=none; d=zohomail.com; s=zohoarc; b=HxzVvii5NU8UFTOgzfKUsID45Wi3SlpRFhhMh9yfeTUYokc1Rnen6TGIyy/7PKva0z88kMhZgyb8MSKCQ22r8clLecmgJ0zB0iE/j2mliFtlZ63QaFDC7HU2rLK8ijrw3igTttlzLcVJXoDaxlQwRVgU94WbXTm7n4MFDtG0QC8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596736; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=KUeLOJcnXNXY/bA4/CLGp725F/U7BSs+iFJgq6rC70c=; b=PVfNgabNLkARHN5nbBM7NAHkK6Y+ysnKoRQNWGrnLbK6ZNIrXCL5VEVAV7GhmnCao6ImOeUEKwtSX3VtSi3J8cY1qXU/TgSCb4AGj37WhNZZXa48UbOEe7tlVAk3lbcGf52iioloCit5gHCGeJQM+K3SDckQ02Pk1izn2t9In10= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596736363818.4062922272193; Mon, 4 May 2020 05:52:16 -0700 (PDT) Received: from localhost ([::1]:56702 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaZz-0000fz-4T for importer@patchew.org; Mon, 04 May 2020 08:52:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56636) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaI8-0000zD-Qz for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:48 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:39702) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaI7-0001Hi-Pd for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:48 -0400 Received: by mail-wm1-x332.google.com with SMTP id y24so8846302wma.4 for ; Mon, 04 May 2020 05:33:47 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon "load single structure to all lanes" insns to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-13-peter.maydell@linaro.org --- target/arm/neon-ls.decode | 5 +++ target/arm/translate-neon.inc.c | 73 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 55 +------------------------ 3 files changed, 80 insertions(+), 53 deletions(-) diff --git a/target/arm/neon-ls.decode b/target/arm/neon-ls.decode index dd03d5a37bd..f0ab6d2c987 100644 --- a/target/arm/neon-ls.decode +++ b/target/arm/neon-ls.decode @@ -34,3 +34,8 @@ =20 VLDST_multiple 1111 0100 0 . l:1 0 rn:4 .... itype:4 size:2 align:2 rm:4 \ vd=3D%vd_dp + +# Neon load single element to all lanes + +VLD_all_lanes 1111 0100 1 . 1 0 rn:4 .... 11 n:2 size:2 t:1 a:1 rm:4 \ + vd=3D%vd_dp diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 966c0d92012..e60e9559bad 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -398,3 +398,76 @@ static bool trans_VLDST_multiple(DisasContext *s, arg_= VLDST_multiple *a) gen_neon_ldst_base_update(s, a->rm, a->rn, nregs * interleave * 8); return true; } + +static bool trans_VLD_all_lanes(DisasContext *s, arg_VLD_all_lanes *a) +{ + /* Neon load single structure to all lanes */ + int reg, stride, vec_size; + int vd =3D a->vd; + int size =3D a->size; + int nregs =3D a->n + 1; + TCGv_i32 addr, tmp; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist */ + if (!dc_isar_feature(aa32_simd_r32, s) && (a->vd & 0x10)) { + return false; + } + + if (size =3D=3D 3) { + if (nregs !=3D 4 || a->a =3D=3D 0) { + return false; + } + /* For VLD4 size =3D=3D 3 a =3D=3D 1 means 32 bits at 16 byte alig= nment */ + size =3D 2; + } + if (nregs =3D=3D 1 && a->a =3D=3D 1 && size =3D=3D 0) { + return false; + } + if (nregs =3D=3D 3 && a->a =3D=3D 1) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + /* + * VLD1 to all lanes: T bit indicates how many Dregs to write. + * VLD2/3/4 to all lanes: T bit indicates register stride. + */ + stride =3D a->t ? 2 : 1; + vec_size =3D nregs =3D=3D 1 ? stride * 8 : 8; + + tmp =3D tcg_temp_new_i32(); + addr =3D tcg_temp_new_i32(); + load_reg_var(s, addr, a->rn); + for (reg =3D 0; reg < nregs; reg++) { + gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s), + s->be_data | size); + if ((vd & 1) && vec_size =3D=3D 16) { + /* + * We cannot write 16 bytes at once because the + * destination is unaligned. + */ + tcg_gen_gvec_dup_i32(size, neon_reg_offset(vd, 0), + 8, 8, tmp); + tcg_gen_gvec_mov(0, neon_reg_offset(vd + 1, 0), + neon_reg_offset(vd, 0), 8, 8); + } else { + tcg_gen_gvec_dup_i32(size, neon_reg_offset(vd, 0), + vec_size, vec_size, tmp); + } + tcg_gen_addi_i32(addr, addr, 1 << size); + vd +=3D stride; + } + tcg_temp_free_i32(tmp); + tcg_temp_free_i32(addr); + + gen_neon_ldst_base_update(s, a->rm, a->rn, (1 << size) * nregs); + + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index be56cbb0614..7099274c92a 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3224,7 +3224,6 @@ static int disas_neon_ls_insn(DisasContext *s, uint32= _t insn) int size; int reg; int load; - int vec_size; TCGv_i32 addr; TCGv_i32 tmp; =20 @@ -3254,58 +3253,8 @@ static int disas_neon_ls_insn(DisasContext *s, uint3= 2_t insn) } else { size =3D (insn >> 10) & 3; if (size =3D=3D 3) { - /* Load single element to all lanes. */ - int a =3D (insn >> 4) & 1; - if (!load) { - return 1; - } - size =3D (insn >> 6) & 3; - nregs =3D ((insn >> 8) & 3) + 1; - - if (size =3D=3D 3) { - if (nregs !=3D 4 || a =3D=3D 0) { - return 1; - } - /* For VLD4 size=3D=3D3 a =3D=3D 1 means 32 bits at 16 byt= e alignment */ - size =3D 2; - } - if (nregs =3D=3D 1 && a =3D=3D 1 && size =3D=3D 0) { - return 1; - } - if (nregs =3D=3D 3 && a =3D=3D 1) { - return 1; - } - addr =3D tcg_temp_new_i32(); - load_reg_var(s, addr, rn); - - /* VLD1 to all lanes: bit 5 indicates how many Dregs to write. - * VLD2/3/4 to all lanes: bit 5 indicates register stride. - */ - stride =3D (insn & (1 << 5)) ? 2 : 1; - vec_size =3D nregs =3D=3D 1 ? stride * 8 : 8; - - tmp =3D tcg_temp_new_i32(); - for (reg =3D 0; reg < nregs; reg++) { - gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s), - s->be_data | size); - if ((rd & 1) && vec_size =3D=3D 16) { - /* We cannot write 16 bytes at once because the - * destination is unaligned. - */ - tcg_gen_gvec_dup_i32(size, neon_reg_offset(rd, 0), - 8, 8, tmp); - tcg_gen_gvec_mov(0, neon_reg_offset(rd + 1, 0), - neon_reg_offset(rd, 0), 8, 8); - } else { - tcg_gen_gvec_dup_i32(size, neon_reg_offset(rd, 0), - vec_size, vec_size, tmp); - } - tcg_gen_addi_i32(addr, addr, 1 << size); - rd +=3D stride; - } - tcg_temp_free_i32(tmp); - tcg_temp_free_i32(addr); - stride =3D (1 << size) * nregs; + /* Load single element to all lanes -- handled by decodetree = */ + return 1; } else { /* Single element. */ int idx =3D (insn >> 4) & 0xf; --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596276; cv=none; d=zohomail.com; s=zohoarc; b=SNn1KVvaW9Oz1Oo6OyAheBeB6T0HP6wfikSiIvMk87Hqtynj4srV7A/2JtYXTJ5ohnbi2YxLE2H1YZtp9tBqhy3I8xOKntn2gBq+bssXtxubhe7gIb8wu5UQOexXNA1epnoeNk+sxBzYzdSO1lncSsVKxqftMtFo1z2zb5ERiO8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596276; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=MsB9aJ0rw5ikNqwpevc9SfTFrE7HEaRzCm7+w8T3rgo=; b=PSP63i990OAWsCaVyFW15QO02ifMdsTzlGcZZ6ckMiUpCZtBDEZnHUORcRDuo5Hemdou13iS6Dq7IdJFN9gJrkut9t4qXHwPCjn62yxmb1XaP3pmcTNv8dS+2CEUvtDcemvvUTyjJNaJOeAfjQT1ucKznPsz1ZiBG9eI/Edb4T0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596276738225.55846415642736; Mon, 4 May 2020 05:44:36 -0700 (PDT) Received: from localhost ([::1]:53224 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaSZ-0004Pr-9z for importer@patchew.org; Mon, 04 May 2020 08:44:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56646) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaIA-00012l-9q for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:50 -0400 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]:35067) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaI9-0001I5-4T for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:49 -0400 Received: by mail-wr1-x42a.google.com with SMTP id x18so20726087wrq.2 for ; Mon, 04 May 2020 05:33:48 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon "load/store single structure to one lane" insns to decodetree. As this is the last set of insns in the neon load/store group, we can remove the whole disas_neon_ls_insn() function. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-14-peter.maydell@linaro.org --- target/arm/neon-ls.decode | 11 +++ target/arm/translate-neon.inc.c | 89 +++++++++++++++++++ target/arm/translate.c | 147 -------------------------------- 3 files changed, 100 insertions(+), 147 deletions(-) diff --git a/target/arm/neon-ls.decode b/target/arm/neon-ls.decode index f0ab6d2c987..c7b03a72e8d 100644 --- a/target/arm/neon-ls.decode +++ b/target/arm/neon-ls.decode @@ -39,3 +39,14 @@ VLDST_multiple 1111 0100 0 . l:1 0 rn:4 .... itype:4 siz= e:2 align:2 rm:4 \ =20 VLD_all_lanes 1111 0100 1 . 1 0 rn:4 .... 11 n:2 size:2 t:1 a:1 rm:4 \ vd=3D%vd_dp + +# Neon load/store single structure to one lane +%imm1_5_p1 5:1 !function=3Dplus1 +%imm1_6_p1 6:1 !function=3Dplus1 + +VLDST_single 1111 0100 1 . l:1 0 rn:4 .... 00 n:2 reg_idx:3 align:1 rm:4= \ + vd=3D%vd_dp size=3D0 stride=3D1 +VLDST_single 1111 0100 1 . l:1 0 rn:4 .... 01 n:2 reg_idx:2 align:2 rm:4= \ + vd=3D%vd_dp size=3D1 stride=3D%imm1_5_p1 +VLDST_single 1111 0100 1 . l:1 0 rn:4 .... 10 n:2 reg_idx:1 align:3 rm:4= \ + vd=3D%vd_dp size=3D2 stride=3D%imm1_6_p1 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index e60e9559bad..c881d1cf607 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -26,6 +26,11 @@ * It might be possible to convert it to a standalone .c file eventually. */ =20 +static inline int plus1(DisasContext *s, int x) +{ + return x + 1; +} + /* Include the generated Neon decoder */ #include "decode-neon-dp.inc.c" #include "decode-neon-ls.inc.c" @@ -471,3 +476,87 @@ static bool trans_VLD_all_lanes(DisasContext *s, arg_V= LD_all_lanes *a) =20 return true; } + +static bool trans_VLDST_single(DisasContext *s, arg_VLDST_single *a) +{ + /* Neon load/store single structure to one lane */ + int reg; + int nregs =3D a->n + 1; + int vd =3D a->vd; + TCGv_i32 addr, tmp; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist */ + if (!dc_isar_feature(aa32_simd_r32, s) && (a->vd & 0x10)) { + return false; + } + + /* Catch the UNDEF cases. This is unavoidably a bit messy. */ + switch (nregs) { + case 1: + if (((a->align & (1 << a->size)) !=3D 0) || + (a->size =3D=3D 2 && ((a->align & 3) =3D=3D 1 || (a->align & 3= ) =3D=3D 2))) { + return false; + } + break; + case 3: + if ((a->align & 1) !=3D 0) { + return false; + } + /* fall through */ + case 2: + if (a->size =3D=3D 2 && (a->align & 2) !=3D 0) { + return false; + } + break; + case 4: + if ((a->size =3D=3D 2) && ((a->align & 3) =3D=3D 3)) { + return false; + } + break; + default: + abort(); + } + if ((vd + a->stride * (nregs - 1)) > 31) { + /* + * Attempts to write off the end of the register file are + * UNPREDICTABLE; we choose to UNDEF because otherwise we would + * access off the end of the array that holds the register data. + */ + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + tmp =3D tcg_temp_new_i32(); + addr =3D tcg_temp_new_i32(); + load_reg_var(s, addr, a->rn); + /* + * TODO: if we implemented alignment exceptions, we should check + * addr against the alignment encoded in a->align here. + */ + for (reg =3D 0; reg < nregs; reg++) { + if (a->l) { + gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s), + s->be_data | a->size); + neon_store_element(vd, a->reg_idx, a->size, tmp); + } else { /* Store */ + neon_load_element(tmp, vd, a->reg_idx, a->size); + gen_aa32_st_i32(s, tmp, addr, get_mem_index(s), + s->be_data | a->size); + } + vd +=3D a->stride; + tcg_gen_addi_i32(addr, addr, 1 << a->size); + } + tcg_temp_free_i32(addr); + tcg_temp_free_i32(tmp); + + gen_neon_ldst_base_update(s, a->rm, a->rn, (1 << a->size) * nregs); + + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 7099274c92a..613be39ef36 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3213,140 +3213,6 @@ static void gen_neon_trn_u16(TCGv_i32 t0, TCGv_i32 = t1) tcg_temp_free_i32(rd); } =20 - -/* Translate a NEON load/store element instruction. Return nonzero if the - instruction is invalid. */ -static int disas_neon_ls_insn(DisasContext *s, uint32_t insn) -{ - int rd, rn, rm; - int nregs; - int stride; - int size; - int reg; - int load; - TCGv_i32 addr; - TCGv_i32 tmp; - - if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { - return 1; - } - - /* FIXME: this access check should not take precedence over UNDEF - * for invalid encodings; we will generate incorrect syndrome informat= ion - * for attempts to execute invalid vfp/neon encodings with FP disabled. - */ - if (s->fp_excp_el) { - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, - syn_simd_access_trap(1, 0xe, false), s->fp_excp= _el); - return 0; - } - - if (!s->vfp_enabled) - return 1; - VFP_DREG_D(rd, insn); - rn =3D (insn >> 16) & 0xf; - rm =3D insn & 0xf; - load =3D (insn & (1 << 21)) !=3D 0; - if ((insn & (1 << 23)) =3D=3D 0) { - /* Load store all elements -- handled already by decodetree */ - return 1; - } else { - size =3D (insn >> 10) & 3; - if (size =3D=3D 3) { - /* Load single element to all lanes -- handled by decodetree = */ - return 1; - } else { - /* Single element. */ - int idx =3D (insn >> 4) & 0xf; - int reg_idx; - switch (size) { - case 0: - reg_idx =3D (insn >> 5) & 7; - stride =3D 1; - break; - case 1: - reg_idx =3D (insn >> 6) & 3; - stride =3D (insn & (1 << 5)) ? 2 : 1; - break; - case 2: - reg_idx =3D (insn >> 7) & 1; - stride =3D (insn & (1 << 6)) ? 2 : 1; - break; - default: - abort(); - } - nregs =3D ((insn >> 8) & 3) + 1; - /* Catch the UNDEF cases. This is unavoidably a bit messy. */ - switch (nregs) { - case 1: - if (((idx & (1 << size)) !=3D 0) || - (size =3D=3D 2 && ((idx & 3) =3D=3D 1 || (idx & 3) =3D= =3D 2))) { - return 1; - } - break; - case 3: - if ((idx & 1) !=3D 0) { - return 1; - } - /* fall through */ - case 2: - if (size =3D=3D 2 && (idx & 2) !=3D 0) { - return 1; - } - break; - case 4: - if ((size =3D=3D 2) && ((idx & 3) =3D=3D 3)) { - return 1; - } - break; - default: - abort(); - } - if ((rd + stride * (nregs - 1)) > 31) { - /* Attempts to write off the end of the register file - * are UNPREDICTABLE; we choose to UNDEF because otherwise - * the neon_load_reg() would write off the end of the arra= y. - */ - return 1; - } - tmp =3D tcg_temp_new_i32(); - addr =3D tcg_temp_new_i32(); - load_reg_var(s, addr, rn); - for (reg =3D 0; reg < nregs; reg++) { - if (load) { - gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s), - s->be_data | size); - neon_store_element(rd, reg_idx, size, tmp); - } else { /* Store */ - neon_load_element(tmp, rd, reg_idx, size); - gen_aa32_st_i32(s, tmp, addr, get_mem_index(s), - s->be_data | size); - } - rd +=3D stride; - tcg_gen_addi_i32(addr, addr, 1 << size); - } - tcg_temp_free_i32(addr); - tcg_temp_free_i32(tmp); - stride =3D nregs * (1 << size); - } - } - if (rm !=3D 15) { - TCGv_i32 base; - - base =3D load_reg(s, rn); - if (rm =3D=3D 13) { - tcg_gen_addi_i32(base, base, stride); - } else { - TCGv_i32 index; - index =3D load_reg(s, rm); - tcg_gen_add_i32(base, base, index); - tcg_temp_free_i32(index); - } - store_reg(s, rn, base); - } - return 0; -} - static inline void gen_neon_narrow(int size, TCGv_i32 dest, TCGv_i64 src) { switch (size) { @@ -10596,13 +10462,6 @@ static void disas_arm_insn(DisasContext *s, unsign= ed int insn) } return; } - if ((insn & 0x0f100000) =3D=3D 0x04000000) { - /* NEON load/store. */ - if (disas_neon_ls_insn(s, insn)) { - goto illegal_op; - } - return; - } if ((insn & 0x0e000f00) =3D=3D 0x0c000100) { if (arm_dc_feature(s, ARM_FEATURE_IWMMXT)) { /* iWMMXt register transfer. */ @@ -10807,12 +10666,6 @@ static void disas_thumb2_insn(DisasContext *s, uin= t32_t insn) } break; case 12: - if ((insn & 0x01100000) =3D=3D 0x01000000) { - if (disas_neon_ls_insn(s, insn)) { - goto illegal_op; - } - break; - } goto illegal_op; default: illegal_op: --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596844; cv=none; d=zohomail.com; s=zohoarc; b=KyuwZFFNpgpQ5vo1TsNSu00ya0SYSfswUz5z8WXWcmGDYaFEeJiSb5Etu8N1ItJdYwodRZpFjYVI5lUr9JFwQEtOPsUV8IZh247wFM13OGNj3xWSuCkuZK7H7PMgCFOLERLLd0j91nCK2urCimDMd4HaERhi+9fpwDAZpCEUCJ8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596844; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=z4KT7v0mrw5vLzSt/Xa9ojHSKKH+88BzrTrmmEv3EwY=; b=AnB+8kSstUB1nIHANL6uP7aNGJGI7Ya6/dhK6JM6KIn/L+mnq7ctKzZ1m1C18Iol950eU+LThtn+Iu6cbiqHXOoq//kUJGFMU0HTqG4pPUJPUaEnEqIQXORW0GNfh+2tPVgE39fY6TLM9UFAotQOJfn6EatSSHP9NhUDHs0/foI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596844253287.69635131858615; Mon, 4 May 2020 05:54:04 -0700 (PDT) Received: from localhost ([::1]:37370 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVabj-0004KA-2b for importer@patchew.org; Mon, 04 May 2020 08:54:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56652) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaIB-00015k-9v for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:51 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]:53661) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaIA-0001ID-9a for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:51 -0400 Received: by mail-wm1-x32f.google.com with SMTP id k12so8191268wmj.3 for ; Mon, 04 May 2020 05:33:49 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=z4KT7v0mrw5vLzSt/Xa9ojHSKKH+88BzrTrmmEv3EwY=; b=N+D8ZMKAQmDUNsbWRfN3ryIEGxeFWv6eD1dUK98wG1vyvSNQ6gjayeHV80qQrCnqfS gocV8rJGMIw68yKR1B0SeE6Xd3k8+zQuQ21f+ZwrpZSfw03Bn6gA11CuPfg7bP5LfgXI MURDtnvpbPwOwoLj2qS3Xy/CiUO/s0CycPU8vy+ti2PUTUFpKDlkQhkI4NrWSskihVub R6hzx2fP+7GC5mX3HiSeuL/ObD0amjWZLr/EXHf9AuyB/qjw39FNGQnepYq3eei8TBOU WI9p9yeswj8wE/PfOWWbaf5bn+0GRpOBheEoj5HnyRLBnTUvY8jP9XYLtYOi0rXacS2V DNCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=z4KT7v0mrw5vLzSt/Xa9ojHSKKH+88BzrTrmmEv3EwY=; b=BJxricWsMQtL1U5Od3LaNUuKmnavYyGI9FpXTefiPlHJLTw/3lB0e+zlon0CHI4nfM 3Gr8iwQNxdh3xVGY8UkRuhQqMl1JQ2F6af5J+zcOFLAGivSY9cJY31aAU5vop0ZB1fB/ s7oUcrg4dK2gB6X4uxyTapgdkw9FwA9/tyr5p2dprUsbT/i2NSJIyBno6xgUe07GaA8y yDZhlKLPeoYBCzz3M/xD5GD0+WcgzSRo77WU86bxa3MyGtcGJzHrGasaNvPYkPW3HG6Z sId1OPoR2V0Lsx5+37EiiLkn7NmNpYoJs3WaJ2qnMxhCbICqhmjwisN5LDVO/2BW2DpP I4lg== X-Gm-Message-State: AGi0Pub8rmRZx6DEMSv7W3zH+HRPG7lB0JM+1d8zjFtz4BlZeV3ePSxe uBbA2apUOTtYpHZf8ThLPMqIu7I3pzSG7Q== X-Google-Smtp-Source: APiQypJN99if2yFeSsrQYcEJNAEbi7nduEDXF7EyWrR9joaczbx4pcjVROs/e6KJkw4NUZGo+5UpfA== X-Received: by 2002:a7b:c38b:: with SMTP id s11mr14366775wmj.55.1588595628431; Mon, 04 May 2020 05:33:48 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 33/39] target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree Date: Mon, 4 May 2020 13:33:03 +0100 Message-Id: <20200504123309.3808-34-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon 3-reg-same VADD and VSUB insns to decodetree. Note that we don't need the neon_3r_sizes[op] check here because all size values are OK for VADD and VSUB; we'll add this when we convert the first insn that has size restrictions. For this we need one of the GVecGen*Fn typedefs currently in translate-a64.h; move them all to translate.h as a block so they are visible to the 32-bit decoder. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-15-peter.maydell@linaro.org --- target/arm/translate-a64.h | 9 -------- target/arm/translate.h | 9 ++++++++ target/arm/neon-dp.decode | 17 +++++++++++++++ target/arm/translate-neon.inc.c | 38 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 14 ++++-------- 5 files changed, 68 insertions(+), 19 deletions(-) diff --git a/target/arm/translate-a64.h b/target/arm/translate-a64.h index 4c2c91ae1b2..f02fbb63a4a 100644 --- a/target/arm/translate-a64.h +++ b/target/arm/translate-a64.h @@ -115,13 +115,4 @@ static inline int vec_full_reg_size(DisasContext *s) =20 bool disas_sve(DisasContext *, uint32_t); =20 -/* Note that the gvec expanders operate on offsets + sizes. */ -typedef void GVecGen2Fn(unsigned, uint32_t, uint32_t, uint32_t, uint32_t); -typedef void GVecGen2iFn(unsigned, uint32_t, uint32_t, int64_t, - uint32_t, uint32_t); -typedef void GVecGen3Fn(unsigned, uint32_t, uint32_t, - uint32_t, uint32_t, uint32_t); -typedef void GVecGen4Fn(unsigned, uint32_t, uint32_t, uint32_t, - uint32_t, uint32_t, uint32_t); - #endif /* TARGET_ARM_TRANSLATE_A64_H */ diff --git a/target/arm/translate.h b/target/arm/translate.h index 98b319f3f69..95b43e7ab65 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -305,4 +305,13 @@ void gen_sshl_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); #define dc_isar_feature(name, ctx) \ ({ DisasContext *ctx_ =3D (ctx); isar_feature_##name(ctx_->isar); }) =20 +/* Note that the gvec expanders operate on offsets + sizes. */ +typedef void GVecGen2Fn(unsigned, uint32_t, uint32_t, uint32_t, uint32_t); +typedef void GVecGen2iFn(unsigned, uint32_t, uint32_t, int64_t, + uint32_t, uint32_t); +typedef void GVecGen3Fn(unsigned, uint32_t, uint32_t, + uint32_t, uint32_t, uint32_t); +typedef void GVecGen4Fn(unsigned, uint32_t, uint32_t, uint32_t, + uint32_t, uint32_t, uint32_t); + #endif /* TARGET_ARM_TRANSLATE_H */ diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index c89a1a58591..a61b1e88476 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -18,6 +18,10 @@ # # This file is processed by scripts/decodetree.py # +# VFP/Neon register fields; same as vfp.decode +%vm_dp 5:1 0:4 +%vn_dp 7:1 16:4 +%vd_dp 22:1 12:4 =20 # Encodings for Neon data processing instructions where the T32 encoding # is a simple transformation of the A32 encoding. @@ -27,3 +31,16 @@ # 0b111p_1111_qqqq_qqqq_qqqq_qqqq_qqqq_qqqq # This file works on the A32 encoding only; calling code for T32 has to # transform the insn into the A32 version first. + +###################################################################### +# 3-reg-same grouping: +# 1111 001 U 0 D sz:2 Vn:4 Vd:4 opc:4 N Q M op Vm:4 +###################################################################### + +&3same vm vn vd q size + +@3same .... ... . . . size:2 .... .... .... . q:1 . . .... \ + &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp + +VADD_3s 1111 001 0 0 . .. .... .... 1000 . . . 0 .... @3same +VSUB_3s 1111 001 1 0 . .. .... .... 1000 . . . 0 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index c881d1cf607..bd9e697b3e2 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -560,3 +560,41 @@ static bool trans_VLDST_single(DisasContext *s, arg_VL= DST_single *a) =20 return true; } + +static bool do_3same(DisasContext *s, arg_3same *a, GVecGen3Fn fn) +{ + int vec_size =3D a->q ? 16 : 8; + int rd_ofs =3D neon_reg_offset(a->vd, 0); + int rn_ofs =3D neon_reg_offset(a->vn, 0); + int rm_ofs =3D neon_reg_offset(a->vm, 0); + + if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vn | a->vm | a->vd) & a->q) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + fn(a->size, rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size); + return true; +} + +#define DO_3SAME(INSN, FUNC) \ + static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \ + { \ + return do_3same(s, a, FUNC); \ + } + +DO_3SAME(VADD, tcg_gen_gvec_add) +DO_3SAME(VSUB, tcg_gen_gvec_sub) diff --git a/target/arm/translate.c b/target/arm/translate.c index 613be39ef36..061bc7c31c9 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4885,16 +4885,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) } return 0; =20 - case NEON_3R_VADD_VSUB: - if (u) { - tcg_gen_gvec_sub(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } else { - tcg_gen_gvec_add(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } - return 0; - case NEON_3R_VQADD: tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), rn_ofs, rm_ofs, vec_size, vec_size, @@ -4970,6 +4960,10 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) tcg_gen_gvec_3(rd_ofs, rm_ofs, rn_ofs, vec_size, vec_size, u ? &ushl_op[size] : &sshl_op[size]); return 0; + + case NEON_3R_VADD_VSUB: + /* Already handled by decodetree */ + return 1; } =20 if (size =3D=3D 3) { --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596913; cv=none; d=zohomail.com; s=zohoarc; b=J69HgOmSXdio0TwwcPZuSZWi3oX/FsaFm0M5QMx7fKDk0t4QeD88/Ji0wdXR7ISSIbXu7Sya7/wKir9IDOpbCM4Ef0JM2K5T80ao9jlfQlXQ8I4ney4TTeNb0FrwHFL0wURvGuNUjhO17DjZ2RlEr/P8HLej31BoFGcURrf6WVI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596913; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=g++wUoq6vldDFh+xfURkEagD8VQSYf3z+WvonduPSWo=; b=IcIIVSZAh5sBmUaUbUtAxqJWeHSrVA/mgjmCDJ6BEuwAfUCYovLRh+TXFPgNIZL0iRt795mmfHtYwX7lyFXiobscP0JSrqI1xAxA5R+huZGFAkoVcxXtUSD/cmmHSYvI0EKxly0/ik5xg+ii7Swytbwjpi0vxFY1q0fPGB1JtW4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 158859691368752.77540693086496; Mon, 4 May 2020 05:55:13 -0700 (PDT) Received: from localhost ([::1]:41740 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVacq-00065u-AI for importer@patchew.org; Mon, 04 May 2020 08:55:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56658) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaIC-00018K-Cy for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:52 -0400 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]:36110) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaIB-0001IQ-Cq for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:52 -0400 Received: by mail-wr1-x42a.google.com with SMTP id d15so20720456wrx.3 for ; Mon, 04 May 2020 05:33:50 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon logic ops in the 3-reg-same grouping to decodetree. Note that for the logic ops the 'size' field forms part of their decode and the actual operations are always bitwise. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-16-peter.maydell@linaro.org --- target/arm/neon-dp.decode | 12 +++++++++++ target/arm/translate-neon.inc.c | 19 +++++++++++++++++ target/arm/translate.c | 38 +-------------------------------- 3 files changed, 32 insertions(+), 37 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index a61b1e88476..f62dbaa72d5 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -42,5 +42,17 @@ @3same .... ... . . . size:2 .... .... .... . q:1 . . .... \ &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp =20 +@3same_logic .... ... . . . .. .... .... .... . q:1 .. .... \ + &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp size=3D0 + +VAND_3s 1111 001 0 0 . 00 .... .... 0001 ... 1 .... @3same_logic +VBIC_3s 1111 001 0 0 . 01 .... .... 0001 ... 1 .... @3same_logic +VORR_3s 1111 001 0 0 . 10 .... .... 0001 ... 1 .... @3same_logic +VORN_3s 1111 001 0 0 . 11 .... .... 0001 ... 1 .... @3same_logic +VEOR_3s 1111 001 1 0 . 00 .... .... 0001 ... 1 .... @3same_logic +VBSL_3s 1111 001 1 0 . 01 .... .... 0001 ... 1 .... @3same_logic +VBIT_3s 1111 001 1 0 . 10 .... .... 0001 ... 1 .... @3same_logic +VBIF_3s 1111 001 1 0 . 11 .... .... 0001 ... 1 .... @3same_logic + VADD_3s 1111 001 0 0 . .. .... .... 1000 . . . 0 .... @3same VSUB_3s 1111 001 1 0 . .. .... .... 1000 . . . 0 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index bd9e697b3e2..507f0abe801 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -598,3 +598,22 @@ static bool do_3same(DisasContext *s, arg_3same *a, GV= ecGen3Fn fn) =20 DO_3SAME(VADD, tcg_gen_gvec_add) DO_3SAME(VSUB, tcg_gen_gvec_sub) +DO_3SAME(VAND, tcg_gen_gvec_and) +DO_3SAME(VBIC, tcg_gen_gvec_andc) +DO_3SAME(VORR, tcg_gen_gvec_or) +DO_3SAME(VORN, tcg_gen_gvec_orc) +DO_3SAME(VEOR, tcg_gen_gvec_xor) + +/* These insns are all gvec_bitsel but with the inputs in various orders. = */ +#define DO_3SAME_BITSEL(INSN, O1, O2, O3) \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + tcg_gen_gvec_bitsel(vece, rd_ofs, O1, O2, O3, oprsz, maxsz); \ + } \ + DO_3SAME(INSN, gen_##INSN##_3s) + +DO_3SAME_BITSEL(VBSL, rd_ofs, rn_ofs, rm_ofs) +DO_3SAME_BITSEL(VBIT, rm_ofs, rn_ofs, rd_ofs) +DO_3SAME_BITSEL(VBIF, rm_ofs, rd_ofs, rn_ofs) diff --git a/target/arm/translate.c b/target/arm/translate.c index 061bc7c31c9..9affa92cbe7 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4848,43 +4848,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) } return 1; =20 - case NEON_3R_LOGIC: /* Logic ops. */ - switch ((u << 2) | size) { - case 0: /* VAND */ - tcg_gen_gvec_and(0, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - break; - case 1: /* VBIC */ - tcg_gen_gvec_andc(0, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - break; - case 2: /* VORR */ - tcg_gen_gvec_or(0, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - break; - case 3: /* VORN */ - tcg_gen_gvec_orc(0, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - break; - case 4: /* VEOR */ - tcg_gen_gvec_xor(0, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - break; - case 5: /* VBSL */ - tcg_gen_gvec_bitsel(MO_8, rd_ofs, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - break; - case 6: /* VBIT */ - tcg_gen_gvec_bitsel(MO_8, rd_ofs, rm_ofs, rn_ofs, rd_ofs, - vec_size, vec_size); - break; - case 7: /* VBIF */ - tcg_gen_gvec_bitsel(MO_8, rd_ofs, rm_ofs, rd_ofs, rn_ofs, - vec_size, vec_size); - break; - } - return 0; - case NEON_3R_VQADD: tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), rn_ofs, rm_ofs, vec_size, vec_size, @@ -4962,6 +4925,7 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) return 0; =20 case NEON_3R_VADD_VSUB: + case NEON_3R_LOGIC: /* Already handled by decodetree */ return 1; } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=PB2k+btSaeaPZEheXtOJspuO2CstyB/BRj+8mRMF+Qs=; b=ktYfZCggCGlbsO2NS8BoNU8VB2IBhsA/FUAq+ySJNZWxYDUskWqd6o7ysgmqGh+1xy MoFjxJvdHGUXNV6VLBIb9JgVwzlZWbJAxuvWUHwRw7sbQT03Ksp1qsHWx/wlfjKkad6L T6imyPlkMWbPCP8MhlPy13C5EetRVJEupVZG2NtYCaHlErT1WgXNGwpnJvWVCPJUjzuQ NrWDREr3zv5E8ikR5MSssCxKS2IpsszExuBrT6ePXYSuRWGWVOYG+ezs6ouFUzReO4HM 7+KaPfJboJdinu/6pcwhCpp3sSYovKmfZ6/BTk3dRsmAMhOR+WeQM/AyK6/GfKo5c0/0 oDHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PB2k+btSaeaPZEheXtOJspuO2CstyB/BRj+8mRMF+Qs=; b=OAB0hK33BZ88yiVOUD+rfJadFTUWTSaUJQ8WdlgiXohLUpxwaqHwkOxs3Jednk02Zs AgcL/noJxjtZLhWhwORRC6pTfVOhnEZMeepwfIT/kwen+ln0x6XRv4r4kQLkB0kRMcen jv9bbJkWNgXvmIXDUJfUS6lBg1vIny2ZRI3B7Y1fXO4E3+0F0byLQ6aGPEtEH20grIi1 ytFFX2KJ2xw1vMFTI4WH3iOCDw9WQIXQpXw7/Z+8CPxeyD+lMcYV0ibpMtZy6L4fN7KD 1plU67Ugh6ATYdsXT9yzOsm6ec6PPR2rwCVBnCPpBb9DYLeGXuw+SLaqSJ3lbpiia8Jm jaJQ== X-Gm-Message-State: AGi0PuaWfOEt461KNIsNsTW57/VAba0OPRFbFg40LJYGdP3XZG3PXCnR fI9oNaBEKC2Uhyot2LgsUc62zA2MjO8YYw== X-Google-Smtp-Source: APiQypKkFoSBOPDQhv0KZEEa4tXF/pepKiIYQGoRnzTHRyVOM/Rp+4lfSoTNLKashvwb42OI0l6qBQ== X-Received: by 2002:adf:ab18:: with SMTP id q24mr18586023wrc.214.1588595630676; Mon, 04 May 2020 05:33:50 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 35/39] target/arm: Convert Neon 3-reg-same VMAX/VMIN to decodetree Date: Mon, 4 May 2020 13:33:05 +0100 Message-Id: <20200504123309.3808-36-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon 3-reg-same VMAX and VMIN insns to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-17-peter.maydell@linaro.org --- target/arm/neon-dp.decode | 5 +++++ target/arm/translate-neon.inc.c | 14 ++++++++++++++ target/arm/translate.c | 21 ++------------------- 3 files changed, 21 insertions(+), 19 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index f62dbaa72d5..b721d39c7ba 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -54,5 +54,10 @@ VBSL_3s 1111 001 1 0 . 01 .... .... 0001 ... 1 = .... @3same_logic VBIT_3s 1111 001 1 0 . 10 .... .... 0001 ... 1 .... @3same_logic VBIF_3s 1111 001 1 0 . 11 .... .... 0001 ... 1 .... @3same_logic =20 +VMAX_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 0 .... @3same +VMAX_U_3s 1111 001 1 0 . .. .... .... 0110 . . . 0 .... @3same +VMIN_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 1 .... @3same +VMIN_U_3s 1111 001 1 0 . .. .... .... 0110 . . . 1 .... @3same + VADD_3s 1111 001 0 0 . .. .... .... 1000 . . . 0 .... @3same VSUB_3s 1111 001 1 0 . .. .... .... 1000 . . . 0 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 507f0abe801..ab1740201c4 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -617,3 +617,17 @@ DO_3SAME(VEOR, tcg_gen_gvec_xor) DO_3SAME_BITSEL(VBSL, rd_ofs, rn_ofs, rm_ofs) DO_3SAME_BITSEL(VBIT, rm_ofs, rn_ofs, rd_ofs) DO_3SAME_BITSEL(VBIF, rm_ofs, rd_ofs, rn_ofs) + +#define DO_3SAME_NO_SZ_3(INSN, FUNC) \ + static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \ + { \ + if (a->size =3D=3D 3) { = \ + return false; \ + } \ + return do_3same(s, a, FUNC); \ + } + +DO_3SAME_NO_SZ_3(VMAX_S, tcg_gen_gvec_smax) +DO_3SAME_NO_SZ_3(VMAX_U, tcg_gen_gvec_umax) +DO_3SAME_NO_SZ_3(VMIN_S, tcg_gen_gvec_smin) +DO_3SAME_NO_SZ_3(VMIN_U, tcg_gen_gvec_umin) diff --git a/target/arm/translate.c b/target/arm/translate.c index 9affa92cbe7..2f054cfa783 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4899,25 +4899,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size); return 0; =20 - case NEON_3R_VMAX: - if (u) { - tcg_gen_gvec_umax(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } else { - tcg_gen_gvec_smax(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } - return 0; - case NEON_3R_VMIN: - if (u) { - tcg_gen_gvec_umin(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } else { - tcg_gen_gvec_smin(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } - return 0; - case NEON_3R_VSHL: /* Note the operation is vshl vd,vm,vn */ tcg_gen_gvec_3(rd_ofs, rm_ofs, rn_ofs, vec_size, vec_size, @@ -4926,6 +4907,8 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) =20 case NEON_3R_VADD_VSUB: case NEON_3R_LOGIC: + case NEON_3R_VMAX: + case NEON_3R_VMIN: /* Already handled by decodetree */ return 1; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=xEeT1kQKm2VJdMcCBAQyxewPYik69v57HfRFb5sdhOo=; b=Js4jBdWCKPBT63lhW6eSNPkht84nJyO5gmjxx1EeHG0Y3R2VVZfgYtXdOYwZ8Qor2G F3wxoV0/ZSze/8dN6j5Jl6OQfZSNpilz8CPSnh3coHNS5l9FOLUGpckIuEmhj9Jmd6p3 ImSzd+k2AwrsmK3lptnpa3iVyf45xneAPsfltPn3GPTYwDCEolpNlIeQyp6vpQR7d9YG BnOeZjpNXTb0J2blyQazSZY5jZI/RioYfmkY2muCg4nwQ1c19GvVA2h8GwidHSYlmy6H 941Bon8pTK68MQygng/TFGhYaJsQ36FmjUsXMVy43WbIO9pURd5cfr8Mtas5PvZu8RvA 42QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xEeT1kQKm2VJdMcCBAQyxewPYik69v57HfRFb5sdhOo=; b=jxDv6rCoyvl3P9HFqOlePJSumcoXF0PtdQwlcLAUDVc4gxgkrP4CDUMT1wzYpCeUwp VGQoVedI1qYVXnFgo4KCvNHBaXfE3ZQoTSFdHGtW1VAEgBfS/PDXdJqUO890AEptCFJ9 pNx4HTVV7bnSsKccb1Ulo1ltbTzG7/2dRJIegn6ccMbziEHnuaTUwmYemYuzYbJFcn0G S+DH2u66oxUP86hUzOTWzYrBl7OfNEkCAj/StkEq0t2e3wEbYqcH7JFisMcdHFMgoQaX huW6olohV62mWZ3/UrJwQLpeSYwA3PUuxMXHkImGItc3YGc8vEQP8h2DOlEzM/ELCKLV 0OPQ== X-Gm-Message-State: AGi0PuZsiOVbKjQmcdLXQH8WrriOiYW4rsM6zQ7M0mkhksXhexVlIi/t 7h6uGQm/j4HB+xK7vfxdm9YAbTSKmofUjg== X-Google-Smtp-Source: APiQypIuuVWbp7c0BEXkurHd7QxjruwHzXhokSRlyRPlecZOP7qEHQ0h/kR06KGXkKSt138B3S7qfQ== X-Received: by 2002:a1c:9cc6:: with SMTP id f189mr14122377wme.75.1588595631684; Mon, 04 May 2020 05:33:51 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 36/39] target/arm: Convert Neon 3-reg-same comparisons to decodetree Date: Mon, 4 May 2020 13:33:06 +0100 Message-Id: <20200504123309.3808-37-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x336.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon comparison ops in the 3-reg-same grouping to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-18-peter.maydell@linaro.org --- target/arm/neon-dp.decode | 8 ++++++++ target/arm/translate-neon.inc.c | 22 ++++++++++++++++++++++ target/arm/translate.c | 23 +++-------------------- 3 files changed, 33 insertions(+), 20 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index b721d39c7ba..b89ea6819a9 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -54,6 +54,11 @@ VBSL_3s 1111 001 1 0 . 01 .... .... 0001 ... 1 = .... @3same_logic VBIT_3s 1111 001 1 0 . 10 .... .... 0001 ... 1 .... @3same_logic VBIF_3s 1111 001 1 0 . 11 .... .... 0001 ... 1 .... @3same_logic =20 +VCGT_S_3s 1111 001 0 0 . .. .... .... 0011 . . . 0 .... @3same +VCGT_U_3s 1111 001 1 0 . .. .... .... 0011 . . . 0 .... @3same +VCGE_S_3s 1111 001 0 0 . .. .... .... 0011 . . . 1 .... @3same +VCGE_U_3s 1111 001 1 0 . .. .... .... 0011 . . . 1 .... @3same + VMAX_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 0 .... @3same VMAX_U_3s 1111 001 1 0 . .. .... .... 0110 . . . 0 .... @3same VMIN_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 1 .... @3same @@ -61,3 +66,6 @@ VMIN_U_3s 1111 001 1 0 . .. .... .... 0110 . . . 1= .... @3same =20 VADD_3s 1111 001 0 0 . .. .... .... 1000 . . . 0 .... @3same VSUB_3s 1111 001 1 0 . .. .... .... 1000 . . . 0 .... @3same + +VTST_3s 1111 001 0 0 . .. .... .... 1000 . . . 1 .... @3same +VCEQ_3s 1111 001 1 0 . .. .... .... 1000 . . . 1 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index ab1740201c4..952e4456f5e 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -631,3 +631,25 @@ DO_3SAME_NO_SZ_3(VMAX_S, tcg_gen_gvec_smax) DO_3SAME_NO_SZ_3(VMAX_U, tcg_gen_gvec_umax) DO_3SAME_NO_SZ_3(VMIN_S, tcg_gen_gvec_smin) DO_3SAME_NO_SZ_3(VMIN_U, tcg_gen_gvec_umin) + +#define DO_3SAME_CMP(INSN, COND) \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + tcg_gen_gvec_cmp(COND, vece, rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz)= ; \ + } \ + DO_3SAME_NO_SZ_3(INSN, gen_##INSN##_3s) + +DO_3SAME_CMP(VCGT_S, TCG_COND_GT) +DO_3SAME_CMP(VCGT_U, TCG_COND_GTU) +DO_3SAME_CMP(VCGE_S, TCG_COND_GE) +DO_3SAME_CMP(VCGE_U, TCG_COND_GEU) +DO_3SAME_CMP(VCEQ, TCG_COND_EQ) + +static void gen_VTST_3s(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, + uint32_t rm_ofs, uint32_t oprsz, uint32_t maxsz) +{ + tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &cmtst_op[vece]); +} +DO_3SAME_NO_SZ_3(VTST, gen_VTST_3s) diff --git a/target/arm/translate.c b/target/arm/translate.c index 2f054cfa783..0e6ecc0969a 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4879,26 +4879,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) u ? &mls_op[size] : &mla_op[size]); return 0; =20 - case NEON_3R_VTST_VCEQ: - if (u) { /* VCEQ */ - tcg_gen_gvec_cmp(TCG_COND_EQ, size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } else { /* VTST */ - tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size, &cmtst_op[size]); - } - return 0; - - case NEON_3R_VCGT: - tcg_gen_gvec_cmp(u ? TCG_COND_GTU : TCG_COND_GT, size, - rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size); - return 0; - - case NEON_3R_VCGE: - tcg_gen_gvec_cmp(u ? TCG_COND_GEU : TCG_COND_GE, size, - rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size); - return 0; - case NEON_3R_VSHL: /* Note the operation is vshl vd,vm,vn */ tcg_gen_gvec_3(rd_ofs, rm_ofs, rn_ofs, vec_size, vec_size, @@ -4909,6 +4889,9 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_LOGIC: case NEON_3R_VMAX: case NEON_3R_VMIN: + case NEON_3R_VTST_VCEQ: + case NEON_3R_VCGT: + case NEON_3R_VCGE: /* Already handled by decodetree */ return 1; } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588597036; cv=none; d=zohomail.com; s=zohoarc; b=S6St4E7AdZxp31pvJ+Qwuqre9xoUyJnYgPWC+4m4+C/e8LqoYhRztQvfXiFS7asOzFEDhl81bFY2P3AH3tXy/oxPQpbmD7ubnY+E7TWCL2OQsOx75FMTScwgbw+iBEZL5Vlv1dv9FMBj8+xzdZdfG2GUZmd8HPjFDMSE5GJNfGE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588597036; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=F47px45/kNqtLBz6+gTIk2HQWztn0jEg0nnhhZt81tM=; b=ljU6KoP2R0biHF6t94KZD8lpLKmBjhWkLRL0uWXD7/nej6cStJ251um9FlJ6qKSYfL1jfzBj36FCh1OR/9WzSgrJtyV3n2tnv5a8ZCx+ukHdAAfq0JvjmSq9UVwbKWAvnB4lrMUOyJC1LlgKIJvgGHA+ie3c2yv7c8e8tlYRG9E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588597036055304.4755661552955; Mon, 4 May 2020 05:57:16 -0700 (PDT) Received: from localhost ([::1]:46970 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaeo-0008Qe-EJ for importer@patchew.org; Mon, 04 May 2020 08:57:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56682) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaIF-0001Fw-6B for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:55 -0400 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:38809) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaIE-0001Iq-95 for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:54 -0400 Received: by mail-wr1-x443.google.com with SMTP id x17so20701779wrt.5 for ; Mon, 04 May 2020 05:33:53 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=F47px45/kNqtLBz6+gTIk2HQWztn0jEg0nnhhZt81tM=; b=Knx6nOk9Qa+0/a0osqSlcUQlBjgFFbXuRKoca8h1AJmMOivUhkPs/gm/IuaVreNPKy LX43E/l+yIY3s3O+F7psHTRc3ScN5hiGET7IhNcuuKzHrqOQuHARop1BVte5aLkpyXSt EWnxNVPg0XLTb33Pu7qR8aFilK5hq9grngH4J0a5QWpwG6fPN6IFQTpu9RQ8vW9O6tKQ MsJVGHE1JuOTX52Se1DdEcjEQy4Af1DulQ98UpxyF08P9WxqLkllUlmOxmjHpiOrJEvD 1HUTBIIY99EHp/xEUmYuQjWtiTdxnEYPKcEDNfzhWmfFegDe1hqZAzkbOQpTccfk4OFr WDbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=F47px45/kNqtLBz6+gTIk2HQWztn0jEg0nnhhZt81tM=; b=kLMwNwBGCv9oTpLNfC/FuVxl+BfwU+9hVSKprdb71IZ+621VfVxC3SEpz8V46IXwxb W7XJfzXyZPLokwILxuz0kfiPb8PFqu5ZdDt4kvHPyZB5SsG3/f1CkOOAt/hZWY2MmD82 vi4Fd7apUzKJc2wGtL6k1j3flLd1Q98Eir64ff3VWKMYeKKbGqn6KzkIDZliHPM5KUsR VHG8lMCb7Vua/Kjj+RWbVAJFHgMBcivUk1k1yFZ2T+FCbxBxNeQYabvWb3lthQiknsTS x3ephS1kD6GwOI+RwMnUWb1ZbeFOx+qM3rJWUoycf4oeHC1LGiq6pmxpCLyuPoVoQZqf WAzw== X-Gm-Message-State: AGi0PuY5gIfelLnDJHFPBJLzrM1FflxOSOsdBlEPbltZa5orFHYn0U9R PsZyu5mY55+05p4wCTVa1tJP7HHOPptVpQ== X-Google-Smtp-Source: APiQypJ4gXwyOVfAgtXdKCJsaRVpAjHdB5qwpn++0BtOiHwmEQisuv1bGH38hA0k6R04sJGqNPfKhw== X-Received: by 2002:adf:fe51:: with SMTP id m17mr18560031wrs.414.1588595632634; Mon, 04 May 2020 05:33:52 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 37/39] target/arm: Convert Neon 3-reg-same VQADD/VQSUB to decodetree Date: Mon, 4 May 2020 13:33:07 +0100 Message-Id: <20200504123309.3808-38-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon VQADD/VQSUB insns in the 3-reg-same grouping to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-19-peter.maydell@linaro.org --- target/arm/neon-dp.decode | 6 ++++++ target/arm/translate-neon.inc.c | 15 +++++++++++++++ target/arm/translate.c | 14 ++------------ 3 files changed, 23 insertions(+), 12 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index b89ea6819a9..ab59b349aaa 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -42,6 +42,9 @@ @3same .... ... . . . size:2 .... .... .... . q:1 . . .... \ &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp =20 +VQADD_S_3s 1111 001 0 0 . .. .... .... 0000 . . . 1 .... @3same +VQADD_U_3s 1111 001 1 0 . .. .... .... 0000 . . . 1 .... @3same + @3same_logic .... ... . . . .. .... .... .... . q:1 .. .... \ &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp size=3D0 =20 @@ -54,6 +57,9 @@ VBSL_3s 1111 001 1 0 . 01 .... .... 0001 ... 1 .= ... @3same_logic VBIT_3s 1111 001 1 0 . 10 .... .... 0001 ... 1 .... @3same_logic VBIF_3s 1111 001 1 0 . 11 .... .... 0001 ... 1 .... @3same_logic =20 +VQSUB_S_3s 1111 001 0 0 . .. .... .... 0010 . . . 1 .... @3same +VQSUB_U_3s 1111 001 1 0 . .. .... .... 0010 . . . 1 .... @3same + VCGT_S_3s 1111 001 0 0 . .. .... .... 0011 . . . 0 .... @3same VCGT_U_3s 1111 001 1 0 . .. .... .... 0011 . . . 0 .... @3same VCGE_S_3s 1111 001 0 0 . .. .... .... 0011 . . . 1 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 952e4456f5e..854ab70cd79 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -653,3 +653,18 @@ static void gen_VTST_3s(unsigned vece, uint32_t rd_ofs= , uint32_t rn_ofs, tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &cmtst_op[vece]); } DO_3SAME_NO_SZ_3(VTST, gen_VTST_3s) + +#define DO_3SAME_GVEC4(INSN, OPARRAY) \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), \ + rn_ofs, rm_ofs, oprsz, maxsz, &OPARRAY[vece]); \ + } \ + DO_3SAME(INSN, gen_##INSN##_3s) + +DO_3SAME_GVEC4(VQADD_S, sqadd_op) +DO_3SAME_GVEC4(VQADD_U, uqadd_op) +DO_3SAME_GVEC4(VQSUB_S, sqsub_op) +DO_3SAME_GVEC4(VQSUB_U, uqsub_op) diff --git a/target/arm/translate.c b/target/arm/translate.c index 0e6ecc0969a..13ce1a5fc1d 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4848,18 +4848,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) } return 1; =20 - case NEON_3R_VQADD: - tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), - rn_ofs, rm_ofs, vec_size, vec_size, - (u ? uqadd_op : sqadd_op) + size); - return 0; - - case NEON_3R_VQSUB: - tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), - rn_ofs, rm_ofs, vec_size, vec_size, - (u ? uqsub_op : sqsub_op) + size); - return 0; - case NEON_3R_VMUL: /* VMUL */ if (u) { /* Polynomial case allows only P8. */ @@ -4892,6 +4880,8 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VTST_VCEQ: case NEON_3R_VCGT: case NEON_3R_VCGE: + case NEON_3R_VQADD: + case NEON_3R_VQSUB: /* Already handled by decodetree */ return 1; } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588596362; cv=none; d=zohomail.com; s=zohoarc; b=RrA4XxabGxv6tlHA3Itp9zzhjj6crfamsAWCU5BDmKgugJ9KMfG47x4ohm9RQmg65UeoApLS3El4+YSyKrRexJTJUwXX9HCvhny3eL8MlRQggurQwNa962bLMmJ2ubBp+dID31kf4+WAp9Tcklp0V2B3hcpj77+05pyw8KU7OQw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588596362; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=k+auw6GnoooTvjmohrID71iS0A2v1EONDZbnfxDt2JM=; b=fIMruAnmycFUv6dnAIBDLH7xaMMbEH0Jfo9sD1FwokoOh6YSph5j+5TiKl/gGWOme8r69r3L394XfbAny8MfcYaDIMHkd3PTXEAkHPbYAtN7b0odYONRFlyVwlSI128uEOkBFruC9g0GXp5iPpWXTjzPG389Irmp9V4wczj9ODg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588596362294442.3143006126512; Mon, 4 May 2020 05:46:02 -0700 (PDT) Received: from localhost ([::1]:59738 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVaTw-0007AX-Uq for importer@patchew.org; Mon, 04 May 2020 08:46:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56692) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaIG-0001Jl-Gk for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:56 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:50436) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaIF-0001J1-Gd for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:56 -0400 Received: by mail-wm1-x32e.google.com with SMTP id x25so8241584wmc.0 for ; Mon, 04 May 2020 05:33:55 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon VMUL, VMLA, VMLS and VSHL insns in the 3-reg-same grouping to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-20-peter.maydell@linaro.org --- target/arm/neon-dp.decode | 9 +++++++ target/arm/translate-neon.inc.c | 44 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 28 +++------------------ 3 files changed, 56 insertions(+), 25 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index ab59b349aaa..ec3a92fe753 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -65,6 +65,9 @@ VCGT_U_3s 1111 001 1 0 . .. .... .... 0011 . . . 0= .... @3same VCGE_S_3s 1111 001 0 0 . .. .... .... 0011 . . . 1 .... @3same VCGE_U_3s 1111 001 1 0 . .. .... .... 0011 . . . 1 .... @3same =20 +VSHL_S_3s 1111 001 0 0 . .. .... .... 0100 . . . 0 .... @3same +VSHL_U_3s 1111 001 1 0 . .. .... .... 0100 . . . 0 .... @3same + VMAX_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 0 .... @3same VMAX_U_3s 1111 001 1 0 . .. .... .... 0110 . . . 0 .... @3same VMIN_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 1 .... @3same @@ -75,3 +78,9 @@ VSUB_3s 1111 001 1 0 . .. .... .... 1000 . . . 0= .... @3same =20 VTST_3s 1111 001 0 0 . .. .... .... 1000 . . . 1 .... @3same VCEQ_3s 1111 001 1 0 . .. .... .... 1000 . . . 1 .... @3same + +VMLA_3s 1111 001 0 0 . .. .... .... 1001 . . . 0 .... @3same +VMLS_3s 1111 001 1 0 . .. .... .... 1001 . . . 0 .... @3same + +VMUL_3s 1111 001 0 0 . .. .... .... 1001 . . . 1 .... @3same +VMUL_p_3s 1111 001 1 0 . .. .... .... 1001 . . . 1 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 854ab70cd79..50b77b6d714 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -631,6 +631,7 @@ DO_3SAME_NO_SZ_3(VMAX_S, tcg_gen_gvec_smax) DO_3SAME_NO_SZ_3(VMAX_U, tcg_gen_gvec_umax) DO_3SAME_NO_SZ_3(VMIN_S, tcg_gen_gvec_smin) DO_3SAME_NO_SZ_3(VMIN_U, tcg_gen_gvec_umin) +DO_3SAME_NO_SZ_3(VMUL, tcg_gen_gvec_mul) =20 #define DO_3SAME_CMP(INSN, COND) \ static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ @@ -668,3 +669,46 @@ DO_3SAME_GVEC4(VQADD_S, sqadd_op) DO_3SAME_GVEC4(VQADD_U, uqadd_op) DO_3SAME_GVEC4(VQSUB_S, sqsub_op) DO_3SAME_GVEC4(VQSUB_U, uqsub_op) + +static void gen_VMUL_p_3s(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, + uint32_t rm_ofs, uint32_t oprsz, uint32_t maxsz) +{ + tcg_gen_gvec_3_ool(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, + 0, gen_helper_gvec_pmul_b); +} + +static bool trans_VMUL_p_3s(DisasContext *s, arg_3same *a) +{ + if (a->size !=3D 0) { + return false; + } + return do_3same(s, a, gen_VMUL_p_3s); +} + +#define DO_3SAME_GVEC3_NO_SZ_3(INSN, OPARRAY) \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, \ + oprsz, maxsz, &OPARRAY[vece]); \ + } \ + DO_3SAME_NO_SZ_3(INSN, gen_##INSN##_3s) + + +DO_3SAME_GVEC3_NO_SZ_3(VMLA, mla_op) +DO_3SAME_GVEC3_NO_SZ_3(VMLS, mls_op) + +#define DO_3SAME_GVEC3_SHIFT(INSN, OPARRAY) \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + /* Note the operation is vshl vd,vm,vn */ \ + tcg_gen_gvec_3(rd_ofs, rm_ofs, rn_ofs, \ + oprsz, maxsz, &OPARRAY[vece]); \ + } \ + DO_3SAME(INSN, gen_##INSN##_3s) + +DO_3SAME_GVEC3_SHIFT(VSHL_S, sshl_op) +DO_3SAME_GVEC3_SHIFT(VSHL_U, ushl_op) diff --git a/target/arm/translate.c b/target/arm/translate.c index 13ce1a5fc1d..025747c0bd4 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4848,31 +4848,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) } return 1; =20 - case NEON_3R_VMUL: /* VMUL */ - if (u) { - /* Polynomial case allows only P8. */ - if (size !=3D 0) { - return 1; - } - tcg_gen_gvec_3_ool(rd_ofs, rn_ofs, rm_ofs, vec_size, vec_s= ize, - 0, gen_helper_gvec_pmul_b); - } else { - tcg_gen_gvec_mul(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } - return 0; - - case NEON_3R_VML: /* VMLA, VMLS */ - tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size, - u ? &mls_op[size] : &mla_op[size]); - return 0; - - case NEON_3R_VSHL: - /* Note the operation is vshl vd,vm,vn */ - tcg_gen_gvec_3(rd_ofs, rm_ofs, rn_ofs, vec_size, vec_size, - u ? &ushl_op[size] : &sshl_op[size]); - return 0; - case NEON_3R_VADD_VSUB: case NEON_3R_LOGIC: case NEON_3R_VMAX: @@ -4882,6 +4857,9 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VCGE: case NEON_3R_VQADD: case NEON_3R_VQSUB: + case NEON_3R_VMUL: + case NEON_3R_VML: + case NEON_3R_VSHL: /* Already handled by decodetree */ return 1; } --=20 2.20.1 From nobody Sat May 18 06:31:17 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1588597130; cv=none; d=zohomail.com; s=zohoarc; b=NIfREuON7lupsukdB8KWvsD1nphTOmdeR+aNdfXa/nkokiTQsz5rR3W/nu6QBMQLuu+nE/KYY1NGfOzHn0qYAySSJfDPH7RX4cn1jjxia2wftVdzAXcAlsTBQqzNkrxFveK7BIwCcv/4DEHeS6+WS2fTzU8BT+QKEoqrOLXsXQ4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1588597130; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=0hy7GkOuTpkkXixImY0LEXOiXHSMsLSHNhjhUFJjdC8=; b=DALwSDagbY0vGB4SXqqMkXm4rjiknDmZJUm4jnGjd8AXjGS9EHelR5rVRtgvW+9+HZeTbjcDCdNySv6sb1IcZcBX/qWlPW6uQkoDK48dY2AVd3BWnVPS5vyLGevwVzV/U2pQ0DyIEio0lKB5CJkmeBTfuIaf9dt60BUTOMignbY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1588597130105899.3125829482661; Mon, 4 May 2020 05:58:50 -0700 (PDT) Received: from localhost ([::1]:51424 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jVagK-0001rZ-Tz for importer@patchew.org; Mon, 04 May 2020 08:58:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56696) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jVaIH-0001Ld-6y for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:57 -0400 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]:40062) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jVaIG-0001JB-8H for qemu-devel@nongnu.org; Mon, 04 May 2020 08:33:56 -0400 Received: by mail-wr1-x433.google.com with SMTP id e16so15591510wra.7 for ; Mon, 04 May 2020 05:33:55 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" We're going to want at least some of the NeonGen* typedefs for the refactored 32-bit Neon decoder, so move them all to translate.h since it makes more sense to keep them in one group. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200430181003.21682-23-peter.maydell@linaro.org --- target/arm/translate.h | 17 +++++++++++++++++ target/arm/translate-a64.c | 17 ----------------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/target/arm/translate.h b/target/arm/translate.h index 95b43e7ab65..cb7925ea461 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -314,4 +314,21 @@ typedef void GVecGen3Fn(unsigned, uint32_t, uint32_t, typedef void GVecGen4Fn(unsigned, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t); =20 +/* Function prototype for gen_ functions for calling Neon helpers */ +typedef void NeonGenOneOpEnvFn(TCGv_i32, TCGv_ptr, TCGv_i32); +typedef void NeonGenTwoOpFn(TCGv_i32, TCGv_i32, TCGv_i32); +typedef void NeonGenTwoOpEnvFn(TCGv_i32, TCGv_ptr, TCGv_i32, TCGv_i32); +typedef void NeonGenTwo64OpFn(TCGv_i64, TCGv_i64, TCGv_i64); +typedef void NeonGenTwo64OpEnvFn(TCGv_i64, TCGv_ptr, TCGv_i64, TCGv_i64); +typedef void NeonGenNarrowFn(TCGv_i32, TCGv_i64); +typedef void NeonGenNarrowEnvFn(TCGv_i32, TCGv_ptr, TCGv_i64); +typedef void NeonGenWidenFn(TCGv_i64, TCGv_i32); +typedef void NeonGenTwoSingleOPFn(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_ptr); +typedef void NeonGenTwoDoubleOPFn(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_ptr); +typedef void NeonGenOneOpFn(TCGv_i64, TCGv_i64); +typedef void CryptoTwoOpFn(TCGv_ptr, TCGv_ptr); +typedef void CryptoThreeOpIntFn(TCGv_ptr, TCGv_ptr, TCGv_i32); +typedef void CryptoThreeOpFn(TCGv_ptr, TCGv_ptr, TCGv_ptr); +typedef void AtomicThreeOpFn(TCGv_i64, TCGv_i64, TCGv_i64, TCGArg, MemOp); + #endif /* TARGET_ARM_TRANSLATE_H */ diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index efb1c4adc4e..a896f9c4b83 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -70,23 +70,6 @@ typedef struct AArch64DecodeTable { AArch64DecodeFn *disas_fn; } AArch64DecodeTable; =20 -/* Function prototype for gen_ functions for calling Neon helpers */ -typedef void NeonGenOneOpEnvFn(TCGv_i32, TCGv_ptr, TCGv_i32); -typedef void NeonGenTwoOpFn(TCGv_i32, TCGv_i32, TCGv_i32); -typedef void NeonGenTwoOpEnvFn(TCGv_i32, TCGv_ptr, TCGv_i32, TCGv_i32); -typedef void NeonGenTwo64OpFn(TCGv_i64, TCGv_i64, TCGv_i64); -typedef void NeonGenTwo64OpEnvFn(TCGv_i64, TCGv_ptr, TCGv_i64, TCGv_i64); -typedef void NeonGenNarrowFn(TCGv_i32, TCGv_i64); -typedef void NeonGenNarrowEnvFn(TCGv_i32, TCGv_ptr, TCGv_i64); -typedef void NeonGenWidenFn(TCGv_i64, TCGv_i32); -typedef void NeonGenTwoSingleOPFn(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_ptr); -typedef void NeonGenTwoDoubleOPFn(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_ptr); -typedef void NeonGenOneOpFn(TCGv_i64, TCGv_i64); -typedef void CryptoTwoOpFn(TCGv_ptr, TCGv_ptr); -typedef void CryptoThreeOpIntFn(TCGv_ptr, TCGv_ptr, TCGv_i32); -typedef void CryptoThreeOpFn(TCGv_ptr, TCGv_ptr, TCGv_ptr); -typedef void AtomicThreeOpFn(TCGv_i64, TCGv_i64, TCGv_i64, TCGArg, MemOp); - /* initialize TCG globals. */ void a64_translate_init(void) { --=20 2.20.1