When I test RISCV vector extension, many folks advice risu. Here is a
very simple port only support RV64I, RV64F, RV64M.

It's some difficult when I try to support RV32, because it's very
similiar to RV64, so I can't make two .risu files like arm.risu and
aarch64.risu.

Any idea are welcomed.

LIU Zhiwei (8):
  riscv: Add RV64I instructions description
  riscv: Generate payload scripts
  riscv: Define riscv struct reginfo
  riscv: Implement payload load interfaces
  riscv: Add standard test case
  riscv: Add configure script
  riscv: Add RV64M instructions description
  riscv: Add RV64F instructions description

 configure              |   4 +-
 riscv64.risu           | 262 +++++++++++++++++++++
 risu_reginfo_riscv64.c | 134 +++++++++++
 risu_reginfo_riscv64.h |  29 +++
 risu_riscv64.c         |  47 ++++
 risugen_riscv.pm       | 501 +++++++++++++++++++++++++++++++++++++++++
 test_riscv64.s         |  85 +++++++
 7 files changed, 1061 insertions(+), 1 deletion(-)
 create mode 100644 riscv64.risu
 create mode 100644 risu_reginfo_riscv64.c
 create mode 100644 risu_reginfo_riscv64.h
 create mode 100644 risu_riscv64.c
 create mode 100644 risugen_riscv.pm
 create mode 100644 test_riscv64.s

-- 
2.23.0

On 4/30/20 12:21 AM, LIU Zhiwei wrote:
> It's some difficult when I try to support RV32, because it's very
> similiar to RV64, so I can't make two .risu files like arm.risu and
> aarch64.risu.

You could a command-line parameter, like --be or --sve for this.


r~

On 2020/5/12 0:30, Richard Henderson wrote:
> On 4/30/20 12:21 AM, LIU Zhiwei wrote:
>> It's some difficult when I try to support RV32, because it's very
>> similiar to RV64, so I can't make two .risu files like arm.risu and
>> aarch64.risu.
> You could a command-line parameter, like --be or --sve for this.
Yes. I should add a "--xlen" parameter to specify the general register 
length in risugen_riscv.pm.

Besides, I should modify current riscv64.risu.

For instructions in RV32 and RV64:

LB RV32_64 imm:12 rs1:5 000 rd:5 0000011

For RV64 only instructions:

LD RV64 imm:12 rs1:5 011 rd:5 0000011

So I can  generate RV32 instructions through  --pattern '*.RV32.*', and 
the  RV64 instructions through --pattern '.*RV64.*'.

Best Regards,
Zhiwei
>
> r~