[PATCH 0/2] Support different CPU types for the sifive_e machine

Corey Wharton posted 2 patches 4 years, 1 month ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20200313002923.30905-1-coreyw7@fb.com
Maintainers: Alistair Francis <Alistair.Francis@wdc.com>, Palmer Dabbelt <palmer@dabbelt.com>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Sagar Karandikar <sagark@eecs.berkeley.edu>
There is a newer version of this series
hw/riscv/sifive_e.c |  3 ++-
target/riscv/cpu.c  | 10 ++++++++++
target/riscv/cpu.h  |  1 +
3 files changed, 13 insertions(+), 1 deletion(-)
[PATCH 0/2] Support different CPU types for the sifive_e machine
Posted by Corey Wharton 4 years, 1 month ago
The purpose of this patch set is to allow the sifive_e machine to run
with different CPU targets to enable different ISA entensions. To that
end it also introduces a new sifive-e34 CPU type which provides the
same ISA as sifive-e31, with the addition of the single precision
floating-point extension (f). The default CPU for the sifive_e machine
is unchanged.

A user can change the default CPU type by specifying it with the '-cpu'
option on the command line.

Corey Wharton (2):
  riscv: sifive_e: Support changing CPU type
  target/riscv: Add a sifive-e34 cpu type

 hw/riscv/sifive_e.c |  3 ++-
 target/riscv/cpu.c  | 10 ++++++++++
 target/riscv/cpu.h  |  1 +
 3 files changed, 13 insertions(+), 1 deletion(-)

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2.21.1