arm queue; dunno if this will be the last before softfreeze

or not, but anyway probably the last large one. New orangepi-pc

board model is the big item here.

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-docs-20200312' into staging (2020-03-12 15:20:52 +0000)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200312

for you to fetch changes up to aca53be34ac3e7cac5f39396a51a338860a5a837:

target/arm: kvm: Inject events at the last stage of sync (2020-03-12 16:31:10 +0000)

* Fix various bugs that might result in an assert() due to

incorrect hflags for M-profile CPUs

* Fix Aspeed SMC Controller user-mode select handling

* Report correct (with-tag) address in fault address register

when TBI is enabled

* cubieboard: make sure SOC object isn't leaked

* fsl-imx25: Wire up eSDHC controllers

* fsl-imx25: Wire up USB controllers

* New board model: orangepi-pc (OrangePi PC)

* ARM/KVM: if user doesn't select GIC version and the

host kernel can only provide GICv3, use that, rather

than defaulting to "fail because GICv2 isn't possible"

* kvm: Only do KVM_SET_VCPU_EVENTS at the last stage of sync

Beata Michalska (1):

target/arm: kvm: Inject events at the last stage of sync

Cédric Le Goater (2):

aspeed/smc: Add some tracing

aspeed/smc: Fix User mode select/unselect scheme

Eric Auger (6):

hw/arm/virt: Document 'max' value in gic-version property description

hw/arm/virt: Introduce VirtGICType enum type

hw/arm/virt: Introduce finalize_gic_version()

target/arm/kvm: Let kvm_arm_vgic_probe() return a bitmap

hw/arm/virt: kvm: Restructure finalize_gic_version()

hw/arm/virt: kvm: allow gicv3 by default if v2 cannot work

Guenter Roeck (2):

hw/arm/fsl-imx25: Wire up eSDHC controllers

hw/arm/fsl-imx25: Wire up USB controllers

Igor Mammedov (1):

hw/arm/cubieboard: make sure SOC object isn't leaked

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

This test boots U-Boot then NetBSD (stored on a SD card) on

a OrangePi PC board.

As it requires ~1.3GB of storage, it is disabled by default.

U-Boot is built by the Debian project [1], and the SD card image

is provided by the NetBSD organization [2].

Once the compressed SD card image is downloaded (304MB) and

extracted, this test is fast:

$ AVOCADO_ALLOW_LARGE_STORAGE=yes \

avocado --show=app,console run -t machine:orangepi-pc \

tests/acceptance/boot_linux_console.py

console: U-Boot SPL 2020.01+dfsg-1 (Jan 08 2020 - 08:19:44 +0000)

console: DRAM: 1024 MiB

console: U-Boot 2020.01+dfsg-1 (Jan 08 2020 - 08:19:44 +0000) Allwinner Technology

console: CPU: Allwinner H3 (SUN8I 0000)

console: scanning bus usb@1c1b000 for devices... 1 USB Device(s) found

console: scanning bus usb@1c1d000 for devices... 1 USB Device(s) found

console: scanning usb for storage devices... 0 Storage Device(s) found

console: Hit any key to stop autoboot: 0

console: => setenv bootargs root=ld0a

console: => setenv kernel netbsd-GENERIC.ub

console: => setenv fdtfile dtb/sun8i-h3-orangepi-pc.dtb

console: => boot

console: ## Booting kernel from Legacy Image at 42000000 ...

console: Image Name: NetBSD/earmv7hf 9.0_RC1

console: Image Type: ARM Linux Kernel Image (no loading done) (uncompressed)

console: XIP Kernel Image (no loading done)

console: Loading Device Tree to 49ff6000, end 49fffe01 ... OK

console: Starting kernel ...

console: [ 1.0000000] NetBSD/evbarm (fdt) booting ...

console: [ 1.0000000] NetBSD 9.0 (GENERIC) #0: Fri Feb 14 00:06:28 UTC 2020

console: [ 1.0000000] mkrepro@mkrepro.NetBSD.org:/usr/src/sys/arch/evbarm/compile/GENERIC

console: [ 1.0000000] total memory = 1024 MB

console: [ 1.0000000] avail memory = 1003 MB

console: [ 1.0000000] armfdt0 (root)

console: [ 1.0000000] simplebus0 at armfdt0: Xunlong Orange Pi PC

console: [ 1.0000000] cpu0 at cpus0: Cortex-A7 r0p5 (Cortex V7A core)

console: [ 1.0000000] cpu0: DC enabled IC enabled WB enabled LABT branch prediction enabled

console: [ 1.0000000] cpu0: 32KB/64B 2-way L1 VIPT Instruction cache

console: [ 1.0000000] cpu0: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache

console: [ 1.0000000] cpu0: 2304KB/64B 16-way write-through L2 PIPT Unified cache

console: [ 1.0000000] vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals

...

console: [ 2.3812082] sdmmc0: SD card status: 4-bit, C0

console: [ 2.3812082] ld0 at sdmmc0: <0xaa:0x5859:QEMU!:0x01:0xdeadbeef:0x062>

console: [ 2.4012856] ld0: 1226 MB, 622 cyl, 64 head, 63 sec, 512 bytes/sect x 2511872 sectors

console: [ 2.5321222] ld0: 4-bit width, High-Speed/SDR25, 50.000 MHz

console: [ 3.1068718] WARNING: 4 errors while detecting hardware; check system log.

console: [ 3.1179868] boot device: ld0

console: [ 3.1470623] root on ld0a dumps on ld0b

console: [ 3.2464436] root file system type: ffs

console: [ 3.2897123] kern.module.path=/stand/evbarm/9.0/modules

console: Mon Feb 17 20:33:35 UTC 2020

console: Starting root file system check:

PASS (35.96 s)

RESULTS : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0

JOB TIME : 36.09 s

Note, this test only took ~65 seconds to run on Travis-CI, see: [3].

This test is based on a description from Niek Linnenbank from [4].

[1] https://wiki.debian.org/InstallingDebianOn/Allwinner#Creating_a_bootable_SD_Card_with_u-boot

[2] https://wiki.netbsd.org/ports/evbarm/allwinner/

[3] https://travis-ci.org/philmd/qemu/jobs/638823612#L3778

[4] https://www.mail-archive.com/qemu-devel@nongnu.org/msg669347.html

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Tested-by: Alex Bennée <alex.bennee@linaro.org>

Message-id: 20200311221854.30370-18-nieklinnenbank@gmail.com

[NL: changed test to use NetBSD 9.0 final release and -global allwinner-rtc.base-year]

tests/acceptance/boot_linux_console.py | 70 ++++++++++++++++++++++++++

1 file changed, 70 insertions(+)

diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py

--- a/tests/acceptance/boot_linux_console.py

+++ b/tests/acceptance/boot_linux_console.py

@@ -XXX,XX +XXX,XX @@ import shutil

from avocado import skipUnless

from avocado_qemu import Test

from avocado_qemu import exec_command_and_wait_for_pattern

+from avocado_qemu import interrupt_interactive_console_until_pattern

from avocado_qemu import wait_for_console_pattern

from avocado.utils import process

from avocado.utils import archive

@@ -XXX,XX +XXX,XX @@ class BootLinuxConsole(Test):

'to <orangepipc>')

self.wait_for_console_pattern('Starting Load Kernel Modules...')

+ @skipUnless(os.getenv('AVOCADO_ALLOW_LARGE_STORAGE'), 'storage limited')

+ def test_arm_orangepi_uboot_netbsd9(self):

+ """

+ :avocado: tags=arch:arm

+ :avocado: tags=machine:orangepi-pc

+ """

+ # This test download a 304MB compressed image and expand it to 1.3GB...

+ deb_url = ('http://snapshot.debian.org/archive/debian/'

+ '20200108T145233Z/pool/main/u/u-boot/'

+ 'u-boot-sunxi_2020.01%2Bdfsg-1_armhf.deb')

+ deb_hash = 'f67f404a80753ca3d1258f13e38f2b060e13db99'

+ deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)

+ # We use the common OrangePi PC 'plus' build of U-Boot for our secondary

+ # program loader (SPL). We will then set the path to the more specific

+ # OrangePi "PC" device tree blob with 'setenv fdtfile' in U-Boot prompt,

+ # before to boot NetBSD.

+ uboot_path = '/usr/lib/u-boot/orangepi_plus/u-boot-sunxi-with-spl.bin'

+ uboot_path = self.extract_from_deb(deb_path, uboot_path)

+ image_url = ('https://cdn.netbsd.org/pub/NetBSD/NetBSD-9.0/'

+ 'evbarm-earmv7hf/binary/gzimg/armv7.img.gz')

+ image_hash = '2babb29d36d8360adcb39c09e31060945259917a'

+ image_path_gz = self.fetch_asset(image_url, asset_hash=image_hash)

+ image_path = os.path.join(self.workdir, 'armv7.img')

+ image_drive_args = 'if=sd,format=raw,snapshot=on,file=' + image_path

+ archive.gzip_uncompress(image_path_gz, image_path)

+

+ # dd if=u-boot-sunxi-with-spl.bin of=armv7.img bs=1K seek=8 conv=notrunc

+ with open(uboot_path, 'rb') as f_in:

+ with open(image_path, 'r+b') as f_out:

+ f_out.seek(8 * 1024)

+ shutil.copyfileobj(f_in, f_out)

+

+ # Extend image, to avoid that NetBSD thinks the partition

+ # inside the image is larger than device size itself

+ f_out.seek(0, 2)

+ f_out.seek(64 * 1024 * 1024, 1)

+ f_out.write(bytearray([0x00]))

+

+ self.vm.set_console()

+ self.vm.add_args('-nic', 'user',

+ '-drive', image_drive_args,

+ '-global', 'allwinner-rtc.base-year=2000',

+ '-no-reboot')

+ self.vm.launch()

+ wait_for_console_pattern(self, 'U-Boot 2020.01+dfsg-1')

+ interrupt_interactive_console_until_pattern(self,

+ 'Hit any key to stop autoboot:',

+ 'switch to partitions #0, OK')

+

+ exec_command_and_wait_for_pattern(self, '', '=>')

+ cmd = 'setenv bootargs root=ld0a'

+ exec_command_and_wait_for_pattern(self, cmd, '=>')

+ cmd = 'setenv kernel netbsd-GENERIC.ub'

+ exec_command_and_wait_for_pattern(self, cmd, '=>')

+ cmd = 'setenv fdtfile dtb/sun8i-h3-orangepi-pc.dtb'

+ exec_command_and_wait_for_pattern(self, cmd, '=>')

+ cmd = ("setenv bootcmd 'fatload mmc 0:1 ${kernel_addr_r} ${kernel}; "

+ "fatload mmc 0:1 ${fdt_addr_r} ${fdtfile}; "

+ "fdt addr ${fdt_addr_r}; "

+ "bootm ${kernel_addr_r} - ${fdt_addr_r}'")

+ exec_command_and_wait_for_pattern(self, cmd, '=>')

+

+ exec_command_and_wait_for_pattern(self, 'boot',

+ 'Booting kernel from Legacy Image')

+ wait_for_console_pattern(self, 'Starting kernel ...')

+ wait_for_console_pattern(self, 'NetBSD 9.0 (GENERIC)')

+ # Wait for user-space

+ wait_for_console_pattern(self, 'Starting root file system check')

+

def test_s390x_s390_ccw_virtio(self):

"""

:avocado: tags=arch:s390x

This test boots Ubuntu Bionic on a OrangePi PC board.

As it requires 1GB of storage, and is slow, this test is disabled

on automatic CI testing.

It is useful for workstation testing. Currently Avocado timeouts too

quickly, so we can't run userland commands.

The kernel image and DeviceTree blob are built by the Armbian

project (based on Debian):

https://www.armbian.com/orange-pi-pc/

The Ubuntu image is downloaded from:

https://dl.armbian.com/orangepipc/Bionic_current

This test can be run using:

$ AVOCADO_ALLOW_LARGE_STORAGE=yes \

avocado --show=app,console run -t machine:orangepi-pc \

tests/acceptance/boot_linux_console.py

console: U-Boot SPL 2019.04-armbian (Nov 18 2019 - 23:08:35 +0100)

console: DRAM: 1024 MiB

console: Failed to set core voltage! Can't set CPU frequency

console: Trying to boot from MMC1

console: U-Boot 2019.04-armbian (Nov 18 2019 - 23:08:35 +0100) Allwinner Technology

console: CPU: Allwinner H3 (SUN8I 0000)

console: Model: Xunlong Orange Pi PC

console: DRAM: 1 GiB

console: MMC: mmc@1c0f000: 0

[...]

console: Uncompressing Linux... done, booting the kernel.

console: Booting Linux on physical CPU 0x0

console: Linux version 5.3.9-sunxi (root@builder) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #19.11.3 SMP Mon Nov 18 18:49:43 CET 2019

console: CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=50c5387d

console: CPU: div instructions available: patching division code

console: CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache

console: OF: fdt: Machine model: Xunlong Orange Pi PC

[...]

console: EXT4-fs (mmcblk0p1): mounted filesystem with writeback data mode. Opts: (null)

console: done.

console: Begin: Running /scripts/local-bottom ... done.

console: Begin: Running /scripts/init-bottom ... done.

console: systemd[1]: systemd 237 running in system mode. (...)

console: systemd[1]: Detected architecture arm.

console: Welcome to Ubuntu 18.04.3 LTS!

console: systemd[1]: Set hostname to <orangepipc>.

Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Tested-by: Alex Bennée <alex.bennee@linaro.org>

Message-id: 20200311221854.30370-17-nieklinnenbank@gmail.com

[NL: rename in commit message Raspbian to Armbian, remove vm.set_machine()]

[NL: changed test to boot from SD card via BootROM, added check for 7z]

tests/acceptance/boot_linux_console.py | 48 ++++++++++++++++++++++++++

1 file changed, 48 insertions(+)

diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py

--- a/tests/acceptance/boot_linux_console.py

+++ b/tests/acceptance/boot_linux_console.py

@@ -XXX,XX +XXX,XX @@ from avocado_qemu import exec_command_and_wait_for_pattern

from avocado_qemu import wait_for_console_pattern

from avocado.utils import process

from avocado.utils import archive

+from avocado.utils.path import find_command, CmdNotFoundError

+P7ZIP_AVAILABLE = True

+try:

+ find_command('7z')

+except CmdNotFoundError:

+ P7ZIP_AVAILABLE = False

class BootLinuxConsole(Test):

"""

@@ -XXX,XX +XXX,XX @@ class BootLinuxConsole(Test):

exec_command_and_wait_for_pattern(self, 'reboot',

'reboot: Restarting system')

+ @skipUnless(os.getenv('AVOCADO_ALLOW_LARGE_STORAGE'), 'storage limited')

+ @skipUnless(P7ZIP_AVAILABLE, '7z not installed')

+ def test_arm_orangepi_bionic(self):

+ """

+ :avocado: tags=arch:arm

+ :avocado: tags=machine:orangepi-pc

+ """

+

+ # This test download a 196MB compressed image and expand it to 932MB...

+ image_url = ('https://dl.armbian.com/orangepipc/archive/'

+ 'Armbian_19.11.3_Orangepipc_bionic_current_5.3.9.7z')

+ image_hash = '196a8ffb72b0123d92cea4a070894813d305c71e'

+ image_path_7z = self.fetch_asset(image_url, asset_hash=image_hash)

+ image_name = 'Armbian_19.11.3_Orangepipc_bionic_current_5.3.9.img'

+ image_path = os.path.join(self.workdir, image_name)

+ process.run("7z e -o%s %s" % (self.workdir, image_path_7z))

+

+ self.vm.set_console()

+ self.vm.add_args('-drive', 'file=' + image_path + ',if=sd,format=raw',

+ '-nic', 'user',

+ '-no-reboot')

+ self.vm.launch()

+

+ kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +

+ 'console=ttyS0,115200 '

+ 'loglevel=7 '

+ 'nosmp '

+ 'systemd.default_timeout_start_sec=9000 '

+ 'systemd.mask=armbian-zram-config.service '

+ 'systemd.mask=armbian-ramlog.service')

+

+ self.wait_for_console_pattern('U-Boot SPL')

+ self.wait_for_console_pattern('Autoboot in ')

+ exec_command_and_wait_for_pattern(self, ' ', '=>')

+ exec_command_and_wait_for_pattern(self, "setenv extraargs '" +

+ kernel_command_line + "'", '=>')

+ exec_command_and_wait_for_pattern(self, 'boot', 'Starting kernel ...');

+

+ self.wait_for_console_pattern('systemd[1]: Set hostname ' +

+ 'to <orangepipc>')

+ self.wait_for_console_pattern('Starting Load Kernel Modules...')

+

def test_s390x_s390_ccw_virtio(self):

"""

:avocado: tags=arch:s390x

From: Beata Michalska <beata.michalska@linaro.org>

KVM_SET_VCPU_EVENTS might actually lead to vcpu registers being modified.

As such this should be the last step of sync to avoid potential overwriting

of whatever changes KVM might have done.

Signed-off-by: Beata Michalska <beata.michalska@linaro.org>

Reviewed-by: Andrew Jones <drjones@redhat.com>

Message-id: 20200312003401.29017-2-beata.michalska@linaro.org

target/arm/kvm32.c | 15 ++++++++++-----

target/arm/kvm64.c | 15 ++++++++++-----

2 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c

--- a/target/arm/kvm32.c

+++ b/target/arm/kvm32.c

@@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level)

return ret;

- ret = kvm_put_vcpu_events(cpu);

- if (ret) {

- return ret;

write_cpustate_to_list(cpu, true);

if (!write_list_to_kvmstate(cpu, level)) {

return EINVAL;

}

+ /*

+ * Setting VCPU events should be triggered after syncing the registers

+ * to avoid overwriting potential changes made by KVM upon calling

+ * KVM_SET_VCPU_EVENTS ioctl

+ */

+ ret = kvm_put_vcpu_events(cpu);

+ if (ret) {

+ return ret;

+ }

+

kvm_arm_sync_mpstate_to_kvm(cpu);

return ret;

diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/kvm64.c

+++ b/target/arm/kvm64.c

@@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level)

return ret;

}

- ret = kvm_put_vcpu_events(cpu);

- if (ret) {

- return ret;

write_cpustate_to_list(cpu, true);

if (!write_list_to_kvmstate(cpu, level)) {

return -EINVAL;

}

+ /*

+ * Setting VCPU events should be triggered after syncing the registers

+ * to avoid overwriting potential changes made by KVM upon calling

+ * KVM_SET_VCPU_EVENTS ioctl

+ */

+ ret = kvm_put_vcpu_events(cpu);

+ if (ret) {

+ return ret;

+ }

+

kvm_arm_sync_mpstate_to_kvm(cpu);

return ret;

From: Richard Henderson <richard.henderson@linaro.org>

target/arm/helper.c | 35 ++++++++++++++++++++++++++++++++++-

1 file changed, 34 insertions(+), 1 deletion(-)

@@ -XXX,XX +XXX,XX @@ bool get_phys_addr(CPUARMState *env, target_ulong address,

/* Definitely a real MMU, not an MPU */

if (regime_translation_disabled(env, mmu_idx)) {

- /* MMU disabled. */

+ /*

+ * MMU disabled. S1 addresses within aa64 translation regimes are

+ * still checked for bounds -- see AArch64.TranslateAddressS1Off.

+ */

+ if (mmu_idx != ARMMMUIdx_Stage2) {

+ int r_el = regime_el(env, mmu_idx);

+ if (arm_el_is_aa64(env, r_el)) {

+ int pamax = arm_pamax(env_archcpu(env));

+ uint64_t tcr = env->cp15.tcr_el[r_el].raw_tcr;

+ int addrtop, tbi;

+

+ tbi = aa64_va_parameter_tbi(tcr, mmu_idx);

+ if (access_type == MMU_INST_FETCH) {

+ tbi &= ~aa64_va_parameter_tbid(tcr, mmu_idx);

+ }

+ tbi = (tbi >> extract64(address, 55, 1)) & 1;

+ addrtop = (tbi ? 55 : 63);

+

+ if (extract64(address, pamax, addrtop - pamax + 1) != 0) {

+ fi->type = ARMFault_AddressSize;

+ fi->level = 0;

+ fi->stage2 = false;

+ return 1;

+ }

+

+ /*

+ * When TBI is disabled, we've just validated that all of the

+ * bits above PAMax are zero, so logically we only need to

+ * clear the top byte for TBI. But it's clearer to follow

+ * the pseudocode set of addrdesc.paddress.

+ */

+ address = extract64(address, 0, 52);

+ }

+ }

*phys_ptr = address;

*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;

*page_size = TARGET_PAGE_SIZE;

From: Eric Auger <eric.auger@redhat.com>

We plan to introduce yet another value for the gic version (nosel).

As we already use exotic values such as 0 and -1, let's introduce

a dedicated enum type and let vms->gic_version take this

type.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Reviewed-by: Andrew Jones <drjones@redhat.com>

Message-id: 20200311131618.7187-3-eric.auger@redhat.com

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

include/hw/arm/virt.h | 11 +++++++++--

hw/arm/virt.c | 30 +++++++++++++++---------------

2 files changed, 24 insertions(+), 17 deletions(-)

diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h

--- a/include/hw/arm/virt.h

+++ b/include/hw/arm/virt.h

@@ -XXX,XX +XXX,XX @@ typedef enum VirtIOMMUType {

VIRT_IOMMU_VIRTIO,

} VirtIOMMUType;

+typedef enum VirtGICType {

+ VIRT_GIC_VERSION_MAX,

+ VIRT_GIC_VERSION_HOST,

+ VIRT_GIC_VERSION_2,

+ VIRT_GIC_VERSION_3,

+} VirtGICType;

+

typedef struct MemMapEntry {

hwaddr base;

hwaddr size;

@@ -XXX,XX +XXX,XX @@ typedef struct {

bool highmem_ecam;

bool its;

bool virt;

- int32_t gic_version;

+ VirtGICType gic_version;

VirtIOMMUType iommu;

uint16_t virtio_iommu_bdf;

struct arm_boot_info bootinfo;

@@ -XXX,XX +XXX,XX @@ static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)

uint32_t redist0_capacity =

vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;

- assert(vms->gic_version == 3);

+ assert(vms->gic_version == VIRT_GIC_VERSION_3);

return vms->smp_cpus > redist0_capacity ? 2 : 1;

diff --git a/hw/arm/virt.c b/hw/arm/virt.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/virt.c

+++ b/hw/arm/virt.c

@@ -XXX,XX +XXX,XX @@ static void fdt_add_timer_nodes(const VirtMachineState *vms)

irqflags = GIC_FDT_IRQ_FLAGS_EDGE_LO_HI;

- if (vms->gic_version == 2) {

+ if (vms->gic_version == VIRT_GIC_VERSION_2) {

irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,

GIC_FDT_IRQ_PPI_CPU_WIDTH,

(1 << vms->smp_cpus) - 1);

@@ -XXX,XX +XXX,XX @@ static void fdt_add_gic_node(VirtMachineState *vms)

qemu_fdt_setprop_cell(vms->fdt, nodename, "#address-cells", 0x2);

qemu_fdt_setprop_cell(vms->fdt, nodename, "#size-cells", 0x2);

qemu_fdt_setprop(vms->fdt, nodename, "ranges", NULL, 0);

- if (vms->gic_version == 3) {

+ if (vms->gic_version == VIRT_GIC_VERSION_3) {

int nb_redist_regions = virt_gicv3_redist_region_count(vms);

qemu_fdt_setprop_string(vms->fdt, nodename, "compatible",

@@ -XXX,XX +XXX,XX @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms)

}

}

- if (vms->gic_version == 2) {

+ if (vms->gic_version == VIRT_GIC_VERSION_2) {

irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,

GIC_FDT_IRQ_PPI_CPU_WIDTH,

(1 << vms->smp_cpus) - 1);

@@ -XXX,XX +XXX,XX @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState *vms, int idx)

* purposes are to make TCG consistent (with 64-bit KVM hosts)

* and to improve SGI efficiency.

*/

- if (vms->gic_version == 3) {

+ if (vms->gic_version == VIRT_GIC_VERSION_3) {

clustersz = GICV3_TARGETLIST_BITS;

} else {

clustersz = GIC_TARGETLIST_BITS;

@@ -XXX,XX +XXX,XX @@ static void machvirt_init(MachineState *machine)

/* We can probe only here because during property set

* KVM is not available yet

*/

- if (vms->gic_version <= 0) {

- /* "host" or "max" */

+ if (vms->gic_version == VIRT_GIC_VERSION_HOST ||

+ vms->gic_version == VIRT_GIC_VERSION_MAX) {

if (!kvm_enabled()) {

- if (vms->gic_version == 0) {

+ if (vms->gic_version == VIRT_GIC_VERSION_HOST) {

error_report("gic-version=host requires KVM");

exit(1);

} else {

/* "max": currently means 3 for TCG */

- vms->gic_version = 3;

+ vms->gic_version = VIRT_GIC_VERSION_3;

}

} else {

vms->gic_version = kvm_arm_vgic_probe();

@@ -XXX,XX +XXX,XX @@ static void machvirt_init(MachineState *machine)

/* The maximum number of CPUs depends on the GIC version, or on how

* many redistributors we can fit into the memory map.

*/

- if (vms->gic_version == 3) {

+ if (vms->gic_version == VIRT_GIC_VERSION_3) {

virt_max_cpus =

vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;

virt_max_cpus +=

@@ -XXX,XX +XXX,XX @@ static void virt_set_its(Object *obj, bool value, Error **errp)

static char *virt_get_gic_version(Object *obj, Error **errp)

{

VirtMachineState *vms = VIRT_MACHINE(obj);

- const char *val = vms->gic_version == 3 ? "3" : "2";

+ const char *val = vms->gic_version == VIRT_GIC_VERSION_3 ? "3" : "2";

return g_strdup(val);

}

@@ -XXX,XX +XXX,XX @@ static void virt_set_gic_version(Object *obj, const char *value, Error **errp)

VirtMachineState *vms = VIRT_MACHINE(obj);

if (!strcmp(value, "3")) {

- vms->gic_version = 3;

+ vms->gic_version = VIRT_GIC_VERSION_3;

} else if (!strcmp(value, "2")) {

- vms->gic_version = 2;

+ vms->gic_version = VIRT_GIC_VERSION_2;

} else if (!strcmp(value, "host")) {

- vms->gic_version = 0; /* Will probe later */

+ vms->gic_version = VIRT_GIC_VERSION_HOST; /* Will probe later */

} else if (!strcmp(value, "max")) {

- vms->gic_version = -1; /* Will probe later */

+ vms->gic_version = VIRT_GIC_VERSION_MAX; /* Will probe later */

} else {

error_setg(errp, "Invalid gic-version value");

error_append_hint(errp, "Valid values are 3, 2, host, max.\n");

@@ -XXX,XX +XXX,XX @@ static void virt_instance_init(Object *obj)

"physical address space above 32 bits",

NULL);

/* Default GIC type is v2 */

- vms->gic_version = 2;

+ vms->gic_version = VIRT_GIC_VERSION_2;

object_property_add_str(obj, "gic-version", virt_get_gic_version,

virt_set_gic_version, NULL);

object_property_set_description(obj, "gic-version",

From: Niek Linnenbank <nieklinnenbank@gmail.com>

The Clock Control Unit is responsible for clock signal generation,

configuration and distribution in the Allwinner H3 System on Chip.

This commit adds support for the Clock Control Unit which emulates

a simple read/write register interface.

Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Message-id: 20200311221854.30370-4-nieklinnenbank@gmail.com

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/misc/Makefile.objs | 1 +

include/hw/arm/allwinner-h3.h | 3 +

include/hw/misc/allwinner-h3-ccu.h | 66 ++++++++

hw/arm/allwinner-h3.c | 9 +-

hw/misc/allwinner-h3-ccu.c | 242 +++++++++++++++++++++++++++++

5 files changed, 320 insertions(+), 1 deletion(-)

create mode 100644 include/hw/misc/allwinner-h3-ccu.h

create mode 100644 hw/misc/allwinner-h3-ccu.c

diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs

--- a/hw/misc/Makefile.objs

+++ b/hw/misc/Makefile.objs

@@ -XXX,XX +XXX,XX @@ common-obj-$(CONFIG_MACIO) += macio/

common-obj-$(CONFIG_IVSHMEM_DEVICE) += ivshmem.o

+common-obj-$(CONFIG_ALLWINNER_H3) += allwinner-h3-ccu.o

common-obj-$(CONFIG_REALVIEW) += arm_sysctl.o

common-obj-$(CONFIG_NSERIES) += cbus.o

common-obj-$(CONFIG_ECCMEMCTL) += eccmemctl.o

diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h

index XXXXXXX..XXXXXXX 100644

--- a/include/hw/arm/allwinner-h3.h

+++ b/include/hw/arm/allwinner-h3.h

@@ -XXX,XX +XXX,XX @@

#include "hw/arm/boot.h"

#include "hw/timer/allwinner-a10-pit.h"

#include "hw/intc/arm_gic.h"

+#include "hw/misc/allwinner-h3-ccu.h"

#include "target/arm/cpu.h"

/**

@@ -XXX,XX +XXX,XX @@ enum {

AW_H3_SRAM_A1,

AW_H3_SRAM_A2,

AW_H3_SRAM_C,

+ AW_H3_CCU,

AW_H3_PIT,

AW_H3_UART0,

AW_H3_UART1,

@@ -XXX,XX +XXX,XX @@ typedef struct AwH3State {

ARMCPU cpus[AW_H3_NUM_CPUS];

const hwaddr *memmap;

AwA10PITState timer;

+ AwH3ClockCtlState ccu;

GICState gic;

MemoryRegion sram_a1;

MemoryRegion sram_a2;

diff --git a/include/hw/misc/allwinner-h3-ccu.h b/include/hw/misc/allwinner-h3-ccu.h

new file mode 100644

index XXXXXXX..XXXXXXX

--- /dev/null

+++ b/include/hw/misc/allwinner-h3-ccu.h

@@ -XXX,XX +XXX,XX @@

+/*

+ * Allwinner H3 Clock Control Unit emulation

+ *

+ * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>

+ *

+ * This program is free software: you can redistribute it and/or modify

+ * it under the terms of the GNU General Public License as published by

+ * the Free Software Foundation, either version 2 of the License, or

+ * (at your option) any later version.

+ *

+ * This program is distributed in the hope that it will be useful,

+ * but WITHOUT ANY WARRANTY; without even the implied warranty of

+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

+ * GNU General Public License for more details.

+ *

+ * You should have received a copy of the GNU General Public License

+ * along with this program. If not, see <http://www.gnu.org/licenses/>.

+ */

+

+#ifndef HW_MISC_ALLWINNER_H3_CCU_H

+#define HW_MISC_ALLWINNER_H3_CCU_H

+

+#include "qom/object.h"

+#include "hw/sysbus.h"

+

+/**

+ * @name Constants

+ * @{

+ */

+

+/** Size of register I/O address space used by CCU device */

+#define AW_H3_CCU_IOSIZE (0x400)

+

+/** Total number of known registers */

+#define AW_H3_CCU_REGS_NUM (AW_H3_CCU_IOSIZE / sizeof(uint32_t))

+

+/** @} */

+

+/**

+ * @name Object model

+ * @{

+ */

+

+#define TYPE_AW_H3_CCU "allwinner-h3-ccu"

+#define AW_H3_CCU(obj) \

+ OBJECT_CHECK(AwH3ClockCtlState, (obj), TYPE_AW_H3_CCU)

+

+/** @} */

+

+/**

+ * Allwinner H3 CCU object instance state.

+ */

+typedef struct AwH3ClockCtlState {

+ /*< private >*/

+ SysBusDevice parent_obj;

+ /*< public >*/

+

+ /** Maps I/O registers in physical memory */

+ MemoryRegion iomem;

+

+ /** Array of hardware registers */

+ uint32_t regs[AW_H3_CCU_REGS_NUM];

+

+} AwH3ClockCtlState;

+

+#endif /* HW_MISC_ALLWINNER_H3_CCU_H */