[PATCH 0/3] target/arm: Implement v8.3-RCPC and v8.4-RCPC

Peter Maydell posted 3 patches 5 years, 8 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20200224172846.13053-1-peter.maydell@linaro.org
Maintainers: Peter Maydell <peter.maydell@linaro.org>, Riku Voipio <riku.voipio@iki.fi>, Laurent Vivier <laurent@vivier.eu>
target/arm/cpu.h           |  14 ++++-
linux-user/elfload.c       |   2 +
target/arm/cpu64.c         |   1 +
target/arm/translate-a64.c | 114 +++++++++++++++++++++++++++++++++++++
4 files changed, 129 insertions(+), 2 deletions(-)
[PATCH 0/3] target/arm: Implement v8.3-RCPC and v8.4-RCPC
Posted by Peter Maydell 5 years, 8 months ago
This patchset implements the Arm architectural features
ARMv8.3-RCPC and ARMv8.4-RCPC. These provide a handful of
new load and store instructions which have "LoadAcquirePC"
semantics. These are slightly weaker than standard
"LoadAcquire", so we choose to implement them in QEMU as
LoadAcquire.

Patch 1 is a trivial fix to the PMU isar function which
I managed to cut-n-paste with the wrong FIELD_EX* macro.

I've tested these using risu against an Arm AEM FVP model:
this doesn't do anything to test the memory barrier semantics
but does work as a check that the decode is correct and
that the various signed/unsigned/extend/etc operations
are being done correctly.

thanks
-- PMM

Peter Maydell (3):
  target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0
  target/arm: Implement v8.3-RCPC
  target/arm: Implement v8.4-RCPC

 target/arm/cpu.h           |  14 ++++-
 linux-user/elfload.c       |   2 +
 target/arm/cpu64.c         |   1 +
 target/arm/translate-a64.c | 114 +++++++++++++++++++++++++++++++++++++
 4 files changed, 129 insertions(+), 2 deletions(-)

-- 
2.20.1