[PATCH 00/19] target/arm: vfp feature and decodetree cleanup

Richard Henderson posted 19 patches 6 weeks ago
Test docker-quick@centos7 passed
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git fetch https://github.com/patchew-project/qemu tags/patchew/20200214181547.21408-1-richard.henderson@linaro.org
Maintainers: Laurent Vivier <laurent@vivier.eu>, Riku Voipio <riku.voipio@iki.fi>, Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.h               |  56 ++--
target/arm/vfp-uncond.decode   |  12 +-
target/arm/vfp.decode          | 153 +++++------
hw/intc/armv7m_nvic.c          |  20 +-
linux-user/arm/signal.c        |   4 +-
linux-user/elfload.c           |  24 +-
target/arm/arch_dump.c         |  11 +-
target/arm/cpu.c               |  50 +---
target/arm/cpu64.c             |   3 -
target/arm/helper.c            |  17 +-
target/arm/kvm32.c             |   5 -
target/arm/kvm64.c             |   1 -
target/arm/m_helper.c          |  11 +-
target/arm/machine.c           |   3 +-
target/arm/translate-vfp.inc.c | 467 ++++++++++++++++++++-------------
target/arm/translate.c         | 121 ++-------
16 files changed, 479 insertions(+), 479 deletions(-)

[PATCH 00/19] target/arm: vfp feature and decodetree cleanup

Posted by Richard Henderson 6 weeks ago
The main goal of the patchset is to move the ARM_FEATURE_VFP
test from outside of the disas_vfp_insn() to inside each of
the trans_* functions, so that we get the proper ISA check
for each case.

At the end of that, it is easy to eliminate all of the remaining
tests vs ARM_FEATURE_VFP* in favor of the preferred ISAR tests.

Finally, there are a couple of cleanups to vfp.decode to make
things a bit more legible.


r~


Richard Henderson (19):
  target/arm: Fix field extract from MVFR[0-2]
  target/arm: Rename isar_feature_aa32_simd_r32
  target/arm: Use isar_feature_aa32_simd_r32 more places
  target/arm: Set MVFR0.FPSP for ARMv5 cpus
  target/arm: Add isar_feature_aa32_simd_r16
  target/arm: Rename isar_feature_aa32_fpdp_v2
  target/arm: Add isar_feature_aa32_{fpsp_v2,fpsp_v3,fpdp_v3}
  target/arm: Perform fpdp_v2 check first
  target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp,dp}_v3
  target/arm: Add missing checks for fpsp_v2
  target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac
  target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn
  target/arm: Move VLLDM and VLSTM to vfp.decode
  target/arm: Move the vfp decodetree calls next to the base isa
  linux-user/arm: Replace ARM_FEATURE_VFP* tests for HWCAP
  target/arm: Remove ARM_FEATURE_VFP*
  target/arm: Add formats for some vfp 2 and 3-register insns
  target/arm: Split VFM decode
  target/arm: Split VMINMAXNM decode

 target/arm/cpu.h               |  56 ++--
 target/arm/vfp-uncond.decode   |  12 +-
 target/arm/vfp.decode          | 153 +++++------
 hw/intc/armv7m_nvic.c          |  20 +-
 linux-user/arm/signal.c        |   4 +-
 linux-user/elfload.c           |  24 +-
 target/arm/arch_dump.c         |  11 +-
 target/arm/cpu.c               |  50 +---
 target/arm/cpu64.c             |   3 -
 target/arm/helper.c            |  17 +-
 target/arm/kvm32.c             |   5 -
 target/arm/kvm64.c             |   1 -
 target/arm/m_helper.c          |  11 +-
 target/arm/machine.c           |   3 +-
 target/arm/translate-vfp.inc.c | 467 ++++++++++++++++++++-------------
 target/arm/translate.c         | 121 ++-------
 16 files changed, 479 insertions(+), 479 deletions(-)

-- 
2.20.1


Re: [PATCH 00/19] target/arm: vfp feature and decodetree cleanup

Posted by Peter Maydell 5 weeks ago
On Fri, 14 Feb 2020 at 18:15, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The main goal of the patchset is to move the ARM_FEATURE_VFP
> test from outside of the disas_vfp_insn() to inside each of
> the trans_* functions, so that we get the proper ISA check
> for each case.
>
> At the end of that, it is easy to eliminate all of the remaining
> tests vs ARM_FEATURE_VFP* in favor of the preferred ISAR tests.
>
> Finally, there are a couple of cleanups to vfp.decode to make
> things a bit more legible.
>
>
> r~
>
>
> Richard Henderson (19):
>   target/arm: Fix field extract from MVFR[0-2]
>   target/arm: Rename isar_feature_aa32_simd_r32
>   target/arm: Use isar_feature_aa32_simd_r32 more places
>   target/arm: Set MVFR0.FPSP for ARMv5 cpus
>   target/arm: Add isar_feature_aa32_simd_r16
>   target/arm: Rename isar_feature_aa32_fpdp_v2
>   target/arm: Add isar_feature_aa32_{fpsp_v2,fpsp_v3,fpdp_v3}
>   target/arm: Perform fpdp_v2 check first
>   target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp,dp}_v3
>   target/arm: Add missing checks for fpsp_v2
>   target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac
>   target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn
>   target/arm: Move VLLDM and VLSTM to vfp.decode
>   target/arm: Move the vfp decodetree calls next to the base isa
>   linux-user/arm: Replace ARM_FEATURE_VFP* tests for HWCAP
>   target/arm: Remove ARM_FEATURE_VFP*
>   target/arm: Add formats for some vfp 2 and 3-register insns
>   target/arm: Split VFM decode
>   target/arm: Split VMINMAXNM decode

Hi; patch 1 here already has a version in my PMU patchset.
I've applied patches 2-10 to target-arm.next, with one or
two minor fixups for things like the checkpatch long-line
warning and a typo here or there in commit message or comment
(expect a pullreq either today or tomorrow). Patches 11-19
I've sent reviewed-by tags or comments on.

thanks
-- PMM

Re: [PATCH 00/19] target/arm: vfp feature and decodetree cleanup

Posted by no-reply@patchew.org 6 weeks ago
Patchew URL: https://patchew.org/QEMU/20200214181547.21408-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PATCH 00/19] target/arm: vfp feature and decodetree cleanup
Message-id: 20200214181547.21408-1-richard.henderson@linaro.org
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20200214181547.21408-1-richard.henderson@linaro.org -> patchew/20200214181547.21408-1-richard.henderson@linaro.org
Switched to a new branch 'test'
95783b0 target/arm: Split VMINMAXNM decode
767538b target/arm: Split VFM decode
f42df4d target/arm: Add formats for some vfp 2 and 3-register insns
7ab67bb target/arm: Remove ARM_FEATURE_VFP*
1666ad9 linux-user/arm: Replace ARM_FEATURE_VFP* tests for HWCAP
65ff809 target/arm: Move the vfp decodetree calls next to the base isa
869a0c6 target/arm: Move VLLDM and VLSTM to vfp.decode
5f4493e target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn
4de9678 target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac
18e3a45 target/arm: Add missing checks for fpsp_v2
7308009 target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3
9a14898 target/arm: Perform fpdp_v2 check first
cf0d4dd target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v3}
ee3781d target/arm: Rename isar_feature_aa32_fpdp_v2
0620ff1 target/arm: Add isar_feature_aa32_simd_r16
c4a4615 target/arm: Set MVFR0.FPSP for ARMv5 cpus
0ad6da0 target/arm: Use isar_feature_aa32_simd_r32 more places
ea58091 target/arm: Rename isar_feature_aa32_simd_r32
fdabf89 target/arm: Fix field extract from MVFR[0-2]

=== OUTPUT BEGIN ===
1/19 Checking commit fdabf896edb9 (target/arm: Fix field extract from MVFR[0-2])
2/19 Checking commit ea5809173fd7 (target/arm: Rename isar_feature_aa32_simd_r32)
WARNING: line over 80 characters
#143: FILE: target/arm/translate-vfp.inc.c:1825:
+    if (!dc_isar_feature(aa32_simd_r32, s) && ((a->vd | a->vn | a->vm) & 0x10)) {

total: 0 errors, 1 warnings, 216 lines checked

Patch 2/19 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/19 Checking commit 0ad6da01bb17 (target/arm: Use isar_feature_aa32_simd_r32 more places)
4/19 Checking commit c4a4615631d0 (target/arm: Set MVFR0.FPSP for ARMv5 cpus)
5/19 Checking commit 0620ff1eeadf (target/arm: Add isar_feature_aa32_simd_r16)
6/19 Checking commit ee3781d87d37 (target/arm: Rename isar_feature_aa32_fpdp_v2)
7/19 Checking commit cf0d4dd72bc1 (target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v3})
8/19 Checking commit 9a14898afce1 (target/arm: Perform fpdp_v2 check first)
9/19 Checking commit 7308009078c7 (target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3)
10/19 Checking commit 18e3a454c82a (target/arm: Add missing checks for fpsp_v2)
11/19 Checking commit 4de967840769 (target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac)
12/19 Checking commit 5f4493e01033 (target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn)
13/19 Checking commit 869a0c6ea3c9 (target/arm: Move VLLDM and VLSTM to vfp.decode)
14/19 Checking commit 65ff809853db (target/arm: Move the vfp decodetree calls next to the base isa)
ERROR: trailing whitespace
#106: FILE: target/arm/translate.c:10663:
+     * Note disas_vfp is written for a32 with cond field in the $

total: 1 errors, 0 warnings, 128 lines checked

Patch 14/19 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/19 Checking commit 1666ad9ed1e2 (linux-user/arm: Replace ARM_FEATURE_VFP* tests for HWCAP)
16/19 Checking commit 7ab67bbe6345 (target/arm: Remove ARM_FEATURE_VFP*)
17/19 Checking commit f42df4d1f1aa (target/arm: Add formats for some vfp 2 and 3-register insns)
18/19 Checking commit 767538ba7ae0 (target/arm: Split VFM decode)
19/19 Checking commit 95783b0b4fd0 (target/arm: Split VMINMAXNM decode)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200214181547.21408-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
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